Home
last modified time | relevance | path

Searched +full:jeida +full:- +full:24 (Results 1 – 25 of 27) sorted by relevance

12

/linux-6.14.4/Documentation/devicetree/bindings/display/
Dlvds-data-mapping.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/lvds-data-mapping.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <[email protected]>
11 - Thierry Reding <[email protected]>
14 LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
19 [JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February
20 1999 (Version 1.0), Japan Electronic Industry Development Association (JEIDA)
27 FPD-Link and FlatLink brands.
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/display/bridge/
Dite,it6263.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <[email protected]>
13 The IT6263 is a high-performance single-chip De-SSC(De-Spread Spectrum) LVDS
16 The built-in LVDS receiver can support single-link and dual-link LVDS inputs,
17 and the built-in HDMI transmitter is fully compliant with HDMI 1.4a/3D, HDCP
21 with sampling rate up to 192KHz and sample size up to 24 bits. In addition,
24 The newly supported High-Bit Rate(HBR) audio by HDMI specifications v1.3 is
30 - $ref: /schemas/display/lvds-dual-ports.yaml#
[all …]
Dlvds-codec.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/lvds-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <[email protected]>
16 LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
21 [JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February
22 1999 (Version 1.0), Japan Electronic Industry Development Association (JEIDA)
28 Those devices have been marketed under the FPD-Link and FlatLink brand names
34 - items:
[all …]
Dfsl,imx8qxp-ldb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <[email protected]>
19 For i.MX8qxp LDB, each channel supports up to 24bpp parallel input color
20 format and can map the input to VESA or JEIDA standards. The two channels
41 - fsl,imx8qm-ldb
42 - fsl,imx8qxp-ldb
44 "#address-cells":
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/display/panel/
Dadvantech,idk-1110wr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/advantech,idk-1110wr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Advantech IDK-1110WR 10.1" WSVGA LVDS Display Panel
10 - Lad Prabhakar <prabhakar.mahadev-[email protected]>
11 - Thierry Reding <[email protected]>
14 - $ref: panel-common.yaml#
15 - $ref: /schemas/display/lvds.yaml#
21 const: advantech,idk-1110wr
[all …]
Dmitsubishi,aa104xd12.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <[email protected]>
11 - Thierry Reding <[email protected]>
14 - $ref: panel-common.yaml#
15 - $ref: /schemas/display/lvds.yaml#
24 - compatible
29 - const: mitsubishi,aa104xd12
30 - const: panel-lvds
[all …]
Dmitsubishi,aa121td01.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <[email protected]>
11 - Thierry Reding <[email protected]>
14 - $ref: panel-common.yaml#
15 - $ref: /schemas/display/lvds.yaml#
24 - compatible
29 - const: mitsubishi,aa121td01
30 - const: panel-lvds
[all …]
Dpanel-simple.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-simple.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <[email protected]>
11 - Sam Ravnborg <[email protected]>
15 requires only a single power-supply.
23 - $ref: panel-common.yaml#
24 - $ref: ../lvds-data-mapping.yaml#
32 # Ampire AM-1280800N3TZQW-T00H 10.1" WQVGA TFT LCD panel
[all …]
/linux-6.14.4/drivers/gpu/drm/
Ddrm_of.c1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <linux/media-bus-format.h>
25 * drm_of_crtc_port_mask - find the mask of a registered CRTC by port OF node
39 if (tmp->port == port) in drm_of_crtc_port_mask()
50 * drm_of_find_possible_crtcs - find the possible CRTCs for an encoder port
83 * drm_of_component_match_add - Add a component helper OF node match rule
101 * drm_of_component_probe - Generic probe function for a component based master
121 if (!dev->of_node) in drm_of_component_probe()
122 return -EINVAL; in drm_of_component_probe()
129 port = of_parse_phandle(dev->of_node, "ports", i); in drm_of_component_probe()
[all …]
/linux-6.14.4/arch/arm/boot/dts/nxp/imx/
Dimx6q-var-mx6customboard.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Support for Variscite MX6 Carrier-board
9 /dts-v1/;
11 #include "imx6qdl-var-som.dtsi"
12 #include <dt-bindings/pwm/pwm.h>
15 model = "Variscite i.MX6 QUAD/DUAL VAR-SOM-MX6 Custom Board";
16 compatible = "variscite,mx6customboard", "variscite,var-som-imx6q", "fsl,imx6q";
18 panel0: lvds-panel0 {
19 compatible = "panel-lvds";
21 width-mm = <152>;
[all …]
Dimx53-m53menlo.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "imx53-m53.dtsi"
13 gpio-keys {
14 compatible = "gpio-keys";
15 pinctrl-0 = <&pinctrl_power_button>;
16 pinctrl-names = "default";
18 power-button {
25 gpio-poweroff {
26 compatible = "gpio-poweroff";
[all …]
Dimx6q-novena.dts2 * Copyright 2015 Sutajio Ko-Usagi PTE LTD
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
49 /dts-v1/;
51 #include <dt-bindings/gpio/gpio.h>
52 #include <dt-bindings/input/input.h>
56 compatible = "kosagi,imx6q-novena", "fsl,imx6q";
65 stdout-path = &uart2;
69 compatible = "pwm-backlight";
71 pinctrl-names = "default";
[all …]
/linux-6.14.4/arch/arm64/boot/dts/renesas/
Drzg2-advantech-idk-1110wr-panel.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Advantech idk-1110wr LVDS panel connected
10 panel-lvds {
11 compatible = "advantech,idk-1110wr", "panel-lvds";
13 width-mm = <223>;
14 height-mm = <125>;
16 data-mapping = "jeida-24";
18 panel-timing {
20 clock-frequency = <51200000>;
23 hsync-len = <240>;
[all …]
/linux-6.14.4/arch/arm64/boot/dts/freescale/
Dimx8mp-evk-lvds1-imx-lvds-hdmi-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include "imx8mp-evk-imx-lvds-hdmi-common.dtsi"
10 #address-cells = <1>;
11 #size-cells = <0>;
16 data-mapping = "jeida-24";
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_lvds_en>;
19 reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
20 ivdd-supply = <&reg_buck5>;
[all …]
Dimx8mp-evk-lvds0-imx-lvds-hdmi-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include "imx8mp-evk-imx-lvds-hdmi-common.dtsi"
10 #address-cells = <1>;
11 #size-cells = <0>;
16 data-mapping = "jeida-24";
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_lvds_en>;
19 reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
20 ivdd-supply = <&reg_buck5>;
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/display/imx/
Dldb.txt1 Device-Tree bindings for LVDS Display Bridge (ldb)
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
10 - #address-cells : should be <1>
11 - #size-cells : should be <0>
12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".
16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
17 The phandle points to the iomuxc-gpr region containing the LVDS
19 - clocks, clock-names : phandles to the LDB divider and selector clocks and to
21 Documentation/devicetree/bindings/clock/clock-bindings.txt
23 "di0_pll" - LDB LVDS channel 0 mux
[all …]
/linux-6.14.4/drivers/gpu/drm/rockchip/
Drockchip_lvds.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Mark Yao <mark.yao@rock-chips.com>
6 * Sandy Huang <hjc@rock-chips.com>
38 * struct rockchip_lvds_soc_data - rockchip lvds Soc private data
55 int format; /* vesa or jeida format */
79 writel_relaxed(val, lvds->regs + offset); in rk3288_writel()
80 if (lvds->output == DISPLAY_OUTPUT_LVDS) in rk3288_writel()
82 writel_relaxed(val, lvds->regs + offset + RK3288_LVDS_CH1_OFFSET); in rk3288_writel()
87 if (strncmp(s, "jeida-18", 8) == 0) in rockchip_lvds_name_to_format()
89 else if (strncmp(s, "jeida-24", 8) == 0) in rockchip_lvds_name_to_format()
[all …]
/linux-6.14.4/arch/arm/boot/dts/microchip/
Dat91-nattis-2-natte-2.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * at91-nattis-2-natte-2.dts - Device Tree file for the Linea/Nattis board
9 /dts-v1/;
10 #include "at91-linea.dtsi"
11 #include "at91-natte.dtsi"
14 model = "Axentia Linea-Nattis v2 Natte v2";
15 compatible = "axentia,nattis-2", "axentia,natte-2", "axentia,linea",
18 gpio-keys {
19 compatible = "gpio-keys";
21 key-wakeup {
[all …]
/linux-6.14.4/drivers/gpu/drm/bridge/
Dtc358775.c1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/media-bus-format.h>
36 /* DSI D-PHY Layer Registers */
52 #define PPI_STARTPPI 0x0104 /* START control bit of PPI-TX function. */
93 #define DSI_STARTDSI 0x0204 /* START control bit of DSI-TX function */
126 #define LV_MX2427 0x0498 /* Bit 24 to 27 */
128 FLD_VAL(b2, 20, 16) | FLD_VAL(b3, 28, 24))
173 #define SYS_RST_I2CS BIT(0) /* Reset I2C-Slave controller */
174 #define SYS_RST_I2CM BIT(1) /* Reset I2C-Master controller */
177 #define SYS_RST_DSIRX BIT(4) /* Reset DSI-RX and App controller */
[all …]
Dlontium-lt9211.c1 // SPDX-License-Identifier: GPL-2.0
6 * 2xDSI/2xLVDS/1xDPI -> 2xDSI/2xLVDS/1xDPI
8 * 1xDSI -> 1xLVDS
17 #include <linux/media-bus-format.h>
40 /* DSI lane count - 0 means 4 lanes ; 1, 2, 3 means 1, 2, 3 lanes. */
106 return drm_bridge_attach(bridge->encoder, ctx->panel_bridge, in lt9211_attach()
107 &ctx->bridge, flags); in lt9211_attach()
116 ret = regmap_bulk_read(ctx->regmap, REG_CHIPID0, chipid, 3); in lt9211_read_chipid()
118 dev_err(ctx->dev, "Failed to read Chip ID: %d\n", ret); in lt9211_read_chipid()
125 dev_err(ctx->dev, "Unknown Chip ID: 0x%02x 0x%02x 0x%02x\n", in lt9211_read_chipid()
[all …]
Dti-sn65dsi83.c1 // SPDX-License-Identifier: GPL-2.0
6 * - SN65DSI83
7 * = 1x Single-link DSI ~ 1x Single-link LVDS
8 * - Supported
9 * - Single-link LVDS mode tested
10 * - SN65DSI84
11 * = 1x Single-link DSI ~ 2x Single-link or 1x Dual-link LVDS
12 * - Supported
13 * - Dual-link LVDS mode tested
14 * - 2x Single-link LVDS mode unsupported
[all …]
/linux-6.14.4/drivers/gpu/drm/renesas/rcar-du/
Drcar_lvds.c1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car LVDS Encoder
5 * Copyright (C) 2013-2018 Renesas Electronics Corporation
13 #include <linux/media-bus-format.h>
54 #define RCAR_LVDS_QUIRK_DUAL_LINK BIT(4) /* Supports dual-link operation */
88 return ioread32(lvds->mmio + reg); in rcar_lvds_read()
93 iowrite32(data, lvds->mmio + reg); in rcar_lvds_write()
96 /* -----------------------------------------------------------------------------
157 * The LVDS PLL is made of a pre-divider and a multiplier (strangely in rcar_lvds_d3_e3_pll_calc()
158 * enough called M and N respectively), followed by a post-divider E. in rcar_lvds_d3_e3_pll_calc()
[all …]
/linux-6.14.4/drivers/gpu/drm/imx/ipuv3/
Dimx-ldb.c1 // SPDX-License-Identifier: GPL-2.0+
3 * i.MX drm driver - LVDS display bridge
11 #include <linux/media-bus-format.h>
13 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
33 #include "imx-drm.h"
35 #define DRIVER_NAME "imx-ldb"
73 return container_of(e, struct imx_ldb_encoder, encoder)->channel; in enc_to_imx_ldb_ch()
97 struct imx_ldb *ldb = imx_ldb_ch->ldb; in imx_ldb_ch_set_bus_format()
98 int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN; in imx_ldb_ch_set_bus_format()
104 if (imx_ldb_ch->chno == 0 || dual) in imx_ldb_ch_set_bus_format()
[all …]
/linux-6.14.4/drivers/gpu/drm/stm/
Dlvds.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
4 * Author(s): Raphaël GALLAIS-POU <raphael.gallais-[email protected]> for STMicroelectronics.
16 #include <linux/clk-provider.h>
19 #include <linux/media-bus-format.h>
62 #define CR_LK1POL GENMASK(20, 16) /* Link-1 output Polarity */
63 #define CR_LK2POL GENMASK(25, 21) /* Link-2 output Polarity */
82 #define PHY_GCR_RSTZ BIT(24) /* LVDS PHY digital reset */
96 #define PHY_PLLCR1_EN_SD BIT(1) /* LVDS PHY PLL sigma-delta signal enable */
120 * ,--------. ,--------. ,--------. ,--------. ,---------.
[all …]
/linux-6.14.4/Documentation/userspace-api/media/v4l/
Dsubdev-formats.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-mbus-format:
14 .. flat-table:: struct v4l2_mbus_framefmt
15 :header-rows: 0
16 :stub-columns: 0
19 * - __u32
20 - ``width``
21 - Image width in pixels.
22 * - __u32
23 - ``height``
[all …]

12