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/linux-6.14.4/Documentation/devicetree/bindings/power/
Dpower_domain.txt1 * Generic PM domains
3 System on chip designs are often divided into multiple PM domains that can be
8 their PM domains provided by PM domain providers. A PM domain provider can be
10 domains. A consumer node can refer to the provider by a phandle and a set of
12 #power-domain-cells property in the PM domain provider node.
16 See power-domain.yaml.
21 - power-domains : A list of PM domain specifiers, as defined by bindings of
25 - power-domain-names : A list of power domain name strings sorted in the same
26 order as the power-domains property. Consumers drivers will use
27 power-domain-names to match power domains with power-domains
[all …]
/linux-6.14.4/arch/arm/boot/dts/renesas/
Dr9a06g032.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a7";
30 compatible = "arm,cortex-a7";
33 enable-method = "renesas,r9a06g032-smp";
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/iio/adc/
Dnxp,imx8qxp-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nxp,imx8qxp-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cai Huoqing <[email protected]>
17 const: nxp,imx8qxp-adc
28 clock-names:
30 - const: per
31 - const: ipg
33 assigned-clocks:
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/linux-6.14.4/Documentation/devicetree/bindings/net/can/
Dnxp,sja1000.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfgang Grandegger <[email protected]>
15 - enum:
16 - nxp,sja1000
17 - technologic,sja1000
18 - items:
19 - enum:
20 - renesas,r9a06g032-sja1000 # RZ/N1D
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/linux-6.14.4/arch/arm64/boot/dts/xilinx/
Dzynqmp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2014 - 2021, Xilinx, Inc.
15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 #include <dt-bindings/interrupt-controller/irq.h>
19 #include <dt-bindings/power/xlnx-zynqmp-power.h>
20 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
21 #include <dt-bindings/thermal/thermal.h>
25 #address-cells = <2>;
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/linux-6.14.4/Documentation/devicetree/bindings/display/bridge/
Dfsl,imx8mp-hdmi-tx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8mp-hdmi-tx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lucas Stach <[email protected]>
17 - $ref: /schemas/display/bridge/synopsys,dw-hdmi.yaml#
22 - fsl,imx8mp-hdmi-tx
24 reg-io-width:
30 clock-names:
32 - const: iahb
[all …]
/linux-6.14.4/arch/arm/boot/dts/mediatek/
Dmt7623a.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018 MediaTek Inc.
8 /dts-v1/;
9 #include <dt-bindings/power/mt7623a-power.h>
13 power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>;
17 power-domains = <&scpsys MT7623A_POWER_DOMAIN_ETH>;
22 phy-mode = "trgmii";
24 fixed-link {
26 full-duplex;
33 phy-mode = "rgmii";
[all …]
/linux-6.14.4/arch/arm/boot/dts/ti/keystone/
Dkeystone-k2g.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/pinctrl/keystone.h>
10 #include <dt-bindings/gpio/gpio.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
32 #address-cells = <1>;
33 #size-cells = <0>;
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/linux-6.14.4/drivers/pmdomain/arm/
Dscpi_pm_domain.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/io.h>
23 * These device power state values are not well-defined in the specification.
44 ret = pd->ops->device_set_power_state(pd->domain, state); in scpi_pd_power()
48 return !(state == pd->ops->device_get_power_state(pd->domain)); in scpi_pd_power()
67 struct device *dev = &pdev->dev; in scpi_pm_domain_probe()
68 struct device_node *np = dev->of_node; in scpi_pm_domain_probe()
71 struct generic_pm_domain **domains; in scpi_pm_domain_probe() local
77 return -EPROBE_DEFER; in scpi_pm_domain_probe()
81 return -ENODEV; in scpi_pm_domain_probe()
[all …]
Dscmi_pm_domain.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2021 ARM Ltd.
9 #include <linux/io.h>
36 ret = power_ops->state_set(pd->ph, pd->domain, state); in scmi_pd_power()
38 ret = power_ops->state_get(pd->ph, pd->domain, &ret_state); in scmi_pd_power()
40 return -EIO; in scmi_pd_power()
58 struct device *dev = &sdev->dev; in scmi_pm_domain_probe()
59 struct device_node *np = dev->of_node; in scmi_pm_domain_probe()
62 struct generic_pm_domain **domains; in scmi_pm_domain_probe() local
63 const struct scmi_handle *handle = sdev->handle; in scmi_pm_domain_probe()
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/linux-6.14.4/arch/powerpc/kernel/
Dpci_64.c1 // SPDX-License-Identifier: GPL-2.0-or-later
25 #include <asm/io.h>
26 #include <asm/pci-bridge.h>
29 #include <asm/ppc-pci.h>
31 /* pci_io_base -- the base address from which io bars are offsets.
35 * is mapped on the first 64K of IO space
51 /* On ppc64, we always enable PCI domains and we keep domain 0 in pcibios_init()
65 pci_bus_add_devices(hose->bus); in pcibios_init()
86 * mappings since we might have to deal with sub-page alignments in pcibios_unmap_io_space()
94 if (bus->self) { in pcibios_unmap_io_space()
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/linux-6.14.4/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra124-dpaux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <[email protected]>
11 - Jon Hunter <[email protected]>
24 pattern: "^dpaux@[0-9a-f]+$"
28 - enum:
29 - nvidia,tegra124-dpaux
30 - nvidia,tegra210-dpaux
[all …]
/linux-6.14.4/arch/arm64/boot/dts/freescale/
Dimx8-ss-dma.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/dma/fsl-edma.h>
9 #include <dt-bindings/firmware/imx/rsrc.h>
11 dma_ipg_clk: clock-dma-ipg {
12 compatible = "fixed-clock";
13 #clock-cells = <0>;
14 clock-frequency = <120000000>;
15 clock-output-names = "dma_ipg_clk";
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/memory-controllers/
Drenesas,rpc-if.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas Reduced Pin Count Interface (RPC-IF)
10 - Sergei Shtylyov <[email protected]>
13 Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to
16 The flash chip itself should be represented by a subnode of the RPC-IF node.
19 - if it contains "jedec,spi-nor", then SPI is used;
20 - if it contains "cfi-flash", then HyperFlash is used.
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/display/rockchip/
Drockchip,dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Yao <[email protected]>
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
18 - $ref: /schemas/sound/dai-common.yaml#
23 - rockchip,rk3228-dw-hdmi
24 - rockchip,rk3288-dw-hdmi
25 - rockchip,rk3328-dw-hdmi
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/soc/imx/
Dfsl,imx8mp-hsio-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MP HSIO blk-ctrl
10 - Lucas Stach <[email protected]>
13 The i.MX8MP HSIO blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the high-speed IO
20 - const: fsl,imx8mp-hsio-blk-ctrl
21 - const: syscon
[all …]
/linux-6.14.4/arch/arm64/boot/dts/rockchip/
Drk356x-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3568-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3568-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
[all …]
Drk3399-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3399-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3399-power.h>
12 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
[all …]
/linux-6.14.4/drivers/soc/rockchip/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 special additional settings registers for a lot of soc-components.
18 tristate "Rockchip IO domain support"
21 Say y here to enable support io domains on Rockchip SoCs. It is
22 necessary for the io domain setting of the SoC to match the
/linux-6.14.4/arch/arm64/boot/dts/ti/
Dk3-am65-mcu.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "simple-bus";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 cpsw_mac_syscon: ethernet-mac-syscon@200 {
16 compatible = "ti,am62p-cpsw-mac-efuse", "syscon";
21 compatible = "ti,am654-phy-gmii-sel";
23 #phy-cells = <1>;
29 compatible = "pinctrl-single";
[all …]
Dk3-j721e-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
[all …]
/linux-6.14.4/Documentation/mm/
Dnuma.rst12 or more CPUs, local memory, and/or IO buses. For brevity and to
17 Each of the 'cells' may be viewed as an SMP [symmetric multi-processor] subset
18 of the system--although some components necessary for a stand-alone SMP system
20 connected together with some sort of system interconnect--e.g., a crossbar or
21 point-to-point link are common types of NUMA system interconnects. Both of
31 away the cell containing the CPU or IO bus making the memory access is from the
41 [cache misses] to be to "local" memory--memory on the same cell, if any--or
50 CPUs, memory and/or IO buses. And, again, memory accesses to memory on
51 "closer" nodes--nodes that map to closer cells--will generally experience
63 the existing nodes--or the system memory for non-NUMA platforms--into multiple
[all …]
/linux-6.14.4/drivers/pmdomain/sunxi/
Dsun20i-ppu.c1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <linux/io.h>
53 u32 status = readl(pd->base + PD_STATUS_REG); in sun20i_ppu_pd_is_on()
67 ret = readl_poll_timeout(pd->base + PD_STATUS_REG, status, in sun20i_ppu_pd_set_power()
73 writel(state, pd->base + PD_COMMAND_REG); in sun20i_ppu_pd_set_power()
76 ret = readl_poll_timeout(pd->base + PD_STATUS_REG, status, in sun20i_ppu_pd_set_power()
83 writel(status, pd->base + PD_STATUS_REG); in sun20i_ppu_pd_set_power()
105 struct device *dev = &pdev->dev; in sun20i_ppu_probe()
115 return -EINVAL; in sun20i_ppu_probe()
117 pds = devm_kcalloc(dev, desc->num_domains, sizeof(*pds), GFP_KERNEL); in sun20i_ppu_probe()
[all …]
/linux-6.14.4/arch/arm/boot/dts/ti/davinci/
Dda850.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
20 #address-cells = <1>;
21 #size-cells = <0>;
24 compatible = "arm,arm926ej-s";
28 operating-points-v2 = <&opp_table>;
32 opp_table: opp-table {
33 compatible = "operating-points-v2";
[all …]
/linux-6.14.4/drivers/pmdomain/ti/
Dti_sci_pm_domains.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/
6 * J Keerthy <j-[email protected]>
7 * Dave Gerlach <d-[email protected]>
19 #include <dt-bindings/soc/ti,sci_pm_domain.h>
26 * @pd_list: list of all the power domains on the device
64 struct generic_pm_domain *genpd = pd_to_genpd(dev->pm_domain); in ti_sci_pd_set_lat_constraint()
66 const struct ti_sci_handle *ti_sci = pd->parent->ti_sci; in ti_sci_pd_set_lat_constraint()
72 ret = ti_sci->ops.pm_ops.set_latency_constraint(ti_sci, val_ms, TISCI_MSG_CONSTRAINT_SET); in ti_sci_pd_set_lat_constraint()
78 pd->idx, val); in ti_sci_pd_set_lat_constraint()
[all …]

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