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Searched +full:imx8mp +full:- +full:hdmi +full:- +full:tx (Results 1 – 18 of 18) sorted by relevance

/linux-6.14.4/Documentation/devicetree/bindings/display/bridge/
Dfsl,imx8mp-hdmi-tx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8mp-hdmi-tx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8MP DWC HDMI TX Encoder
10 - Lucas Stach <[email protected]>
13 The i.MX8MP HDMI transmitter is a Synopsys DesignWare
14 HDMI 2.0a TX controller IP.
17 - $ref: /schemas/display/bridge/synopsys,dw-hdmi.yaml#
22 - fsl,imx8mp-hdmi-tx
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/linux-6.14.4/Documentation/devicetree/bindings/soc/imx/
Dfsl,imx8mp-hdmi-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MP HDMI blk-ctrl
10 - Lucas Stach <[email protected]>
13 The i.MX8MP HDMMI blk-ctrl is a top-level peripheral providing access to
15 peripherals located in the HDMI domain of the SoC.
20 - const: fsl,imx8mp-hdmi-blk-ctrl
21 - const: syscon
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/linux-6.14.4/Documentation/devicetree/bindings/display/imx/
Dfsl,imx8mp-hdmi-pvi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi-pvi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8MP HDMI Parallel Video Interface
10 - Lucas Stach <[email protected]>
13 The HDMI parallel video interface is a timing and sync generator block in the
14 i.MX8MP SoC, that sits between the video source and the HDMI TX controller.
18 const: fsl,imx8mp-hdmi-pvi
26 power-domains:
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/linux-6.14.4/drivers/gpu/drm/bridge/imx/
Dimx8mp-hdmi-tx.c1 // SPDX-License-Identifier: GPL-2.0+
25 struct imx8mp_hdmi *hdmi = (struct imx8mp_hdmi *)data; in imx8mp_hdmi_mode_valid() local
28 if (mode->clock < 13500) in imx8mp_hdmi_mode_valid()
31 if (mode->clock > 297000) in imx8mp_hdmi_mode_valid()
34 round_rate = clk_round_rate(hdmi->pixclk, mode->clock * 1000); in imx8mp_hdmi_mode_valid()
35 /* imx8mp's pixel clock generator (fsl-samsung-hdmi) cannot generate in imx8mp_hdmi_mode_valid()
39 * 0.5% = 5/1000 tolerance (mode->clock is 1/1000) in imx8mp_hdmi_mode_valid()
41 if (abs(round_rate - mode->clock * 1000) > mode->clock * 5) in imx8mp_hdmi_mode_valid()
44 /* We don't support double-clocked and Interlaced modes */ in imx8mp_hdmi_mode_valid()
45 if ((mode->flags & DRM_MODE_FLAG_DBLCLK) || in imx8mp_hdmi_mode_valid()
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DMakefile1 obj-$(CONFIG_DRM_IMX_LDB_HELPER) += imx-ldb-helper.o
2 obj-$(CONFIG_DRM_IMX_LEGACY_BRIDGE) += imx-legacy-bridge.o
3 obj-$(CONFIG_DRM_IMX8MP_DW_HDMI_BRIDGE) += imx8mp-hdmi-tx.o
4 obj-$(CONFIG_DRM_IMX8MP_HDMI_PVI) += imx8mp-hdmi-pvi.o
5 obj-$(CONFIG_DRM_IMX8QM_LDB) += imx8qm-ldb.o
6 obj-$(CONFIG_DRM_IMX8QXP_LDB) += imx8qxp-ldb.o
7 obj-$(CONFIG_DRM_IMX8QXP_PIXEL_COMBINER) += imx8qxp-pixel-combiner.o
8 obj-$(CONFIG_DRM_IMX8QXP_PIXEL_LINK) += imx8qxp-pixel-link.o
9 obj-$(CONFIG_DRM_IMX8QXP_PIXEL_LINK_TO_DPI) += imx8qxp-pxl2dpi.o
10 obj-$(CONFIG_DRM_IMX93_MIPI_DSI) += imx93-mipi-dsi.o
Dimx8mp-hdmi-pvi.c1 // SPDX-License-Identifier: GPL-2.0+
47 return drm_bridge_attach(bridge->encoder, pvi->next_bridge, in imx8mp_hdmi_pvi_bridge_attach()
54 struct drm_atomic_state *state = bridge_state->base.state; in imx8mp_hdmi_pvi_bridge_enable()
62 connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder); in imx8mp_hdmi_pvi_bridge_enable()
64 crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc); in imx8mp_hdmi_pvi_bridge_enable()
66 if (WARN_ON(pm_runtime_resume_and_get(pvi->dev))) in imx8mp_hdmi_pvi_bridge_enable()
69 mode = &crtc_state->adjusted_mode; in imx8mp_hdmi_pvi_bridge_enable()
73 if (mode->flags & DRM_MODE_FLAG_PVSYNC) in imx8mp_hdmi_pvi_bridge_enable()
76 if (mode->flags & DRM_MODE_FLAG_PHSYNC) in imx8mp_hdmi_pvi_bridge_enable()
79 if (pvi->next_bridge->timings) in imx8mp_hdmi_pvi_bridge_enable()
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/linux-6.14.4/Documentation/devicetree/bindings/sound/
Dfsl,aud2htx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP Audio Subsystem to HDMI RTX Subsystem Controller
10 - Shengjiu Wang <[email protected]>
14 const: fsl,imx8mp-aud2htx
24 - description: Peripheral clock
26 clock-names:
28 - const: bus
32 - description: DMA controller phandle and request line for TX
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/linux-6.14.4/arch/arm64/boot/dts/freescale/
Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/power/imx8mp-power.h>
8 #include <dt-bindings/reset/imx8mp-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interconnect/fsl,imx8mp.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
15 #include "imx8mp-pinfunc.h"
[all …]
Dimx8mp-dhcom-drc02.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * DHCOM iMX8MP variant:
6 * DHCM-iMX8ML8-C160-R204-F1638-SPI16-E2-CAN2-RTC-I-01D2
7 * DHCOM PCB number: 660-100 or newer
8 * DRC02 PCB number: 568-100 or newer
11 /dts-v1/;
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/phy/phy-imx8-pcie.h>
15 #include "imx8mp-dhcom-som.dtsi"
19 compatible = "dh,imx8mp-dhcom-drc02", "dh,imx8mp-dhcom-som",
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Dimx8mp-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
9 #include "imx8mp.dtsi"
13 compatible = "fsl,imx8mp-evk", "fsl,imx8mp";
16 stdout-path = &uart2;
19 backlight_lvds: backlight-lvds {
20 compatible = "pwm-backlight";
22 brightness-levels = <0 100>;
23 num-interpolated-steps = <100>;
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Dimx8mp-aristainetos3a-som-v1.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/net/ti-dp83867.h>
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
9 #include <dt-bindings/pwm/pwm.h>
10 #include "imx8mp.dtsi"
13 model = "ADLINK LEC-iMX8MP-Q-N-4G-32G";
14 compatible = "abb,imx8mp-aristanetos3-som", "fsl,imx8mp";
25 stdout-path = &uart2;
29 compatible = "usb-c-connector";
[all …]
Dimx8mp-tqma8mpql-mba8mp-ras314.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright (c) 2023-2024 TQ-Systems GmbH <[email protected]-group.com>,
4 * D-82229 Seefeld, Germany.
9 /dts-v1/;
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/net/ti-dp83867.h>
13 #include <dt-bindings/phy/phy-imx8-pcie.h>
14 #include <dt-bindings/pwm/pwm.h>
15 #include "imx8mp-tqma8mpql.dtsi"
18 model = "TQ-Systems i.MX8MPlus TQMa8MPxL on MBa8MP-RAS314";
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Dimx8mp-tqma8mpql-mba8mpxl.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2021-2022 TQ-Systems GmbH
4 * Author: Alexander Stein <alexander.stein@tq-group.com>
7 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
12 #include <dt-bindings/pwm/pwm.h>
13 #include "imx8mp-tqma8mpql.dtsi"
16 model = "TQ-Systems i.MX8MPlus TQMa8MPxL on MBa8MPxL";
[all …]
Dimx8mp-data-modul-edm-sbc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/net/qca-ar803x.h>
9 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 #include "imx8mp.dtsi"
14 compatible = "dmo,imx8mp-data-modul-edm-sbc", "fsl,imx8mp";
22 stdout-path = &uart3;
32 compatible = "pwm-backlight";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_panel_backlight>;
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Dimx8mp-dhcom-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2021-2022 Marek Vasut <[email protected]>
6 #include "imx8mp.dtsi"
10 compatible = "dh,imx8mp-dhcom-som", "fsl,imx8mp";
22 /* Memory size 512 MiB..8 GiB will be filled by U-Boot */
26 reg_eth_vio: regulator-eth-vio {
27 compatible = "regulator-fixed";
29 regulator-always-on;
30 regulator-boot-on;
31 regulator-min-microvolt = <3300000>;
[all …]
Dimx8mp-verdin.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include <dt-bindings/phy/phy-imx8-pcie.h>
7 #include <dt-bindings/pwm/pwm.h>
8 #include "imx8mp.dtsi"
12 stdout-path = &uart3;
24 compatible = "pwm-backlight";
25 brightness-levels = <0 45 63 88 119 158 203 255>;
26 default-brightness-level = <4>;
28 enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
29 pinctrl-names = "default";
[all …]
/linux-6.14.4/drivers/pmdomain/imx/
Dimx8mp-blk-ctrl.c1 // SPDX-License-Identifier: GPL-2.0+
9 #include <linux/clk-provider.h>
19 #include <dt-bindings/power/imx8mp-power.h>
104 regmap_update_bits(clk->regmap, GPR_REG2, in clk_hsio_pll_prepare()
110 /* de-assert PLL reset */ in clk_hsio_pll_prepare()
111 regmap_update_bits(clk->regmap, GPR_REG3, PLL_RST, PLL_RST); in clk_hsio_pll_prepare()
114 regmap_update_bits(clk->regmap, GPR_REG3, PLL_CKE, PLL_CKE); in clk_hsio_pll_prepare()
116 return regmap_read_poll_timeout(clk->regmap, GPR_REG1, val, in clk_hsio_pll_prepare()
124 regmap_update_bits(clk->regmap, GPR_REG3, PLL_RST | PLL_CKE, 0); in clk_hsio_pll_unprepare()
131 return regmap_test_bits(clk->regmap, GPR_REG1, PLL_LOCK); in clk_hsio_pll_is_prepared()
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/dma/
Dfsl,imx-sdma.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/dma/fsl,imx-sdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Joy Zou <[email protected]>
13 - $ref: dma-controller.yaml#
18 - items:
19 - enum:
20 - fsl,imx50-sdma
21 - fsl,imx51-sdma
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