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/linux-6.14.4/arch/arm/boot/dts/nxp/imx/
Dimx7d.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
7 #include <dt-bindings/reset/imx7-reset.h>
18 clock-frequency = <996000000>;
19 operating-points-v2 = <&cpu0_opp_table>;
20 #cooling-cells = <2>;
21 nvmem-cells = <&fuse_grade>;
22 nvmem-cell-names = "speed_grade";
26 compatible = "arm,cortex-a7";
29 clock-frequency = <996000000>;
30 operating-points-v2 = <&cpu0_opp_table>;
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Dimx7s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
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/linux-6.14.4/Documentation/devicetree/bindings/reset/
Dfsl,imx7-src.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/fsl,imx7-src.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrey Smirnov <[email protected]>
19 <dt-bindings/reset/imx7-reset.h> for i.MX7,
20 <dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ, i.MX8MM and i.MX8MN,
21 <dt-bindings/reset/imx8mp-reset.h> for i.MX8MP.
26 - items:
27 - enum:
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/linux-6.14.4/Documentation/devicetree/bindings/remoteproc/
Dfsl,imx-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX Co-Processor
10 This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs.
13 - Peng Fan <[email protected]>
18 - fsl,imx6sx-cm4
19 - fsl,imx7d-cm4
20 - fsl,imx7ulp-cm4
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/linux-6.14.4/Documentation/devicetree/bindings/pci/
Dfsl,imx6q-pcie-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lucas Stach <[email protected]>
11 - Richard Zhu <[email protected]>
22 clock-names:
26 num-lanes:
29 fsl,imx7d-pcie-phy:
31 description: A phandle to an fsl,imx7d-pcie-phy node. Additional
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/linux-6.14.4/arch/arm/mach-imx/
Dsrc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 #include <linux/reset-controller.h>
61 return -EINVAL; in imx_src_reset_module()
74 return -ETIME; in imx_src_reset_module()
97 * path to mainline kernel easier for the existing iMX7D users.
132 mask = 1 << (BP_SRC_A7RCR1_A7_CORE1_ENABLE + cpu - 1); in imx_enable_cpu()
137 mask = 1 << (BP_SRC_SCR_CORE1_ENABLE + cpu - 1); in imx_enable_cpu()
140 val |= 1 << (BP_SRC_SCR_CORE1_RST + cpu - 1); in imx_enable_cpu()
170 np = of_find_compatible_node(NULL, NULL, "fsl,imx51-src"); in imx_src_init()
193 np = of_find_compatible_node(NULL, NULL, "fsl,imx7d-src"); in imx7_src_init()
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-y := cpu.o system.o irq-common.o
4 obj-$(CONFIG_SOC_IMX25) += cpu-imx25.o mach-imx25.o pm-imx25.o
6 obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o mach-imx27.o
8 obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o mach-imx31.o
9 obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o mach-imx35.o
11 imx5-pm-$(CONFIG_PM) += pm-imx5.o
12 obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o $(imx5-pm-y)
14 obj-$(CONFIG_MXC_TZIC) += tzic.o
15 obj-$(CONFIG_MXC_AVIC) += avic.o
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Danatop.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2013-2015 Freescale Semiconductor, Inc.
4 * Copyright 2017-2018 NXP.
103 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop"); in imx_init_revision_from_anatop()
106 if (of_device_is_compatible(np, "fsl,imx6sl-anatop")) in imx_init_revision_from_anatop()
108 if (of_device_is_compatible(np, "fsl,imx7d-anatop")) in imx_init_revision_from_anatop()
117 if (of_device_is_compatible(np, "fsl,imx7d-anatop")) { in imx_init_revision_from_anatop()
138 "fsl,imx6ul-src"); in imx_init_revision_from_anatop()
160 anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop"); in imx_anatop_init()
162 pr_err("%s: failed to find imx6q-anatop regmap!\n", __func__); in imx_anatop_init()
/linux-6.14.4/arch/arm64/boot/dts/freescale/
Dimx8mm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/imx8mm-power.h>
11 #include <dt-bindings/reset/imx8mq-reset.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mm-pinfunc.h"
17 interrupt-parent = <&gic>;
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Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/power/imx8mn-power.h>
8 #include <dt-bindings/reset/imx8mq-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mn-pinfunc.h"
17 interrupt-parent = <&gic>;
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Dimx8mq.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <[email protected]>
7 #include <dt-bindings/clock/imx8mq-clock.h>
8 #include <dt-bindings/power/imx8mq-power.h>
9 #include <dt-bindings/reset/imx8mq-reset.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include "dt-bindings/input/input.h"
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interconnect/imx8mq.h>
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Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/power/imx8mp-power.h>
8 #include <dt-bindings/reset/imx8mp-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interconnect/fsl,imx8mp.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
15 #include "imx8mp-pinfunc.h"
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Dimx93.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx93-clock.h>
7 #include <dt-bindings/dma/fsl-edma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/fsl,imx93-power.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx93-pinfunc.h"
17 interrupt-parent = <&gic>;
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/linux-6.14.4/Documentation/devicetree/bindings/thermal/
Dimx-thermal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/imx-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <[email protected]>
15 - enum:
16 - fsl,imx6q-tempmon
17 - fsl,imx6sx-tempmon
18 - fsl,imx7d-tempmon
19 - items:
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/linux-6.14.4/Documentation/devicetree/bindings/media/
Dnxp,imx-mipi-csi2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nxp,imx-mipi-csi2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX7 and i.MX8 MIPI CSI-2 receiver
10 - Rui Miguel Silva <[email protected]>
11 - Laurent Pinchart <[email protected]>
13 description: |-
14 The NXP i.MX7 and i.MX8 families contain SoCs that include a MIPI CSI-2
19 While the CSI-2 receiver is separate from the MIPI D-PHY IP core, the PHY is
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/linux-6.14.4/drivers/reset/
Dreset-imx7.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * i.MX7 System Reset Controller (SRC) driver
14 #include <linux/reset-controller.h>
16 #include <dt-bindings/reset/imx7-reset.h>
17 #include <dt-bindings/reset/imx8mq-reset.h>
18 #include <dt-bindings/reset/imx8mp-reset.h>
51 const struct imx7_src_signal *signal = &imx7src->signals[id]; in imx7_reset_update()
53 return regmap_update_bits(imx7src->regmap, in imx7_reset_update()
54 signal->offset, signal->bit, value); in imx7_reset_update()
95 const unsigned int bit = imx7src->signals[id].bit; in imx7_reset_set()
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/linux-6.14.4/drivers/remoteproc/
Dimx_rproc.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/firmware/imx/rsrc.h>
7 #include <linux/arm-smccc.h>
75 * struct imx_rproc_mem - slim internal memory structure
122 /* TCM CODE NON-SECURE */
128 /* TCM SYS NON-SECURE*/
179 /* QSPI Code - alias */
181 /* DDR (Code) - alias */
185 /* OCRAM_S - alias */
199 /* TCML - alias */
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/linux-6.14.4/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-[email protected]
88 F: drivers/scsi/3w-*
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