Searched +full:imx6q +full:- +full:gpc (Results 1 – 19 of 19) sorted by relevance
/linux-6.14.4/Documentation/devicetree/bindings/power/ |
D | fsl,imx-gpc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/power/fsl,imx-gpc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Philipp Zabel <[email protected]> 13 The i.MX6 General Power Control (GPC) block contains DVFS load tracking 17 Documentation/devicetree/bindings/power/power-domain.yaml. They are 18 described as subnodes of the power gating controller 'pgc' node of the GPC. 20 IP cores belonging to a power domain should contain a 'power-domains' 27 - enum: [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/pci/ |
D | fsl,imx6q-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lucas Stach <[email protected]> 11 - Richard Zhu <[email protected]> 15 and thus inherits all the common properties defined in snps,dw-pcie.yaml. 19 See fsl,imx6q-pcie-ep.yaml for details on the Endpoint mode device tree 25 - fsl,imx6q-pcie 26 - fsl,imx6sx-pcie [all …]
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/linux-6.14.4/arch/arm/boot/dts/nxp/imx/ |
D | imx6qp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 5 #include "imx6q.dtsi" 10 compatible = "mmio-sram"; 13 #address-cells = <1>; 14 #size-cells = <1>; 19 compatible = "mmio-sram"; 22 #address-cells = <1>; 23 #size-cells = <1>; 29 compatible = "fsl,imx6qp-pre"; 33 clock-names = "axi"; [all …]
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D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx6qdl-clock.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 * pre-existing /chosen node to be available to insert the 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <32768>; [all …]
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D | imx6ul.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6ul-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6ul-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 57 #address-cells = <1>; [all …]
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D | imx6sx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6sx-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6sx-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 60 #address-cells = <1>; [all …]
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D | imx6sl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6sl-pinfunc.h" 7 #include <dt-bindings/clock/imx6sl-clock.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 50 #address-cells = <1>; 51 #size-cells = <0>; 54 compatible = "arm,cortex-a9"; [all …]
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D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright 2017-2018 NXP. 8 #include <dt-bindings/clock/imx6sll-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include "imx6sll-pinfunc.h" 14 #address-cells = <1>; 15 #size-cells = <1>; 46 #address-cells = <1>; 47 #size-cells = <0>; [all …]
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D | imx7s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/clock/imx7d-clock.h> 7 #include <dt-bindings/power/imx7-power.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/reset/imx7-reset.h> 12 #include "imx7d-pinfunc.h" 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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/linux-6.14.4/arch/arm/mach-imx/ |
D | pm-imx6.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright 2011-2014 Freescale Semiconductor, Inc. 13 #include <linux/irqchip/arm-gic.h> 15 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> 24 #include <asm/proc-fns.h> 147 0x27c, 0x498, 0x4a4, 0x490, /* SDCLK0, GPR_B0DS-B1DS, GPR_ADDS */ 153 .mmdc_compat = "fsl,imx6q-mmdc", 154 .src_compat = "fsl,imx6q-src", 155 .iomuxc_compat = "fsl,imx6q-iomuxc", 156 .gpc_compat = "fsl,imx6q-gpc", [all …]
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D | gpc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright 2011-2013 Freescale Semiconductor, Inc. 67 /* Tell GPC to power off ARM core when suspend */ in imx_gpc_pre_suspend() 82 /* Keep ARM core powered on for other low-power modes */ in imx_gpc_post_resume() 91 unsigned int idx = d->hwirq / 32; in imx_gpc_irq_set_wake() 94 mask = 1 << d->hwirq % 32; in imx_gpc_irq_set_wake() 100 * wake-up facility... in imx_gpc_irq_set_wake() 149 imx_gpc_hwirq_unmask(d->hwirq); in imx_gpc_irq_unmask() 155 imx_gpc_hwirq_mask(d->hwirq); in imx_gpc_irq_mask() 160 .name = "GPC", [all …]
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D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-y := cpu.o system.o irq-common.o 4 obj-$(CONFIG_SOC_IMX25) += cpu-imx25.o mach-imx25.o pm-imx25.o 6 obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o mach-imx27.o 8 obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o mach-imx31.o 9 obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o mach-imx35.o 11 imx5-pm-$(CONFIG_PM) += pm-imx5.o 12 obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o $(imx5-pm-y) 14 obj-$(CONFIG_MXC_TZIC) += tzic.o 15 obj-$(CONFIG_MXC_AVIC) += avic.o [all …]
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D | suspend-imx6.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 8 #include <asm/asm-offsets.h> 9 #include <asm/hardware/cache-l2x0.h> 12 .arch armv7-a 38 * which defined in arch/arm/mach-imx/pm-imx6q.c, this 135 /* let DDR out of self-refresh */ 190 * put DDR explicitly into self-refresh and 197 /* make the DDR explicitly enter self-refresh. */ 234 * mask all GPC interrupts before 269 /* unmask all the GPC interrupts. */ [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/soc/imx/ |
D | fsl,imx-anatop.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx-anatop.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Guo <[email protected]> 11 - Sascha Hauer <[email protected]> 16 - items: 17 - enum: 18 - fsl,imx6sl-anatop 19 - fsl,imx6sll-anatop [all …]
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/linux-6.14.4/drivers/pmdomain/imx/ |
D | gpc.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2015-2017 Pengutronix, Lucas Stach <[email protected]> 4 * Copyright 2011-2013 Freescale Semiconductor, Inc. 67 regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PDNSCR_OFFS, &val); in imx6_pm_domain_power_off() 72 regmap_update_bits(pd->regmap, pd->reg_offs + GPC_PGC_CTRL_OFFS, in imx6_pm_domain_power_off() 75 /* Request GPC to power down domain */ in imx6_pm_domain_power_off() 76 val = BIT(pd->cntr_pdn_bit); in imx6_pm_domain_power_off() 77 regmap_update_bits(pd->regmap, GPC_CNTR, val, val); in imx6_pm_domain_power_off() 80 udelay(DIV_ROUND_UP(iso + iso2sw, pd->ipg_rate_mhz)); in imx6_pm_domain_power_off() 82 if (pd->supply) in imx6_pm_domain_power_off() [all …]
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/linux-6.14.4/arch/arm64/boot/dts/freescale/ |
D | imx8mn.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mn-clock.h> 7 #include <dt-bindings/power/imx8mn-power.h> 8 #include <dt-bindings/reset/imx8mq-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mn-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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D | imx8mm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mm-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/imx8mm-power.h> 11 #include <dt-bindings/reset/imx8mq-reset.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mm-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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D | imx8mq.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <[email protected]> 7 #include <dt-bindings/clock/imx8mq-clock.h> 8 #include <dt-bindings/power/imx8mq-power.h> 9 #include <dt-bindings/reset/imx8mq-reset.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include "dt-bindings/input/input.h" 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/interconnect/imx8mq.h> [all …]
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D | imx8mp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mp-clock.h> 7 #include <dt-bindings/power/imx8mp-power.h> 8 #include <dt-bindings/reset/imx8mp-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interconnect/fsl,imx8mp.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 15 #include "imx8mp-pinfunc.h" [all …]
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