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/linux-6.14.4/Documentation/devicetree/bindings/mmc/
Dhisilicon,hi3798cv200-dw-mshc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/hisilicon,hi3798cv200-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yang Xiwen <[email protected]>
15 - hisilicon,hi3798cv200-dw-mshc
16 - hisilicon,hi3798mv200-dw-mshc
26 - description: bus interface unit clock
27 - description: card interface unit clock
28 - description: card input sample phase clock
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/linux-6.14.4/drivers/mmc/host/
Ddw_mmc-hi3798cv200.c1 // SPDX-License-Identifier: GPL-2.0
17 #include "dw_mmc-pltfm.h"
28 struct hi3798cv200_priv *priv = host->priv; in dw_mci_hi3798cv200_set_ios()
32 if (ios->timing == MMC_TIMING_MMC_DDR52 || in dw_mci_hi3798cv200_set_ios()
33 ios->timing == MMC_TIMING_UHS_DDR50) in dw_mci_hi3798cv200_set_ios()
40 if (ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_hi3798cv200_set_ios()
47 if (ios->timing == MMC_TIMING_MMC_HS400) in dw_mci_hi3798cv200_set_ios()
53 if (ios->timing == MMC_TIMING_MMC_HS || in dw_mci_hi3798cv200_set_ios()
54 ios->timing == MMC_TIMING_LEGACY) in dw_mci_hi3798cv200_set_ios()
55 clk_set_phase(priv->drive_clk, 180); in dw_mci_hi3798cv200_set_ios()
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Ddw_mmc-hi3798mv200.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Modified from dw_mmc-hi3798cv200.c
18 #include "dw_mmc-pltfm.h"
38 struct dw_mci_hi3798mv200_priv *priv = host->priv; in dw_mci_hi3798mv200_set_ios()
39 struct mmc_clk_phase phase = priv->phase_map.phase[ios->timing]; in dw_mci_hi3798mv200_set_ios()
43 if (ios->timing == MMC_TIMING_MMC_DDR52 in dw_mci_hi3798mv200_set_ios()
44 || ios->timing == MMC_TIMING_UHS_DDR50) in dw_mci_hi3798mv200_set_ios()
51 if (ios->timing == MMC_TIMING_MMC_HS400) in dw_mci_hi3798mv200_set_ios()
57 if (clk_set_rate(host->ciu_clk, ios->clock)) in dw_mci_hi3798mv200_set_ios()
58 dev_warn(host->dev, "Failed to set rate to %u\n", ios->clock); in dw_mci_hi3798mv200_set_ios()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
94 implements a hardware byte swapper using a 32-bit datum.
106 support UHS2-capable devices.
133 disabled, it will steal the MMC cards away - rendering them
242 tristate "SDHCI OF support for the Synopsys DWC MSHC"
505 MOXA provides one multi-functional card reader which can
506 be found on some embedded hardware such as UC-7112-LX.
557 of Alcor Micro PCI-E card reader
701 tristate "DMA for SDHI SD/SDIO controllers using SYS-DMAC"
706 using SYS-DMAC via DMA Engine. This supports the controllers
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/linux-6.14.4/arch/arm64/boot/dts/hisilicon/
Dhi3798cv200.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * DTS File for HiSilicon Hi3798cv200 SoC.
5 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
8 #include <dt-bindings/clock/histb-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/reset/ti-syscon.h>
15 compatible = "hisilicon,hi3798cv200";
16 interrupt-parent = <&gic>;
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