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/linux-6.14.4/arch/arm64/boot/dts/exynos/google/
Dgs101.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * GS101 SoC
5 * Copyright 2019-2023 Google LLC
6 * Copyright 2023 Linaro Ltd - <[email protected]>
9 #include <dt-bindings/clock/google,gs101.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/soc/samsung,exynos-usi.h>
15 compatible = "google,gs101";
16 #address-cells = <2>;
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Dgs101-oriole.dts1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2021-2023 Google LLC
6 * Copyright 2023 Linaro Ltd - <[email protected]>
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/usb/pd.h>
14 #include "gs101-pinctrl.h"
15 #include "gs101.dtsi"
19 compatible = "google,gs101-oriole", "google,gs101";
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/linux-6.14.4/Documentation/devicetree/bindings/serial/
Dsamsung_uart.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C, S5P, Exynos, and S5L (Apple SoC) SoC UART Controller
10 - Krzysztof Kozlowski <[email protected]>
11 - Greg Kroah-Hartman <[email protected]>
14 Each Samsung UART should have an alias correctly numbered in the "aliases"
15 node, according to serialN format, where N is the port number (non-negative
21 - enum:
22 - apple,s5l-uart
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/linux-6.14.4/Documentation/devicetree/bindings/soc/samsung/
Dexynos-usi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sam Protsenko <[email protected]>
11 - Krzysztof Kozlowski <[email protected]>
14 USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
17 child nodes, each representing a serial sub-node device. The mode setting
22 pattern: "^usi@[0-9a-f]+$"
26 - items:
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/linux-6.14.4/drivers/tty/serial/
Dsamsung_tty.c1 // SPDX-License-Identifier: GPL-2.0
5 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
12 * UERSTAT register in the UART blocks, and keeps marking some of the
21 * BJD, 04-Nov-2004
28 #include <linux/dma-mapping.h>
48 /* UART name and device definitions */
91 /* uart port features */
165 #define portaddr(port, reg) ((port)->membase + (reg))
167 ((unsigned long *)(unsigned long)((port)->membase + (reg)))
171 switch (port->iotype) { in rd_reg()
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/linux-6.14.4/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-[email protected]
88 F: drivers/scsi/3w-*
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