Searched +full:gce +full:- +full:mailbox (Results 1 – 13 of 13) sorted by relevance
/linux-6.14.4/Documentation/devicetree/bindings/mailbox/ |
D | mediatek,gce-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mailbox/mediatek,gce-props.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Houlong Wei <[email protected]> 13 The Global Command Engine (GCE) is an instruction based, multi-threaded, 14 single-core command dispatcher for MediaTek hardware. The Command Queue 15 (CMDQ) mailbox driver is a driver for GCE, implemented using the Linux 16 mailbox framework. It is used to receive messages from mailbox consumers 17 and configure GCE to execute the specified instruction set in the message. [all …]
|
D | mediatek,gce-mailbox.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mailbox/mediatek,gce-mailbox.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Mediatek Global Command Engine Mailbox 10 - Houlong Wei <[email protected]> 13 The Global Command Engine (GCE) is used to help read/write registers with 15 vblank. The GCE can be used to implement the Command Queue (CMDQ) driver. 20 - enum: 21 - mediatek,mt6779-gce [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/arm/mediatek/ |
D | mediatek,mmsys.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matthias Brugger <[email protected]> 18 pattern: "^syscon@[0-9a-f]+$" 22 - items: 23 - enum: 24 - mediatek,mt2701-mmsys 25 - mediatek,mt2712-mmsys 26 - mediatek,mt6765-mmsys [all …]
|
/linux-6.14.4/include/linux/soc/mediatek/ |
D | mtk-cmdq.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 11 #include <linux/mailbox/mtk-cmdq-mailbox.h> 19 * so there are 4 * N (threads) SPRs in GCE that shares the same indexes below. 67 * cmdq_dev_get_client_reg() - parse cmdq client reg from the device 69 * @dev: device of CMDQ mailbox client 82 * cmdq_mbox_create() - create CMDQ mailbox client and channel 83 * @dev: device of CMDQ mailbox client 84 * @index: index of CMDQ mailbox channel 86 * Return: CMDQ mailbox client pointer 91 * cmdq_mbox_destroy() - destroy CMDQ mailbox client and channel [all …]
|
/linux-6.14.4/drivers/mailbox/ |
D | mtk-cmdq-mailbox.c | 1 // SPDX-License-Identifier: GPL-2.0 7 #include <linux/clk-provider.h> 8 #include <linux/dma-mapping.h> 18 #include <linux/mailbox/mtk-cmdq-mailbox.h> 24 #define CMDQ_NUM_CMD(t) (t->cmd_buf_size / CMDQ_INST_SIZE) 73 struct cmdq_pkt *pkt; /* the packet sent from mailbox client */ 97 WARN_ON(clk_bulk_enable(cmdq->pdata->gce_num, cmdq->clocks)); in cmdq_sw_ddr_enable() 100 writel(GCE_DDR_EN | GCE_CTRL_BY_SW, cmdq->base + GCE_GCTL_VALUE); in cmdq_sw_ddr_enable() 102 writel(GCE_CTRL_BY_SW, cmdq->base + GCE_GCTL_VALUE); in cmdq_sw_ddr_enable() 104 clk_bulk_disable(cmdq->pdata->gce_num, cmdq->clocks); in cmdq_sw_ddr_enable() [all …]
|
/linux-6.14.4/arch/arm64/boot/dts/mediatek/ |
D | mt8188.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 7 /dts-v1/; 8 #include <dt-bindings/clock/mediatek,mt8188-clk.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/mailbox/mediatek,mt8188-gce.h> 12 #include <dt-bindings/memory/mediatek,mt8188-memory-port.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h> 15 #include <dt-bindings/power/mediatek,mt8188-power.h> [all …]
|
D | mt6795.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/clock/mediatek,mt6795-clk.h> 12 #include <dt-bindings/gce/mediatek,mt6795-gce.h> 13 #include <dt-bindings/memory/mt6795-larb-port.h> 14 #include <dt-bindings/pinctrl/mt6795-pinfunc.h> 15 #include <dt-bindings/power/mt6795-power.h> 16 #include <dt-bindings/reset/mediatek,mt6795-resets.h> 20 interrupt-parent = <&sysirq>; [all …]
|
D | mt8195.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8195-clk.h> 9 #include <dt-bindings/gce/mt8195-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8195-memory-port.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h> 15 #include <dt-bindings/power/mt8195-power.h> [all …]
|
D | mt8186.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 * Author: Allen-KH Cheng <allen-[email protected]> 6 /dts-v1/; 7 #include <dt-bindings/clock/mt8186-clk.h> 8 #include <dt-bindings/gce/mt8186-gce.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/memory/mt8186-memory-port.h> 12 #include <dt-bindings/pinctrl/mt8186-pinfunc.h> 13 #include <dt-bindings/power/mt8186-power.h> [all …]
|
D | mt8173.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <dt-bindings/clock/mt8173-clk.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/memory/mt8173-larb-port.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/power/mt8173-power.h> 13 #include <dt-bindings/reset/mt8173-resets.h> 14 #include <dt-bindings/gce/mt8173-gce.h> 15 #include <dt-bindings/thermal/thermal.h> [all …]
|
D | mt8183.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/clock/mt8183-clk.h> 9 #include <dt-bindings/gce/mt8183-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8183-larb-port.h> 13 #include <dt-bindings/power/mt8183-power.h> 14 #include <dt-bindings/reset/mt8183-resets.h> 15 #include <dt-bindings/phy/phy.h> 16 #include <dt-bindings/thermal/thermal.h> [all …]
|
D | mt8192.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8192-clk.h> 9 #include <dt-bindings/gce/mt8192-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8192-larb-port.h> 13 #include <dt-bindings/pinctrl/mt8192-pinfunc.h> 14 #include <dt-bindings/phy/phy.h> 15 #include <dt-bindings/power/mt8192-power.h> [all …]
|
/linux-6.14.4/drivers/gpu/drm/mediatek/ |
D | mtk_crtc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <linux/dma-mapping.h> 11 #include <linux/soc/mediatek/mtk-cmdq.h> 12 #include <linux/soc/mediatek/mtk-mmsys.h> 13 #include <linux/soc/mediatek/mtk-mutex.h> 29 * struct mtk_crtc - MediaTek specific crtc structure. 97 struct drm_crtc *crtc = &mtk_crtc->base; in mtk_crtc_finish_page_flip() 100 if (mtk_crtc->event) { in mtk_crtc_finish_page_flip() 101 spin_lock_irqsave(&crtc->dev->event_lock, flags); in mtk_crtc_finish_page_flip() 102 drm_crtc_send_vblank_event(crtc, mtk_crtc->event); in mtk_crtc_finish_page_flip() [all …]
|