| /linux-6.14.4/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | mpc5200.txt | 2 ----------------------------
4 (c) 2006-2009 Secret Lab Technologies Ltd
8 ------------------
9 For mpc5200 on-chip devices, the format for each compatible value is
10 <chip>-<device>[-<mode>]. The OS should be able to match a device driver
21 "fsl,mpc5200-<device>".
29 compatible = "fsl,mpc5200b-<device>","fsl,mpc5200-<device>";
34 ie. ethernet on mpc5200: compatible = "fsl,mpc5200-fec";
35 ethernet on mpc5200b: compatible = "fsl,mpc5200b-fec", "fsl,mpc5200-fec";
39 "fsl,mpc5200-psc-i2s", not "fsl,mpc5200-i2s". This convention is chosen to
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| /linux-6.14.4/Documentation/devicetree/bindings/pinctrl/ |
| D | aspeed,ast2500-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-or-later
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2500-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Jeffery <[email protected]>
16 - compatible: Should be one of the following:
17 "aspeed,ast2500-scu", "syscon", "simple-mfd"
18 "aspeed,g5-scu", "syscon", "simple-mfd"
25 const: aspeed,ast2500-pinctrl
29 aspeed,external-nodes:
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| D | samsung,pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <[email protected]>
11 - Sylwester Nawrocki <[email protected]>
12 - Tomasz Figa <[email protected]>
18 All the pin controller nodes should be represented in the aliases node using
22 - External GPIO interrupts (see interrupts property in pin controller node);
24 - External wake-up interrupts - multiplexed (capable of waking up the system
25 see interrupts property in external wake-up interrupt controller node -
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| /linux-6.14.4/Documentation/devicetree/bindings/clock/ |
| D | samsung,exynosautov920-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynosautov920-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sunyeal Hong <[email protected]>
11 - Chanwoo Choi <[email protected]>
12 - Krzysztof Kozlowski <[email protected]>
13 - Sylwester Nawrocki <[email protected]>
18 tree nodes, and might depend on each other. Root clocks in that clock tree are
19 two external clocks:: OSCCLK/XTCXO (38.4 MHz) and RTCCLK/XrtcXTI (32768 Hz).
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| D | samsung,exynos990-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynos990-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Igor Belwon <[email protected]>
11 - Chanwoo Choi <[email protected]>
12 - Krzysztof Kozlowski <[email protected]>
17 tree nodes, and might depend on each other. The root clock in that root tree
18 is an external clock: OSCCLK (26 MHz). This external clock must be defined
19 as a fixed-rate clock in dts.
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| D | samsung,exynosautov9-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynosautov9-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chanho Park <[email protected]>
11 - Chanwoo Choi <[email protected]>
12 - Krzysztof Kozlowski <[email protected]>
13 - Sylwester Nawrocki <[email protected]>
14 - Tomasz Figa <[email protected]>
19 tree nodes, and might depend on each other. Root clocks in that clock tree are
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| D | samsung,exynos850-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynos850-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sam Protsenko <[email protected]>
11 - Chanwoo Choi <[email protected]>
12 - Krzysztof Kozlowski <[email protected]>
13 - Sylwester Nawrocki <[email protected]>
14 - Tomasz Figa <[email protected]>
19 tree nodes, and might depend on each other. Root clocks in that clock tree are
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| D | google,gs101-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/google,gs101-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Griffin <[email protected]>
15 tree nodes, and might depend on each other. The root clock in that clock tree
16 is OSCCLK (24.576 MHz). That external clock must be defined as a fixed-rate
19 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
22 Each clock is assigned an identifier and client nodes can use this identifier
24 in clock consumer nodes are defined as preprocessor macros in
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| D | samsung,exynos7885-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynos7885-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dávid Virág <[email protected]>
11 - Chanwoo Choi <[email protected]>
12 - Krzysztof Kozlowski <[email protected]>
13 - Sylwester Nawrocki <[email protected]>
14 - Tomasz Figa <[email protected]>
19 tree nodes, and might depend on each other. The root clock in that root tree
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| D | samsung,exynos8895-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynos8895-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ivaylo Ivanov <[email protected]>
11 - Chanwoo Choi <[email protected]>
12 - Krzysztof Kozlowski <[email protected]>
17 tree nodes, and might depend on each other. The root clock in that root tree
18 is an external clock: OSCCLK (26 MHz). This external clock must be defined
19 as a fixed-rate clock in dts.
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| D | rockchip,rk3368-cru.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 ---
4 $id: http://devicetree.org/schemas/clock/rockchip,rk3368-cru.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <[email protected]>
17 Each clock is assigned an identifier and client nodes can use this identifier
19 preprocessor macros in the dt-bindings/clock/rk3368-cru.h headers and can be
24 clock-output-names:
25 - "xin24m" - crystal input - required
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| D | rockchip,rv1108-cru.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 ---
4 $id: http://devicetree.org/schemas/clock/rockchip,rv1108-cru.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <[email protected]>
17 Each clock is assigned an identifier and client nodes can use this identifier
19 preprocessor macros in the dt-bindings/clock/rv1108-cru.h headers and can be
24 clock-output-names:
25 - "xin24m" - crystal input - required
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| D | rockchip,rk3288-cru.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 ---
4 $id: http://devicetree.org/schemas/clock/rockchip,rk3288-cru.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <[email protected]>
19 different so another dt-compatible is available. Noticed that it is only
23 Each clock is assigned an identifier and client nodes can use this identifier
25 preprocessor macros in the dt-bindings/clock/rk3288-cru.h headers and can be
31 clock-output-names:
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| D | rockchip,rk3188-cru.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/rockchip,rk3188-cru.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <[email protected]>
17 Each clock is assigned an identifier and client nodes can use this identifier
19 preprocessor macros in the dt-bindings/clock/rk3188-cru.h and
20 dt-bindings/clock/rk3066-cru.h headers and can be used in device tree sources.
24 clock-output-names:
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|
| /linux-6.14.4/Documentation/devicetree/bindings/mfd/ |
| D | as3722.txt | 4 -------------------
5 - compatible: Must be "ams,as3722".
6 - reg: I2C device address.
7 - interrupt-controller: AS3722 has internal interrupt controller which takes the
8 interrupt request from internal sub-blocks like RTC, regulators, GPIOs as well
9 as external input.
10 - #interrupt-cells: Should be set to 2 for IRQ number and flags.
12 of AS3722 are defined at dt-bindings/mfd/as3722.h
14 interrupts.txt, using dt-bindings/irq.
17 --------------------
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| D | twl4030-audio.txt | 7 - compatible : must be "ti,twl4030-audio"
9 Optional properties, nodes:
12 - codec { }: Need to be present if the audio functionality is used. Within this
14 - ti,digimic_delay: Delay need after enabling the digimic to reduce artifacts
16 -ti,ramp_delay_value: HS ramp delay configuration to reduce pop noise
17 -ti,hs_extmute: Use external mute for HS pop reduction
18 -ti,hs_extmute_gpio: Use external GPIO to control the external mute
19 -ti,offset_cncl_path: Offset cancellation path selection, refer to TRM for the
23 - ti,enable-vibra: Need to be set to <1> if the vibra functionality is used. if
28 clock-frequency = <2600000>;
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| /linux-6.14.4/Documentation/devicetree/bindings/regulator/ |
| D | lp872x.txt | 4 - compatible: "ti,lp8720" or "ti,lp8725"
5 - reg: I2C slave address. 0x7d = LP8720, 0x7a = LP8725
8 - ti,general-config: the value of LP872X_GENERAL_CFG register (u8)
10 bit[2]: BUCK output voltage control by external DVS pin or register
11 1 = external pin, 0 = bit7 of register 08h
12 bit[1]: sleep control by external DVS pin or register
13 1 = external pin, 0 = bit6 of register 08h
20 bit[2]: BUCK1 output voltage control by external DVS pin or register
27 - ti,update-config: define it when LP872X_GENERAL_CFG register should be set
28 - ti,dvs-gpio: GPIO specifier for external DVS pin control of LP872x devices.
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| D | as3722-regulator.txt | 5 --------------------
7 regulator node. The AS3722 is having 7 DCDC step-down regulators as
8 sd[0-6], 10 LDOs as ldo[0-7], ldo[9-11]. The input supply of these
10 vsup-sd2-supply: Input supply for SD2.
11 vsup-sd3-supply: Input supply for SD3.
12 vsup-sd4-supply: Input supply for SD4.
13 vsup-sd5-supply: Input supply for SD5.
14 vin-ldo0-supply: Input supply for LDO0.
15 vin-ldo1-6-supply: Input supply for LDO1 and LDO6.
16 vin-ldo2-5-7-supply: Input supply for LDO2, LDO5 and LDO7.
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| D | palmas-pmic.txt | 11 - compatible : Should be from the list
12 ti,twl6035-pmic
13 ti,twl6036-pmic
14 ti,twl6037-pmic
15 ti,tps65913-pmic
16 ti,tps65914-pmic
17 ti,tps65917-pmic
18 ti,tps659038-pmic
20 ti,palmas-pmic
21 - interrupts : The interrupt number and the type which can be looked up here:
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| /linux-6.14.4/Documentation/core-api/ |
| D | maple_tree.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
13 The Maple Tree is a B-Tree data type which is optimized for storing
14 non-overlapping ranges, including ranges of size 1. The tree was designed to
17 entry in a cache-efficient manner. The tree can also be put into an RCU-safe
20 the lock to an external lock of a different type.
24 use the normal API. An :ref:`maple-tree-advanced-api` exists for more complex
34 :ref:`maple-tree-advanced-api`, but are blocked by the normal API.
39 Pre-allocating of nodes is also supported using the
40 :ref:`maple-tree-advanced-api`. This is useful for users who must guarantee a
42 code segment when allocating cannot be done. Allocations of nodes are
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| /linux-6.14.4/fs/hpfs/ |
| D | anode.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Mikulas Patocka ([email protected]), 1998-1999
18 anode_secno a = -1; in hpfs_bplus_lookup()
23 if (hpfs_sb(s)->sb_chk) if (hpfs_stop_cycles(s, a, &c1, &c2, "hpfs_bplus_lookup")) return -1; in hpfs_bplus_lookup()
25 for (i = 0; i < btree->n_used_nodes; i++) in hpfs_bplus_lookup()
26 if (le32_to_cpu(btree->u.internal[i].file_secno) > sec) { in hpfs_bplus_lookup()
27 a = le32_to_cpu(btree->u.internal[i].down); in hpfs_bplus_lookup()
29 if (!(anode = hpfs_map_anode(s, a, &bh))) return -1; in hpfs_bplus_lookup()
30 btree = &anode->btree; in hpfs_bplus_lookup()
35 return -1; in hpfs_bplus_lookup()
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| /linux-6.14.4/drivers/interconnect/mediatek/ |
| D | icc-emi.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * MediaTek External Memory Interface (EMI) Interconnect driver
11 #include <linux/interconnect-provider.h>
18 #include "icc-emi.h"
23 struct mtk_icc_node *in = node->data; in mtk_emi_icc_aggregate()
28 in->sum_avg = *agg_avg; in mtk_emi_icc_aggregate()
29 in->max_peak = *agg_peak; in mtk_emi_icc_aggregate()
36 struct mtk_icc_node *node = dst->data; in mtk_emi_icc_set()
40 if (unlikely(!src->provider)) in mtk_emi_icc_set()
41 return -EINVAL; in mtk_emi_icc_set()
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| /linux-6.14.4/Documentation/devicetree/bindings/media/ |
| D | video-interfaces.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/video-interfaces.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sakari Ailus <[email protected]>
11 - Laurent Pinchart <[email protected]>
14 Video data pipelines usually consist of external devices, e.g. camera sensors,
18 SoC internal blocks are described by DT nodes, placed similarly to other SoC
19 blocks. External devices are represented as child nodes of their respective
20 bus controller nodes, e.g. I2C.
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| /linux-6.14.4/Documentation/devicetree/bindings/bus/ |
| D | nvidia,tegra20-gmi.txt | 4 external memory. Can be used to attach various high speed devices such as
7 The actual devices are instantiated from the child nodes of a GMI node.
10 - compatible : Should contain one of the following:
11 For Tegra20 must contain "nvidia,tegra20-gmi".
12 For Tegra30 must contain "nvidia,tegra30-gmi".
13 - reg: Should contain GMI controller registers location and length.
14 - clocks: Must contain an entry for each entry in clock-names.
15 - clock-names: Must include the following entries: "gmi"
16 - resets : Must contain an entry for each entry in reset-names.
17 - reset-names : Must include the following entries: "gmi"
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| /linux-6.14.4/Documentation/admin-guide/perf/ |
| D | arm-cmn.rst | 5 CMN-600 is a configurable mesh interconnect consisting of a rectangular
11 counts up to 4 event signals from the connected device nodes and/or the
17 ----------
20 see /sys/bus/event_source/devices/arm_cmn_0. Multi-chip systems may link
21 more than one CMN together via external CCIX links - in this situation,
26 definitions - "type" selects the respective node type, and "eventid" the
30 * Since RN-D nodes do not have any distinct events from RN-I nodes, they
42 By default each event provides an aggregate count over all nodes of the
48 -----------
61 REQ or SNP channel, it can be specified as two events - one for each
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|