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/linux-6.14.4/include/net/netfilter/
Dnf_tables_core.h1 /* SPDX-License-Identifier: GPL-2.0 */
98 const u32 *key, const struct nft_set_ext **ext);
100 const u32 *key, const struct nft_set_ext **ext);
102 const u32 *key, const struct nft_set_ext **ext);
105 const u32 *key, const struct nft_set_ext **ext);
107 const u32 *key, const struct nft_set_ext **ext);
109 const u32 *key, const struct nft_set_ext **ext);
113 const u32 *key, const struct nft_set_ext **ext) in nft_set_do_lookup() argument
115 return set->ops->lookup(net, set, key, ext); in nft_set_do_lookup()
121 const u32 *key, const struct nft_set_ext **ext);
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Dnf_tables.h1 /* SPDX-License-Identifier: GPL-2.0 */
42 return pkt->state->sk; in nft_sk()
47 return pkt->thoff; in nft_thoff()
52 return pkt->state->net; in nft_net()
57 return pkt->state->hook; in nft_hook()
62 return pkt->state->pf; in nft_pf()
67 return pkt->state->in; in nft_in()
72 return pkt->state->out; in nft_out()
79 pkt->skb = skb; in nft_set_pktinfo()
80 pkt->state = state; in nft_set_pktinfo()
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/linux-6.14.4/arch/s390/kernel/
Dirq.c1 // SPDX-License-Identifier: GPL-2.0
24 #include <linux/entry-common.h>
56 {.irq = EXT_INTERRUPT, .name = "EXT"},
67 {.irq = IRQEXT_CLK, .name = "CLK", .desc = "[EXT] Clock Comparator"},
68 {.irq = IRQEXT_EXC, .name = "EXC", .desc = "[EXT] External Call"},
69 {.irq = IRQEXT_EMS, .name = "EMS", .desc = "[EXT] Emergency Signal"},
70 {.irq = IRQEXT_TMR, .name = "TMR", .desc = "[EXT] CPU Timer"},
71 {.irq = IRQEXT_TLA, .name = "TAL", .desc = "[EXT] Timing Alert"},
72 {.irq = IRQEXT_PFL, .name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
73 {.irq = IRQEXT_DSD, .name = "DSD", .desc = "[EXT] DASD Diag"},
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/linux-6.14.4/tools/testing/selftests/kvm/riscv/
Dget-reg-list.c1 // SPDX-License-Identifier: GPL-2.0
32 * Based on above, we should filter-out all ISA_EXT registers. in filter_reg()
156 * if they were available in the risc-v host. in finalize_vcpu()
166 TEST_ASSERT(!rc || (rc == -1 && errno == ENOENT), "Unexpected error"); in finalize_vcpu()
170 if (!s->feature) in finalize_vcpu()
173 switch (s->feature_type) { in finalize_vcpu()
175 feature = RISCV_ISA_EXT_REG(s->feature); in finalize_vcpu()
178 feature = RISCV_SBI_EXT_REG(s->feature); in finalize_vcpu()
189 "%s not available, skipping tests", s->name); in finalize_vcpu()
228 case KVM_REG_RISCV_CORE_REG(regs.pc): in core_id_to_str()
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/linux-6.14.4/net/netfilter/
Dnft_lookup.c1 // SPDX-License-Identifier: GPL-2.0-only
29 const u32 *key, const struct nft_set_ext **ext) in nft_set_do_lookup() argument
31 if (set->ops == &nft_set_hash_fast_type.ops) in nft_set_do_lookup()
32 return nft_hash_lookup_fast(net, set, key, ext); in nft_set_do_lookup()
33 if (set->ops == &nft_set_hash_type.ops) in nft_set_do_lookup()
34 return nft_hash_lookup(net, set, key, ext); in nft_set_do_lookup()
36 if (set->ops == &nft_set_rhash_type.ops) in nft_set_do_lookup()
37 return nft_rhash_lookup(net, set, key, ext); in nft_set_do_lookup()
39 if (set->ops == &nft_set_bitmap_type.ops) in nft_set_do_lookup()
40 return nft_bitmap_lookup(net, set, key, ext); in nft_set_do_lookup()
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Dnft_dynset.c1 // SPDX-License-Identifier: GPL-2.0-only
30 const struct nft_set_ext *ext) in nft_dynset_expr_setup() argument
32 struct nft_set_elem_expr *elem_expr = nft_set_ext_expr(ext); in nft_dynset_expr_setup()
36 for (i = 0; i < priv->num_exprs; i++) { in nft_dynset_expr_setup()
37 expr = nft_setelem_expr_at(elem_expr, elem_expr->size); in nft_dynset_expr_setup()
38 if (nft_expr_clone(expr, priv->expr_array[i], GFP_ATOMIC) < 0) in nft_dynset_expr_setup()
39 return -1; in nft_dynset_expr_setup()
41 elem_expr->size += priv->expr_array[i]->ops->size; in nft_dynset_expr_setup()
49 struct nft_regs *regs) in nft_dynset_new() argument
52 struct nft_set_ext *ext; in nft_dynset_new() local
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Dnft_objref.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2012-2016 Pablo Neira Ayuso <[email protected]>
17 struct nft_regs *regs, in nft_objref_eval() argument
22 obj->ops->eval(obj, regs, pkt); in nft_objref_eval()
30 u8 genmask = nft_genmask_next(ctx->net); in nft_objref_init()
35 return -EINVAL; in nft_objref_init()
38 obj = nft_obj_lookup(ctx->net, ctx->table, in nft_objref_init()
42 return -ENOENT; in nft_objref_init()
44 if (!nft_use_inc(&obj->use)) in nft_objref_init()
45 return -EMFILE; in nft_objref_init()
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Dnft_set_hash.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2008-2014 Patrick McHardy <[email protected]>
34 struct nft_set_ext ext; member
48 return jhash(arg->key, len, seed); in nft_rhash_key()
55 return jhash(nft_set_ext_key(&he->ext), len, seed); in nft_rhash_obj()
61 const struct nft_rhash_cmp_arg *x = arg->key; in nft_rhash_cmp()
64 if (memcmp(nft_set_ext_key(&he->ext), x->key, x->set->klen)) in nft_rhash_cmp()
66 if (nft_set_elem_is_dead(&he->ext)) in nft_rhash_cmp()
68 if (__nft_set_elem_expired(&he->ext, x->tstamp)) in nft_rhash_cmp()
70 if (!nft_set_elem_active(&he->ext, x->genmask)) in nft_rhash_cmp()
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/linux-6.14.4/arch/mips/kernel/
Dsignal.c7 * Copyright (C) 1994 - 2000 Ralf Baechle
37 #include <asm/cpu-features.h>
43 #include "signal-common.h"
73 struct mips_abi *abi = current->thread.abi; in copy_fp_to_sigcontext()
74 uint64_t __user *fpregs = sc + abi->off_sc_fpregs; in copy_fp_to_sigcontext()
75 uint32_t __user *csr = sc + abi->off_sc_fpc_csr; in copy_fp_to_sigcontext()
82 __put_user(get_fpr64(&current->thread.fpu.fpr[i], 0), in copy_fp_to_sigcontext()
85 err |= __put_user(current->thread.fpu.fcr31, csr); in copy_fp_to_sigcontext()
92 struct mips_abi *abi = current->thread.abi; in copy_fp_from_sigcontext()
93 uint64_t __user *fpregs = sc + abi->off_sc_fpregs; in copy_fp_from_sigcontext()
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Dmips-r2-to-r6-emul.c28 #include <asm/mips-r2-to-r6-emul.h>
37 #define EXT "dext " macro
41 #define EXT "ext " macro
65 pr_info("MIPS R2-to-R6 Emulator Enabled!"); in mipsr2emu_enable()
72 * mipsr6_emul - Emulate some frequent R2/R5/R6 instructions in delay slot
75 * @regs: Process register set
78 static inline int mipsr6_emul(struct pt_regs *regs, u32 ir) in mipsr6_emul() argument
83 regs->regs[MIPSInst_RT(ir)] = in mipsr6_emul()
84 (s32)regs->regs[MIPSInst_RS(ir)] + in mipsr6_emul()
92 regs->regs[MIPSInst_RT(ir)] = in mipsr6_emul()
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/linux-6.14.4/Documentation/devicetree/bindings/remoteproc/
Dqcom,sc7280-mss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sibi Sankar <[email protected]>
19 - qcom,sc7280-mss-pil
23 - description: MSS QDSP6 registers
24 - description: RMB registers
26 reg-names:
28 - const: qdsp6
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/linux-6.14.4/drivers/mailbox/
Darm_mhuv3.c1 // SPDX-License-Identifier: GPL-2.0
47 /* Padding bitfields/fields represents hole in the regs MMIO */
84 #define fcgi_spt BIT(10) // MBX-only
129 /*-- MBX-only registers --*/
134 /*-- End of MBX-only ---- */
137 /*-- MBX-only registers --*/
143 /*-- End of MBX-only ---- */
252 * struct mhuv3_protocol_ops - MHUv3 operations
256 * @read_data: Read available Sender in-band LE data (if any).
257 * @rx_complete: Acknowledge data reception to the Sender. Any out-of-band data
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/linux-6.14.4/drivers/net/ethernet/altera/
Daltera_tse_ethtool.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Ethtool support for Altera Triple-Speed Ethernet MAC driver
3 * Copyright (C) 2008-2014 Altera Corporation. All rights reserved
67 u32 rev = ioread32(&priv->mac_dev->megacore_revision); in tse_get_drvinfo()
69 strcpy(info->driver, "altera_tse"); in tse_get_drvinfo()
70 snprintf(info->fw_version, ETHTOOL_FWVERS_LEN, "v%d.%d", in tse_get_drvinfo()
72 sprintf(info->bus_info, "platform"); in tse_get_drvinfo()
87 u64 ext; in tse_fill_stats() local
89 buf[0] = csrrd32(priv->mac_dev, in tse_fill_stats()
91 buf[1] = csrrd32(priv->mac_dev, in tse_fill_stats()
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/linux-6.14.4/tools/testing/selftests/kvm/lib/riscv/
Dprocessor.c1 // SPDX-License-Identifier: GPL-2.0
3 * RISC-V code
19 bool __vcpu_has_ext(struct kvm_vcpu *vcpu, uint64_t ext) in __vcpu_has_ext() argument
24 ret = __vcpu_get_reg(vcpu, ext, &value); in __vcpu_has_ext()
31 return (v + vm->page_size) & ~(vm->page_size - 1); in page_align()
61 TEST_ASSERT(level > -1, in pte_index()
63 TEST_ASSERT(level < vm->pgtable_levels, in pte_index()
71 size_t nr_pages = page_align(vm, ptrs_per_pte(vm) * 8) / vm->page_size; in virt_arch_pgd_alloc()
73 if (vm->pgd_created) in virt_arch_pgd_alloc()
76 vm->pgd = vm_phy_pages_alloc(vm, nr_pages, in virt_arch_pgd_alloc()
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/linux-6.14.4/arch/powerpc/platforms/cell/
Dinterrupt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 * - Fix various assumptions related to HW CPU numbers vs. linux CPU numbers
15 * - Implement proper handling of maxcpus=1/2 (that is, routing of irqs from
16 * a non-active node to the active node)
33 #include <asm/cell-regs.h>
38 struct cbe_iic_thread_regs __iomem *regs; member
74 out_be64(&iic->regs->prio, iic->eoi_stack[--iic->eoi_ptr]); in iic_eoi()
75 BUG_ON(iic->eoi_ptr < 0); in iic_eoi()
79 .name = "CELL-IIC",
101 bits = in_be64(&node_iic->iic_is); in iic_ioexc_cascade()
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/linux-6.14.4/drivers/video/fbdev/riva/
Dfbdev.c2 * linux/drivers/video/riva/fbdev.c - nVidia RIVA 128/TNT/TNT2 fb driver
6 * Copyright 1999-2000 Jeff Garzik
56 /* ------------------------------------------------------------------------- *
60 * ------------------------------------------------------------------------- */
91 /* ------------------------------------------------------------------------- *
95 * ------------------------------------------------------------------------- */
99 /* ------------------------------------------------------------------------- *
103 * ------------------------------------------------------------------------- */
195 /* ------------------------------------------------------------------------- *
199 * ------------------------------------------------------------------------- */
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/linux-6.14.4/arch/riscv/kvm/
Dvcpu_onereg.c1 // SPDX-License-Identifier: GPL-2.0
23 #define KVM_ISA_EXT_ARR(ext) \ argument
24 [KVM_RISCV_ISA_EXT_##ext] = RISCV_ISA_EXT_##ext
113 static bool kvm_riscv_vcpu_isa_enable_allowed(unsigned long ext) in kvm_riscv_vcpu_isa_enable_allowed() argument
115 switch (ext) { in kvm_riscv_vcpu_isa_enable_allowed()
123 * The henvcfg.ADUE is read-only zero if menvcfg.ADUE is zero. in kvm_riscv_vcpu_isa_enable_allowed()
136 static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) in kvm_riscv_vcpu_isa_disable_allowed() argument
138 switch (ext) { in kvm_riscv_vcpu_isa_disable_allowed()
205 * The henvcfg.ADUE is read-only zero if menvcfg.ADUE is zero. in kvm_riscv_vcpu_isa_disable_allowed()
224 set_bit(host_isa, vcpu->arch.isa); in kvm_riscv_vcpu_setup_isa()
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/linux-6.14.4/drivers/gpu/drm/xe/
Dxe_oa.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2023-2024 Intel Corporation
17 #include "regs/xe_engine_regs.h"
18 #include "regs/xe_gt_regs.h"
19 #include "regs/xe_oa_regs.h"
64 const struct xe_oa_reg *regs; member
139 return tail >= head ? tail - head : in xe_oa_circ_diff()
140 tail + stream->oa_buffer.circ_size - head; in xe_oa_circ_diff()
145 return ptr + n >= stream->oa_buffer.circ_size ? in xe_oa_circ_incr()
146 ptr + n - stream->oa_buffer.circ_size : ptr + n; in xe_oa_circ_incr()
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Dxe_guc_capture.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2021-2024 Intel Corporation
14 #include "regs/xe_engine_regs.h"
15 #include "regs/xe_gt_regs.h"
16 #include "regs/xe_guc_regs.h"
17 #include "regs/xe_regs.h"
45 * Book-keeping structure used to track read and write pointers
46 * as we extract error capture data from the GuC-log-buffer's
47 * error-capture region as a stream of dwords.
57 * struct __guc_capture_parsed_output - extracted error capture node
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/linux-6.14.4/sound/pci/ac97/
Dac97_proc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
46 snd_iprintf(buffer, "%-17s: %3d.%d dBV %c %2d/fs %s\n", in snd_ac97_proc_read_functions()
48 (info & 0x8000 ? -1 : 1) * ((info & 0x7000) >> 12) * 3 / 2, in snd_ac97_proc_read_functions()
50 info & 0x0400 ? 'X' : '-', in snd_ac97_proc_read_functions()
95 unsigned short val, tmp, ext, mext; in snd_ac97_proc_read_main() local
101 snd_ac97_get_name(NULL, ac97->id, name, 0); in snd_ac97_proc_read_main()
102 snd_iprintf(buffer, "%d-%d/%d: %s\n\n", ac97->addr, ac97->num, subidx, name); in snd_ac97_proc_read_main()
104 if ((ac97->scaps & AC97_SCAP_AUDIO) == 0) in snd_ac97_proc_read_main()
108 ac97->subsystem_vendor); in snd_ac97_proc_read_main()
110 ac97->subsystem_device); in snd_ac97_proc_read_main()
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/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dsc7280-herobrine-lte-sku.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 reserved-memory {
13 no-map;
16 mdata_mem: mpss-metadata {
17 alloc-ranges = <0x0 0xa0000000 0x0 0x20000000>;
19 no-map;
25 qcom,gsi-loader = "modem";
30 compatible = "qcom,sc7280-mss-pil";
32 reg-names = "qdsp6", "rmb";
39 clock-names = "iface", "offline", "snoc_axi", "pka", "xo";
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/linux-6.14.4/drivers/tty/serial/8250/
D8250_ingenic.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2010 Lars-Peter Clausen <[email protected]>
46 return readl(port->membase + (offset << 2)); in early_in()
51 writel(value, port->membase + (offset << 2)); in early_out()
68 uart_console_write(&early_device->port, s, count, in ingenic_early_console_write()
78 offset = fdt_path_offset(fdt, "/ext"); in ingenic_early_console_setup_clock()
82 prop = fdt_getprop(fdt, offset, "clock-frequency", NULL); in ingenic_early_console_setup_clock()
86 dev->port.uartclk = be32_to_cpup(prop); in ingenic_early_console_setup_clock()
92 struct uart_port *port = &dev->port; in ingenic_earlycon_setup_tail()
96 if (!dev->port.membase) in ingenic_earlycon_setup_tail()
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/linux-6.14.4/arch/arm64/kernel/vdso/
Dvgetrandom-chacha.S1 // SPDX-License-Identifier: GPL-2.0
27 * number of blocks of output with nonce 0, taking an input key and 8-bytes
30 * This implementation avoids d8-d15 because they are callee-save in user
39 * x1: 32-byte key input
40 * x2: 8-byte counter input/output
41 * x3: number of 64-byte block to write to output
45 /* copy0 = "expand 32-byte k" */
69 * Permute one 64-byte block where the state matrix is stored in the four NEON
70 * registers state0-state3. It performs matrix operations on four words in parallel,
99 ext state1.16b, state1.16b, state1.16b, #4
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/linux-6.14.4/samples/vfio-mdev/
Dmbochs.c1 // SPDX-License-Identifier: GPL-2.0
5 * Emulate enough of qemu stdvga to make bochs-drm.ko happy. That is
8 * include any legacy vga stuff. Device looks a lot like "qemu -device
9 * secondary-vga".
33 #include <linux/dma-buf.h>
111 .type.pretty_name = MBOCHS_CLASS_NAME "-" MBOCHS_TYPE_1,
117 .type.pretty_name = MBOCHS_CLASS_NAME "-" MBOCHS_TYPE_2,
123 .type.pretty_name = MBOCHS_CLASS_NAME "-" MBOCHS_TYPE_3,
202 [VBE_DISPI_INDEX_VIRT_WIDTH] = "virt-width",
203 [VBE_DISPI_INDEX_VIRT_HEIGHT] = "virt-height",
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/linux-6.14.4/drivers/gpu/drm/i915/gt/uc/
Dintel_guc_capture.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2021-2022 Intel Corporation
27 * NOTE: For engine-registers, GuC only needs the register offsets
28 * from the engine-mmio-base
104 /* XE_LP Render / Compute Per-Class */
110 /* GEN8+ Render / Compute Per-Engine-Instance */
115 /* GEN8+ Media Decode/Encode Per-Engine-Instance */
120 /* XE_LP Video Enhancement Per-Class */
125 /* GEN8+ Video Enhancement Per-Engine-Instance */
130 /* GEN8+ Blitter Per-Engine-Instance */
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