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/linux-6.14.4/Documentation/devicetree/bindings/dma/
Dfsl,edma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 memory-mapped registers. channels are split into two groups, called
16 - Peng Fan <[email protected]>
21 - enum:
22 - fsl,vf610-edma
23 - fsl,imx7ulp-edma
24 - fsl,imx8qm-edma
25 - fsl,imx8ulp-edma
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/linux-6.14.4/drivers/dma/
Dfsl-edma-main.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * drivers/dma/fsl-edma.c
5 * Copyright 2013-2014 Freescale Semiconductor, Inc.
13 #include <dt-bindings/dma/fsl-edma.h>
20 #include <linux/dma-mapping.h>
25 #include "fsl-edma-common.h"
31 vchan_synchronize(&fsl_chan->vchan); in fsl_edma_synchronize()
38 struct edma_regs *regs = &fsl_edma->regs; in fsl_edma_tx_handler()
40 intr = edma_readl(fsl_edma, regs->intl); in fsl_edma_tx_handler()
44 for (ch = 0; ch < fsl_edma->n_chans; ch++) { in fsl_edma_tx_handler()
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/linux-6.14.4/drivers/clk/imx/
Dclk-imx93.c1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk-provider.h>
7 #include <linux/err.h>
14 #include <dt-bindings/clock/imx93-clock.h>
186 { IMX93_CLK_EDMA2_GATE, "edma2", "wakeup_axi_root", 0x8580, },
276 struct device *dev = &pdev->dev; in imx93_clocks_probe()
277 struct device_node *np = dev->of_node; in imx93_clocks_probe()
282 const unsigned long plat = (unsigned long)device_get_match_data(&pdev->dev); in imx93_clocks_probe()
287 return -ENOMEM; in imx93_clocks_probe()
289 clk_hw_data->num = IMX93_CLK_END; in imx93_clocks_probe()
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/linux-6.14.4/drivers/accel/habanalabs/gaudi2/
Dgaudi2.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright 2020-2022 HabanaLabs, Ltd.
45 * since the code already has built-in support for binning of up to MAX_FAULTY_TPCS TPCs
126 #define GAUDI2_PMMU_SPI_SEI_ENABLE_MASK GENMASK(GAUDI2_NUM_OF_MMU_SPI_SEI_CAUSE - 2, 0)
127 #define GAUDI2_HMMU_SPI_SEI_ENABLE_MASK GENMASK(GAUDI2_NUM_OF_MMU_SPI_SEI_CAUSE - 1, 0)
131 #define GAUDI2_VDEC_MSIX_ENTRIES (GAUDI2_IRQ_NUM_SHARED_DEC1_ABNRM - \
134 #define ENGINE_ID_DCORE_OFFSET (GAUDI2_DCORE1_ENGINE_ID_EDMA_0 - GAUDI2_DCORE0_ENGINE_ID_EDMA_0)
164 /* HW scrambles only bits 0-25 */
288 GAUDI2_DCORE1_ENGINE_ID_EDMA_0, "EDMA2"},
904 "wap sei (wbc axi err)",
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