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/linux-6.14.4/Documentation/devicetree/bindings/mmc/
Dsamsung,exynos-dw-mshc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/samsung,exynos-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Jaehoon Chung <[email protected]>
13 - Krzysztof Kozlowski <[email protected]>
18 - enum:
19 - axis,artpec8-dw-mshc
20 - samsung,exynos4210-dw-mshc
21 - samsung,exynos4412-dw-mshc
[all …]
Drockchip-dw-mshc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 This file documents the combined properties for the core Synopsys dw mshc
13 controller that are not already included in the synopsys-dw-mshc-common.yaml
17 - $ref: synopsys-dw-mshc-common.yaml#
20 - Heiko Stuebner <[email protected]>
27 - const: rockchip,rk2928-dw-mshc
29 - const: rockchip,rk3288-dw-mshc
[all …]
Dk3-dw-mshc.txt4 Read synopsys-dw-mshc.txt for more details
8 differences between the core Synopsys dw mshc controller properties described
9 by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific
15 - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific extensions.
16 - "hisilicon,hi3670-dw-mshc", "hisilicon,hi3660-dw-mshc": for controllers
18 - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions.
19 - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions.
22 - hisilicon,peripheral-syscon: phandle of syscon used to control peripheral.
30 compatible = "hisilicon,hi4511-dw-mshc";
33 #address-cells = <1>;
[all …]
Dsynopsys-dw-mshc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <[email protected]>
16 - altr,socfpga-dw-mshc
17 - img,pistachio-dw-mshc
18 - snps,dw-mshc
33 clock-names:
35 - const: biu
[all …]
Dbluefield-dw-mshc.txt4 Read synopsys-dw-mshc.txt for more details
8 differences between the core Synopsys dw mshc controller properties described
9 by synopsys-dw-mshc.txt and the properties used by the Mellanox Bluefield SoC
15 - "mellanox,bluefield-dw-mshc": for controllers with Mellanox Bluefield SoC
22 compatible = "mellanox,bluefield-dw-mshc";
25 fifo-depth = <0x100>;
26 clock-frequency = <24000000>;
27 bus-width = <8>;
28 cap-mmc-highspeed;
Dhisilicon,hi3798cv200-dw-mshc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/hisilicon,hi3798cv200-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yang Xiwen <[email protected]>
15 - hisilicon,hi3798cv200-dw-mshc
16 - hisilicon,hi3798mv200-dw-mshc
26 - description: bus interface unit clock
27 - description: card interface unit clock
28 - description: card input sample phase clock
[all …]
/linux-6.14.4/drivers/mmc/host/
Ddw_mmc-exynos.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Exynos Specific Extensions for Synopsys DW Multimedia Card Interface driver
18 #include "dw_mmc-pltfm.h"
19 #include "dw_mmc-exynos.h"
21 /* Variations in Exynos specific dw-mshc controller */
52 .compatible = "samsung,exynos4210-dw-mshc",
55 .compatible = "samsung,exynos4412-dw-mshc",
58 .compatible = "samsung,exynos5250-dw-mshc",
61 .compatible = "samsung,exynos5420-dw-mshc",
64 .compatible = "samsung,exynos5420-dw-mshc-smu",
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Ddw_mmc-pltfm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
20 #include <linux/mfd/altera-sysmgr.h>
24 #include "dw_mmc-pltfm.h"
36 host = devm_kzalloc(&pdev->dev, sizeof(struct dw_mci), GFP_KERNEL); in dw_mci_pltfm_register()
38 return -ENOMEM; in dw_mci_pltfm_register()
40 host->irq = platform_get_irq(pdev, 0); in dw_mci_pltfm_register()
41 if (host->irq < 0) in dw_mci_pltfm_register()
42 return host->irq; in dw_mci_pltfm_register()
44 host->drv_data = drv_data; in dw_mci_pltfm_register()
45 host->dev = &pdev->dev; in dw_mci_pltfm_register()
[all …]
/linux-6.14.4/arch/arm/boot/dts/samsung/
Dexynos5260-xyref5260.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
27 stdout-path = "serial2:115200n8";
31 compatible = "fixed-clock";
32 clock-frequency = <24000000>;
33 clock-output-names = "fin_pll";
34 #clock-cells = <0>;
37 ioclk_pcm: clock-pcm-ext {
38 compatible = "fixed-clock";
39 clock-frequency = <2048000>;
[all …]
Dexynos5410-smdk5410.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/irq.h>
27 stdout-path = "serial2:115200n8";
31 compatible = "fixed-clock";
32 clock-frequency = <24000000>;
33 clock-output-names = "fin_pll";
34 #clock-cells = <0>;
37 pmic_ap_clk: pmic-ap-clk {
39 compatible = "fixed-clock";
[all …]
Dexynos5420-smdk5420.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "exynos5420-cpus.dtsi"
12 #include <dt-bindings/clock/samsung,s2mps11.h>
13 #include <dt-bindings/gpio/gpio.h>
31 stdout-path = "serial2:115200n8";
34 fixed-rate-clocks {
36 compatible = "samsung,exynos5420-oscclk";
37 clock-frequency = <24000000>;
41 vdd: regulator-0 {
[all …]
Dexynos3250-artik5-eval.dts1 // SPDX-License-Identifier: GPL-2.0
12 /dts-v1/;
13 #include "exynos3250-artik5.dtsi"
17 compatible = "samsung,artik5-eval", "samsung,artik5",
26 cap-sd-highspeed;
27 disable-wp;
28 vqmmc-supply = <&ldo3_reg>;
29 card-detect-delay = <200>;
30 clock-frequency = <100000000>;
31 max-frequency = <100000000>;
[all …]
Dexynos5420-galaxy-tab-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
10 /dts-v1/;
12 #include "exynos5420-cpus.dtsi"
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/samsung,s2mps11.h>
18 chassis-type = "tablet";
24 * The same hack is also needed to boot exynos4412-i9300 with
27 * https://lore.kernel.org/all/1355276466-18295-1-git-send-email-[email protected]
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Dexynos5250-snow-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/maxim,max77686.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/samsung-i2s.h>
30 stdout-path = "serial3:115200n8";
33 gpio-keys {
34 compatible = "gpio-keys";
35 pinctrl-names = "default";
[all …]
Dexynos3250-artik5.dtsi1 // SPDX-License-Identifier: GPL-2.0
13 #include <dt-bindings/clock/samsung,s2mps11.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
26 stdout-path = &serial_2;
35 compatible = "samsung,secure-firmware";
39 thermal-zones {
40 cpu_thermal: cpu-thermal {
41 cooling-maps {
44 cooling-device = <&cpu0 5 5>,
[all …]
Dexynos5250-smdk5250.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/clock/maxim,max77686.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
31 stdout-path = "serial2:115200n8";
34 vdd: fixed-regulator-vdd {
35 compatible = "regulator-fixed";
36 regulator-name = "vdd-supply";
37 regulator-min-microvolt = <1800000>;
[all …]
Dexynos5800-peach-pi.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pi-rev16",
[all …]
Dexynos5420-peach-pit.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pit-rev16",
[all …]
Dexynos5250-spring.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/input/input.h>
19 chassis-type = "laptop";
33 stdout-path = "serial3:115200n8";
36 gpio-keys {
37 compatible = "gpio-keys";
[all …]
Dexynos5250-arndale.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/clock/samsung,s2mps11.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
32 stdout-path = "serial2:115200n8";
35 gpio-keys {
36 compatible = "gpio-keys";
[all …]
Dexynos5410-odroidxu.dts1 // SPDX-License-Identifier: GPL-2.0
10 /dts-v1/;
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos54xx-odroidxu-leds.dtsi"
20 compatible = "hardkernel,odroid-xu", "samsung,exynos5410", "samsung,exynos5";
34 stdout-path = "serial2:115200n8";
38 pinctrl-0 = <&emmc_nrst_pin>;
[all …]
/linux-6.14.4/arch/arm64/boot/dts/exynos/
Dexynos7885-jackpotlte.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Galaxy A8 2018 (jackpotlte/SM-A530F) device tree source
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
18 chassis-type = "handset";
28 stdout-path = &serial_2;
38 gpio-keys {
39 compatible = "gpio-keys";
[all …]
Dexynos7-espresso.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/samsung,s2mps11.h>
13 #include <dt-bindings/gpio/gpio.h>
17 compatible = "samsung,exynos7-espresso", "samsung,exynos7";
26 stdout-path = &serial_2;
34 usb30_vbus_reg: regulator-usb30 {
35 compatible = "regulator-fixed";
36 regulator-name = "VBUS_5V";
[all …]
Dexynos850-e850-96.dts1 // SPDX-License-Identifier: GPL-2.0
3 * WinLink E850-96 board device tree source
8 * Device tree source file for WinLink's E850-96 board which is based on
12 /dts-v1/;
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/input.h>
17 #include <dt-bindings/leds/common.h>
20 model = "WinLink E850-96 board";
21 compatible = "winlink,e850-96", "samsung,exynos850";
29 stdout-path = &serial_0;
[all …]
/linux-6.14.4/arch/arc/boot/dts/
Daxs10x_mb.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
14 compatible = "simple-bus";
15 #address-cells = <1>;
16 #size-cells = <1>;
18 interrupt-parent = <&mb_intc>;
20 creg_rst: reset-controller@11220 {
21 compatible = "snps,axs10x-reset";
22 #reset-cells = <1>;
27 compatible = "snps,axs10x-i2s-pll-clock";
[all …]

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