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/linux-6.14.4/tools/testing/selftests/devices/probe/boards/
Dgoogle,spherion.yaml1 # SPDX-License-Identifier: GPL-2.0
7 # The top-level is a list of controllers, either for USB or PCI(e).
8 # Every controller needs to have a 'type' key set to either 'usb-controller' or
9 # 'pci-controller'.
12 # - dt-mmio: identify the MMIO address of the controller as defined in the
14 # - of-fullname-regex: regular expression to match against the OF_FULLNAME
16 # sibling controllers. In this case, dt-mmio can't be used, and this property
18 # - usb-version: for USB controllers to differentiate between USB3 and USB2
20 # - acpi-uid: _UID property of the controller as supplied by the ACPI. Useful to
27 # The 'path' key is needed for every child device (that is, not top-level) to
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/linux-6.14.4/drivers/comedi/drivers/
Ddt3000.c1 // SPDX-License-Identifier: GPL-2.0+
6 * COMEDI - Linux Control and Measurement Device Interface
13 * Devices: [Data Translation] DT3001 (dt3000), DT3001-PGL, DT3002, DT3003,
14 * DT3003-PGL, DT3004, DT3005, DT3004-200
29 * since each board has an on-board DSP (Texas Instruments TMS320C52).
31 * bus-mastering DMA, which eliminates them from serious work.
49 * PCI BAR0 - dual-ported RAM location definitions (dev->mmio)
176 .name = "dt3001-pgl",
196 .name = "dt3003-pgl",
211 .name = "dt3005", /* a.k.a. 3004-200 */
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/linux-6.14.4/Documentation/devicetree/bindings/remoteproc/
Dfsl,imx-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX Co-Processor
10 This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs.
13 - Peng Fan <[email protected]>
18 - fsl,imx6sx-cm4
19 - fsl,imx7d-cm4
20 - fsl,imx7ulp-cm4
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/linux-6.14.4/tools/testing/selftests/devices/probe/
Dtest_discoverable_devices.py2 # SPDX-License-Identifier: GPL-2.0
9 # The per-platform YAML file defining the devices to be tested is stored inside
10 # the boards/ directory and chosen based on DT compatible or DMI IDs (sys_vendor
38 pci_controller_sysfs_dir = "pci[0-9a-f]{4}:[0-9a-f]{2}"
57 re_dt_mmio = re.compile("OF_FULLNAME=.*@([0-9a-f]+)")
106 if controller["type"] == "pci-controller":
108 elif controller["type"] == "usb-controller":
117 if controller.get("dt-mmio"):
118 if str(controller["dt-mmio"]) != get_dt_mmio(c):
121 if controller.get("of-fullname-regex"):
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/linux-6.14.4/Documentation/devicetree/bindings/bus/
Dbaikal,bt1-apb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/bus/baikal,bt1-apb.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Baikal-T1 APB-bus
11 - Serge Semin <[email protected]>
14 Baikal-T1 CPU or DMAC MMIO requests are handled by the AMBA 3 AXI Interconnect
15 which routes them to the AXI-APB bridge. This interface is a single master
22 - $ref: /schemas/simple-bus.yaml#
27 const: baikal,bt1-apb
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Dbaikal,bt1-axi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/bus/baikal,bt1-axi.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Baikal-T1 AXI-bus
11 - Serge Semin <[email protected]>
14 AXI3-bus is the main communication bus of Baikal-T1 SoC connecting all
15 high-speed peripheral IP-cores with RAM controller and with MIPS P5600
23 accessible by means of the Baikal-T1 System Controller.
26 - $ref: /schemas/simple-bus.yaml#
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/linux-6.14.4/Documentation/arch/arm64/
Darm-cca.rst1 .. SPDX-License-Identifier: GPL-2.0
24 is split into two. The lower half is protected - any memory that is
29 to make changes to the pages in this region, and is able to emulate MMIO
43 ----------------------
48 * All protected RAM described to Linux (by DT or ACPI) must be marked
51 * MMIO devices must be either unprotected (e.g. emulated by the Normal
54 * MMIO devices emulated by the Normal World and used very early in boot
58 of the emulated UART at 0x1000000: ``earlycon=uart,mmio,0x101000000``
68 ----------
/linux-6.14.4/arch/arm64/boot/dts/apple/
Dt6001.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
15 #include "multi-die-cpp.h"
17 #include "t600x-common.dtsi"
20 compatible = "apple,t6001", "apple,arm-platform";
23 compatible = "simple-bus";
24 #address-cells = <2>;
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Ds5l8960x.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/apple-aic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/pinctrl/apple.h>
17 interrupt-parent = <&aic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
21 clkref: clock-ref {
22 compatible = "fixed-clock";
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Dt7000.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/apple-aic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/pinctrl/apple.h>
17 interrupt-parent = <&aic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
21 clkref: clock-ref {
22 compatible = "fixed-clock";
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Dt7001.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/apple-aic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/pinctrl/apple.h>
15 interrupt-parent = <&aic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
23 clkref: clock-ref {
24 compatible = "fixed-clock";
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Dt6002.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
15 #include "multi-die-cpp.h"
17 #include "t600x-common.dtsi"
20 compatible = "apple,t6002", "apple,arm-platform";
22 #address-cells = <2>;
23 #size-cells = <2>;
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Dt8010.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
16 interrupt-parent = <&aic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
20 clkref: clock-ref {
21 compatible = "fixed-clock";
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Ds8001.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
16 interrupt-parent = <&aic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
20 clkref: clock-ref {
21 compatible = "fixed-clock";
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Dt8011.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
16 interrupt-parent = <&aic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
20 clkref: clock-ref {
21 compatible = "fixed-clock";
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/linux-6.14.4/Documentation/devicetree/bindings/pci/
Dqcom,pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <[email protected]>
15 - enum:
16 - qcom,sa8775p-pcie-ep
17 - qcom,sdx55-pcie-ep
18 - qcom,sm8450-pcie-ep
19 - items:
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/linux-6.14.4/drivers/phy/hisilicon/
Dphy-histb-combphy.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2016-2017 HiSilicon Co., Ltd. http://www.hisilicon.com
21 #include <dt-bindings/phy/phy.h>
45 void __iomem *mmio; member
56 void __iomem *reg = priv->mmio + COMBPHY_CFG_REG; in nano_register_write()
76 return (mode->fixed != PHY_NONE) ? true : false; in is_mode_fixed()
81 struct histb_combphy_mode *mode = &priv->mode; in histb_combphy_set_mode()
82 struct regmap *syscon = priv->syscon; in histb_combphy_set_mode()
88 switch (mode->select) { in histb_combphy_set_mode()
99 return -EINVAL; in histb_combphy_set_mode()
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/linux-6.14.4/drivers/ata/
Dlibahci_platform.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2004-2005 Red Hat, Inc.
37 * ahci_platform_enable_phys - Enable PHYs
40 * This function enables all the PHYs found in hpriv->phys, if any.
51 for (i = 0; i < hpriv->nports; i++) { in ahci_platform_enable_phys()
55 rc = phy_init(hpriv->phys[i]); in ahci_platform_enable_phys()
59 rc = phy_set_mode(hpriv->phys[i], PHY_MODE_SATA); in ahci_platform_enable_phys()
61 phy_exit(hpriv->phys[i]); in ahci_platform_enable_phys()
65 rc = phy_power_on(hpriv->phys[i]); in ahci_platform_enable_phys()
67 phy_exit(hpriv->phys[i]); in ahci_platform_enable_phys()
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/linux-6.14.4/Documentation/devicetree/bindings/mux/
Dreg-mux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/reg-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic register bitfield-based multiplexer controller
10 - Peter Rosin <[email protected]>
19 - reg-mux # parent device of mux controller is not syscon device
20 - mmio-mux # parent device of mux controller is syscon device
24 '#mux-control-cells':
27 mux-reg-masks:
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/linux-6.14.4/drivers/gpu/drm/msm/hdmi/
Dhdmi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
47 void __iomem *mmio; member
87 /* platform config data (ie. from DT, or pdata) */
118 writel(data, hdmi->mmio + reg); in hdmi_write()
123 return readl(hdmi->mmio + reg); in hdmi_read()
128 return readl(hdmi->qfprom_mmio + reg); in hdmi_qfprom_read()
162 void __iomem *mmio; member
171 writel(data, phy->mmio + reg); in hdmi_phy_write()
176 return readl(phy->mmio + reg); in hdmi_phy_read()
193 return -ENODEV; in msm_hdmi_pll_8960_init()
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/linux-6.14.4/Documentation/devicetree/bindings/soc/qcom/
Dqcom,wcnss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <[email protected]>
11 - Bjorn Andersson <[email protected]>
21 firmware-name:
27 qcom,mmio:
32 - qcom,riva"
33 - qcom,pronto"
35 qcom,smd-channels:
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/linux-6.14.4/drivers/iio/dac/
Dstm32-dac-core.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
21 #include "stm32-dac-core.h"
24 * struct stm32_dac_priv - stm32 DAC core private data
36 * struct stm32_dac_cfg - DAC configuration
61 ret = regulator_enable(priv->vref); in stm32_dac_core_hw_start()
67 ret = clk_prepare_enable(priv->pclk); in stm32_dac_core_hw_start()
76 regulator_disable(priv->vref); in stm32_dac_core_hw_start()
86 clk_disable_unprepare(priv->pclk); in stm32_dac_core_hw_stop()
87 regulator_disable(priv->vref); in stm32_dac_core_hw_stop()
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/linux-6.14.4/arch/arm/boot/dts/socionext/
Dmilbeaut-m10v.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/interrupt-controller/irq.h>
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 interrupt-parent = <&gic>;
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
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/linux-6.14.4/Documentation/devicetree/bindings/iommu/
Darm,smmu-v3.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/iommu/arm,smmu-v3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Will Deacon <[email protected]>
11 - Robin Murphy <[email protected]>
15 revisions, replacing the MMIO register interface with in-memory command
21 pattern: "^iommu@[0-9a-f]*"
23 const: arm,smmu-v3
32 interrupt-names:
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/linux-6.14.4/sound/soc/sof/mediatek/mt8186/
Dmt8186.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
5 // Author: Allen-KH Cheng <allen-[email protected]>
24 #include "../../sof-of-dev.h"
25 #include "../../sof-audio.h"
27 #include "../mtk-adsp-common.h"
29 #include "mt8186-clk.h"
44 struct adsp_priv *priv = sdev->pdata->hw_pdata; in mt8186_send_msg()
46 sof_mailbox_write(sdev, sdev->host_box.offset, msg->msg_data, in mt8186_send_msg()
47 msg->msg_size); in mt8186_send_msg()
49 return mtk_adsp_ipc_send(priv->dsp_ipc, MTK_ADSP_IPC_REQ, MTK_ADSP_IPC_OP_REQ); in mt8186_send_msg()
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