Home
last modified time | relevance | path

Searched +full:dma +full:- +full:maxburst (Results 1 – 25 of 86) sorted by relevance

1234

/linux-6.14.4/Documentation/devicetree/bindings/crypto/
Dst,stm32-hash.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/crypto/st,stm32-hash.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Lionel Debieve <[email protected]>
19 - st,stn8820-hash
20 - stericsson,ux500-hash
21 - st,stm32f456-hash
22 - st,stm32f756-hash
23 - st,stm32mp13-hash
[all …]
/linux-6.14.4/drivers/dma/
Dloongson2-apb-dma.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for the Loongson-2 APB DMA Controller
5 * Copyright (C) 2017-2023 Loongson Corporation
9 #include <linux/dma-mapping.h>
13 #include <linux/io-64-nonatomic-lo-hi.h>
21 #include "virt-dma.h"
32 #define LDMA_START BIT(3) /* DMA start operation */
33 #define LDMA_STOP BIT(4) /* DMA stop operation */
34 #define LDMA_CONFIG_MASK GENMASK_ULL(4, 0) /* DMA controller config bits mask */
41 #define LDMA_INT BIT(1) /* Enable DMA interrupts */
[all …]
Duniphier-xdmac.c1 // SPDX-License-Identifier: GPL-2.0
3 * External DMA controller driver for UniPhier SoCs
18 #include "virt-dma.h"
115 /* xc->vc.lock must be held by caller */
121 vd = vchan_next_desc(&xc->vc); in uniphier_xdmac_next_desc()
125 list_del(&vd->node); in uniphier_xdmac_next_desc()
130 /* xc->vc.lock must be held by caller */
140 src_addr = xd->nodes[xd->cur_node].src; in uniphier_xdmac_chan_start()
141 dst_addr = xd->nodes[xd->cur_node].dst; in uniphier_xdmac_chan_start()
142 its = xd->nodes[xd->cur_node].burst_size; in uniphier_xdmac_chan_start()
[all …]
Didma64.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Core driver for the Intel integrated DMA 64-bit
12 #include <linux/dma-mapping.h>
19 #include <linux/dma/idma64.h>
26 /* ---------------------------------------------------------------------- */
30 return &chan->dev->device; in chan2dev()
33 /* ---------------------------------------------------------------------- */
41 channel_clear_bit(idma64, MASK(XFER), idma64->all_chan_mask); in idma64_off()
42 channel_clear_bit(idma64, MASK(BLOCK), idma64->all_chan_mask); in idma64_off()
43 channel_clear_bit(idma64, MASK(SRC_TRAN), idma64->all_chan_mask); in idma64_off()
[all …]
Dsun4i-dma.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include <linux/dma-mapping.h>
22 #include "virt-dma.h"
24 /** Common macros to normal and dedicated DMA registers **/
42 /** Normal DMA register values **/
44 /* Normal DMA source/destination data request type values */
51 /** Normal DMA register layout **/
53 /* Dedicated DMA source/destination address mode values */
57 /* Normal DMA configuration register layout */
67 /** Dedicated DMA register values **/
[all …]
Dpxa_dma.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/dma-mapping.h>
21 #include <linux/dma/pxa-dma.h>
24 #include "virt-dma.h"
35 #define PXA_DCSR_NODESC BIT(30) /* No-Descriptor Fetch (read / write) */
37 #define PXA_DCSR_REQPEND BIT(8) /* Request Pending (read-only) */
38 #define PXA_DCSR_STOPSTATE BIT(3) /* Stop State (read-only) */
63 #define PXA_DCMD_ENDIAN BIT(18) /* Device Endian-ness. */
70 #define PXA_DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */
73 #define PDMA_MAX_DESC_BYTES (PXA_DCMD_LENGTH & ~((1 << PDMA_ALIGNMENT) - 1))
[all …]
Dk3dma.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013 - 2015 Linaro Ltd.
8 #include <linux/dma-mapping.h>
22 #include "virt-dma.h"
24 #define DRIVER_NAME "k3-dma"
138 val = readl_relaxed(phy->base + CX_CFG); in k3_dma_pause_dma()
140 writel_relaxed(val, phy->base + CX_CFG); in k3_dma_pause_dma()
142 val = readl_relaxed(phy->base + CX_CFG); in k3_dma_pause_dma()
144 writel_relaxed(val, phy->base + CX_CFG); in k3_dma_pause_dma()
154 val = 0x1 << phy->idx; in k3_dma_terminate_chan()
[all …]
Dmmp_pdma.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/dma-mapping.h>
32 #define DCSR_NODESC BIT(30) /* No-Descriptor Fetch (read / write) */
34 #define DCSR_REQPEND BIT(8) /* Request Pending (read-only) */
35 #define DCSR_STOPSTATE BIT(3) /* Stop State (read-only) */
61 #define DCMD_ENDIAN BIT(18) /* Device Endian-ness. */
68 #define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */
145 u32 reg = (phy->idx << 4) + DDADR; in set_desc()
147 writel(addr, phy->base + reg); in set_desc()
154 if (!phy->vchan) in enable_chan()
[all …]
Dsa11x0-dma.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Derived in part from arch/arm/mach-sa1100/dma.c,
20 #include "virt-dma.h"
89 /* protected by c->vc.lock */
93 /* protected by d->lock */
107 /* Protected by c->vc.lock */
138 struct virt_dma_desc *vd = vchan_next_desc(&c->vc); in sa11x0_dma_next_desc()
150 list_del(&txd->vd.node); in sa11x0_dma_start_desc()
151 p->txd_load = txd; in sa11x0_dma_start_desc()
152 p->sg_load = 0; in sa11x0_dma_start_desc()
[all …]
Ddma-jz4780.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Ingenic JZ4780 DMA controller
6 * Author: Alex Smith <alex@alex-smith.me.uk>
11 #include <linux/dma-mapping.h>
21 #include "virt-dma.h"
37 /* Per-channel registers. */
98 * struct jz4780_dma_hwdesc - descriptor structure read by the DMA controller.
179 return container_of(jzchan->vchan.chan.device, struct jz4780_dma_dev, in jz4780_dma_chan_parent()
186 return readl(jzdma->chn_base + reg + JZ_DMA_REG_CHAN(chn)); in jz4780_dma_chn_readl()
192 writel(val, jzdma->chn_base + reg + JZ_DMA_REG_CHAN(chn)); in jz4780_dma_chn_writel()
[all …]
Dst_fdma.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DMA driver for STMicroelectronics STi FDMA controller
35 struct st_fdma_dev *fdev = fchan->fdev; in st_fdma_dreq_get()
36 u32 req_line_cfg = fchan->cfg.req_line; in st_fdma_dreq_get()
46 if (fdev->dreq_mask == ~0L) { in st_fdma_dreq_get()
47 dev_err(fdev->dev, "No req lines available\n"); in st_fdma_dreq_get()
48 return -EINVAL; in st_fdma_dreq_get()
52 dev_err(fdev->dev, "Invalid or used req line\n"); in st_fdma_dreq_get()
53 return -EINVAL; in st_fdma_dreq_get()
59 } while (test_and_set_bit(dreq_line, &fdev->dreq_mask)); in st_fdma_dreq_get()
[all …]
Damba-pl08x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (c) 2010 ST-Ericsson SA
14 * PL080 & PL081 both have 16 sets of DMA signals that can be routed to any
18 * has only two channels. So on these DMA controllers the number of channels
19 * and the number of incoming DMA signals are two totally different things.
27 * - CH_CONFIG register at different offset,
28 * - separate CH_CONTROL2 register for transfer size,
29 * - bigger maximum transfer size,
30 * - 8-word aligned LLI, instead of 4-word, due to extra CCTL2 word,
31 * - no support for peripheral flow control.
[all …]
/linux-6.14.4/sound/soc/pxa/
Dpxa2xx-ac97.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip.
15 #include <linux/dma/pxa-dma.h>
21 #include <sound/pxa2xx-lib.h>
24 #include <linux/platform_data/asoc-pxa.h>
28 #define MCDR 0x0060 /* Mic-in FIFO Data Register */
66 .maxburst = 32,
72 .maxburst = 32,
78 .maxburst = 16,
84 .maxburst = 16,
[all …]
/linux-6.14.4/sound/soc/fsl/
Dfsl_asrc_dma.c1 // SPDX-License-Identifier: GPL-2.0
3 // Freescale ASRC ALSA SoC Platform (DMA) driver
9 #include <linux/dma-mapping.h>
11 #include <linux/dma/imx-dma.h>
37 chan->private = param; in filter()
45 struct snd_pcm_runtime *runtime = substream->runtime; in fsl_asrc_dma_complete()
46 struct fsl_asrc_pair *pair = runtime->private_data; in fsl_asrc_dma_complete()
48 pair->pos += snd_pcm_lib_period_bytes(substream); in fsl_asrc_dma_complete()
49 if (pair->pos >= snd_pcm_lib_buffer_bytes(substream)) in fsl_asrc_dma_complete()
50 pair->pos = 0; in fsl_asrc_dma_complete()
[all …]
/linux-6.14.4/drivers/usb/gadget/udc/
Dmv_u3d_core.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/dma-mapping.h>
56 ep = &u3d->eps[i]; in mv_u3d_ep0_reset()
57 ep->u3d = u3d; in mv_u3d_ep0_reset()
60 ep->ep_context = &u3d->ep_context[1]; in mv_u3d_ep0_reset()
65 epxcr = ioread32(&u3d->vuc_regs->epcr[0].epxoutcr0); in mv_u3d_ep0_reset()
67 iowrite32(epxcr, &u3d->vuc_regs->epcr[0].epxoutcr0); in mv_u3d_ep0_reset()
70 iowrite32(epxcr, &u3d->vuc_regs->epcr[0].epxoutcr0); in mv_u3d_ep0_reset()
77 iowrite32(epxcr, &u3d->vuc_regs->epcr[0].epxoutcr1); in mv_u3d_ep0_reset()
80 epxcr = ioread32(&u3d->vuc_regs->epcr[0].epxincr0); in mv_u3d_ep0_reset()
[all …]
Dtrace.h1 // SPDX-License-Identifier: GPL-2.0
3 * udc.c - Core UDC Framework
45 __entry->speed = g->speed;
46 __entry->max_speed = g->max_speed;
47 __entry->state = g->state;
48 __entry->mA = g->mA;
49 __entry->sg_supported = g->sg_supported;
50 __entry->is_otg = g->is_otg;
51 __entry->is_a_peripheral = g->is_a_peripheral;
52 __entry->b_hnp_enable = g->b_hnp_enable;
[all …]
/linux-6.14.4/include/sound/
Ddmaengine_pcm.h1 /* SPDX-License-Identifier: GPL-2.0+
4 * Author: Lars-Peter Clausen <[email protected]>
15 * snd_pcm_substream_to_dma_direction - Get dma_transfer_direction for a PCM
19 * Return: DMA transfer direction
24 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in snd_pcm_substream_to_dma_direction()
50 * The DAI supports packed transfers, eg 2 16-bit samples in a 32-bit word.
52 * the supported sample formats and set the DMA transfer size to undefined.
60 * struct snd_dmaengine_dai_dma_data - DAI DMA configuration data
63 * @maxburst: Maximum number of words(note: words, as in units of the
66 * @filter_data: Custom DMA channel filter data, this will usually be used when
[all …]
/linux-6.14.4/drivers/usb/cdns3/
Dcdns3-trace.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Copyright (C) 2018-2019 Cadence.
22 #include "cdns3-gadget.h"
23 #include "cdns3-debug.h"
31 __string(name, ep_priv->name)
37 __entry->halt = halt;
38 __entry->flush = flush;
40 TP_printk("Halt %s for %s: %s", __entry->flush ? " and flush" : "",
41 __get_str(name), __entry->halt ? "set" : "cleared")
48 __string(ep_name, ep_priv->name)
[all …]
/linux-6.14.4/sound/soc/loongson/
Dloongson_i2s_plat.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (C) 2023-2024 Loongson Technology Corporation Limited
11 #include <linux/dma-mapping.h>
58 struct snd_pcm_runtime *runtime = substream->runtime; in loongson_pcm_open()
60 if (substream->pcm->device & 1) { in loongson_pcm_open()
61 runtime->hw.info &= ~SNDRV_PCM_INFO_INTERLEAVED; in loongson_pcm_open()
62 runtime->hw.info |= SNDRV_PCM_INFO_NONINTERLEAVED; in loongson_pcm_open()
65 if (substream->pcm->device & 2) in loongson_pcm_open()
66 runtime->hw.info &= ~(SNDRV_PCM_INFO_MMAP | in loongson_pcm_open()
70 * playback samples are lost if the DMA count is not a multiple in loongson_pcm_open()
[all …]
/linux-6.14.4/drivers/spi/
Dspi-stm32.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved
191 * use PIO for small transfers, avoiding DMA setup/teardown overhead for drivers
197 #define STM32_SPI_HOST_MODE(stm32_spi) (!(stm32_spi)->device_mode)
198 #define STM32_SPI_DEVICE_MODE(stm32_spi) ((stm32_spi)->device_mode)
201 * struct stm32_spi_reg - stm32 SPI register & bitfield desc
213 * struct stm32_spi_regspec - stm32 registers definition, compatible dependent data
215 * @dma_rx_en: SPI DMA RX enable register end SPI DMA RX enable bit
216 * @dma_tx_en: SPI DMA TX enable register end SPI DMA TX enable bit
243 * struct stm32_spi_cfg - stm32 compatible configuration data
[all …]
/linux-6.14.4/drivers/dma/dw/
Didma32.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2013,2018,2020-2021 Intel Corporation
38 struct device *slave = dwc->chan.slave; in idma32_get_slave_devfn()
43 return to_pci_dev(slave)->devfn; in idma32_get_slave_devfn()
48 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in idma32_initialize_chan_xbar()
54 /* DMA Channel ID Configuration register must be programmed first */ in idma32_initialize_chan_xbar()
58 value |= dwc->chan.chan_id; in idma32_initialize_chan_xbar()
63 value = readl(misc + DMA_CTL_CH(dwc->chan.chan_id)); in idma32_initialize_chan_xbar()
69 switch (dwc->direction) { in idma32_initialize_chan_xbar()
80 * Memory-to-Memory and Device-to-Device are ignored for now. in idma32_initialize_chan_xbar()
[all …]
/linux-6.14.4/drivers/usb/mtu3/
Dmtu3_trace.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * mtu3_trace.h - trace support
26 __vstring(msg, vaf->fmt, vaf->va)
30 __assign_vstr(msg, vaf->fmt, vaf->va);
42 __entry->intr = intr;
44 TP_printk("(%08x) %s %s %s %s %s %s", __entry->intr,
45 __entry->intr & HOT_RST_INTR ? "HOT_RST" : "",
46 __entry->intr & WARM_RST_INTR ? "WARM_RST" : "",
47 __entry->intr & ENTER_U3_INTR ? "ENT_U3" : "",
48 __entry->intr & EXIT_U3_INTR ? "EXIT_U3" : "",
[all …]
/linux-6.14.4/sound/core/
Dpcm_dmaengine.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Author: Lars-Peter Clausen <[email protected]>
7 * imx-pcm-dma-mx2.c, Copyright 2009 Sascha Hauer <[email protected]>
8 * mxs-pcm.c, Copyright (C) 2011 Freescale Semiconductor, Inc.
9 * ep93xx-pcm.c, Copyright (C) 2006 Lennert Buytenhek <[email protected]>
32 return substream->runtime->private_data; in substream_to_prtd()
39 return prtd->dma_chan; in snd_dmaengine_pcm_get_chan()
44 * snd_hwparams_to_dma_slave_config - Convert hw_params to dma_slave_config
47 * @slave_config: DMA slave config
63 return -EINVAL; in snd_hwparams_to_dma_slave_config()
[all …]
/linux-6.14.4/sound/soc/atmel/
Dmchp-i2s-mcc.c1 // SPDX-License-Identifier: GPL-2.0
3 // Driver for Microchip I2S Multi-channel controller
29 * ---- I2S Controller Register map ----
75 * ---- Control Register (Write-only) ----
86 * ---- Mode Register A (Read/Write) ----
116 /* Transmitter uses one DMA channel ... */
123 /* Receiver uses one DMA channel ... */
135 /* Number of TDM Channels - 1 */
138 ((((ch) - 1) << 13) & MCHP_I2SMCC_MRA_NBCHAN_MASK)
169 * ---- Mode Register B (Read/Write) ----
[all …]
/linux-6.14.4/arch/powerpc/platforms/512x/
Dmpc512x_lpbfifo.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2013-2015 Alexander Popov <[email protected]>.
21 #include <linux/dma-direction.h>
22 #include <linux/dma-mapping.h>
55 * automatically disables LPBFIFO reading request to the DMA controller
61 * mpc512x_lpbfifo_irq - IRQ handler for LPB FIFO
76 if (!req || req->dir == MPC512X_LPBFIFO_REQ_DIR_READ) { in mpc512x_lpbfifo_irq()
81 status = in_be32(&lpbfifo.regs->status); in mpc512x_lpbfifo_irq()
83 dev_err(dev, "DMA transfer from RAM to peripheral failed\n"); in mpc512x_lpbfifo_irq()
84 out_be32(&lpbfifo.regs->enable, in mpc512x_lpbfifo_irq()
[all …]

1234