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/linux-6.14.4/drivers/auxdisplay/
Dhd44780.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2000-2008, Willy Tarreau <[email protected]>
6 * Copyright (C) 2016-2017 Glider bvba
38 struct gpio_desc *pins[PIN_NUM]; member
43 struct hd44780_common *hdc = lcd->drvdata; in hd44780_backlight()
44 struct hd44780 *hd = hdc->hd44780; in hd44780_backlight()
46 if (hd->pins[PIN_CTRL_BL]) in hd44780_backlight()
47 gpiod_set_value_cansleep(hd->pins[PIN_CTRL_BL], on); in hd44780_backlight()
52 /* Maintain the data during 20 us before the strobe */ in hd44780_strobe_gpio()
55 gpiod_set_value_cansleep(hd->pins[PIN_CTRL_E], 1); in hd44780_strobe_gpio()
[all …]
Dpanel.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright (C) 2000-2008, Willy Tarreau <[email protected]>
5 * Copyright (C) 2016-2017 Glider bvba
10 * The LCD module may either be an HD44780-like 8-bit parallel LCD, or a 1-bit
11 * serial module compatible with Samsung's KS0074. The pins may be connected in
14 * The keypad consists in a matrix of push buttons connecting input pins to
15 * data output pins or to the ground. The combinations have to be hard-coded
22 * - the initialization/deinitialization process is very dirty and should
26 * - document 24 keys keyboard (3 rows of 8 cols, 32 diodes + 2 inputs)
27 * - make the LCD a part of a virtual screen of Vx*Vy
[all …]
/linux-6.14.4/drivers/pinctrl/intel/
Dpinctrl-intel-platform.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2021-2023, Intel Corporation
18 #include "pinctrl-intel.h"
21 struct pinctrl_pin_desc *pins; member
27 struct intel_platform_pins *pins) in intel_platform_pinctrl_prepare_pins() argument
37 descs = devm_krealloc_array(dev, pins->pins, base + size, sizeof(*descs), GFP_KERNEL); in intel_platform_pinctrl_prepare_pins()
39 return -ENOMEM; in intel_platform_pinctrl_prepare_pins()
47 strreplace(pin_name, '-', '_'); in intel_platform_pinctrl_prepare_pins()
50 desc->number = pin_number; in intel_platform_pinctrl_prepare_pins()
51 desc->name = pin_name; in intel_platform_pinctrl_prepare_pins()
[all …]
/linux-6.14.4/arch/arm/boot/dts/samsung/
Ds3c64xx-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 * - pin control-related definitions
8 * Samsung's S3C64xx SoCs pin banks, pin-mux and pin-config options are
12 #include "s3c64xx-pinctrl.h"
19 gpa: gpa-gpio-bank {
20 gpio-controller;
21 #gpio-cells = <2>;
22 interrupt-controller;
23 #interrupt-cells = <2>;
26 gpb: gpb-gpio-bank {
[all …]
Dexynos4210-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source
5 * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2011-2012 Linaro Ltd.
10 * Samsung's Exynos4210 SoC pin-mux and pin-config options are listed as device
14 #include "exynos-pinctrl.h"
17 gpa0: gpa0-gpio-bank {
18 gpio-controller;
19 #gpio-cells = <2>;
21 interrupt-controller;
[all …]
Dexynos4x12-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4x12 SoCs pin-mux and pin-config device tree source
8 * Samsung's Exynos4x12 SoCs pin-mux and pin-config options are listed as device
12 #include "exynos-pinctrl.h"
15 pin- ## _pin { \
16 samsung,pins = #_pin; \
17 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \
18 samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_ ##_pull>; \
22 gpa0: gpa0-gpio-bank {
23 gpio-controller;
[all …]
/linux-6.14.4/drivers/net/ethernet/intel/ice/
Dice_dpll.c1 // SPDX-License-Identifier: GPL-2.0
16 * enum ice_dpll_pin_type - enumerate ice pin types:
32 [ICE_DPLL_PIN_TYPE_RCLK_INPUT] = "rclk-input",
40 * ice_dpll_is_reset - check if reset is in progress
47 * * false - no reset in progress
48 * * true - reset in progress
52 if (ice_is_reset_in_progress(pf->state)) { in ice_dpll_is_reset()
60 * ice_dpll_pin_freq_set - set pin's frequency
69 * Context: Called under pf->dplls.lock
71 * * 0 - success
[all …]
/linux-6.14.4/arch/arm/boot/dts/ti/omap/
Dam437x-sbc-t43.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015 CompuLab, Ltd. - https://www.compulab.co.il/
6 #include "am437x-cm-t43.dts"
7 #include "compulab-sb-som.dtsi"
10 model = "CompuLab CM-T43 on SB-SOM-T43";
11 compatible = "compulab,am437x-sbc-t43", "compulab,am437x-cm-t43", "ti,am4372", "ti,am43";
19 mmc1_pins: mmc1-pins {
20 pinctrl-single,pins = <
32 dss_pinctrl_default: dss-pinctrl-default-pins {
33 pinctrl-single,pins = <
[all …]
/linux-6.14.4/drivers/pinctrl/samsung/
Dpinctrl-s3c64xx.c1 // SPDX-License-Identifier: GPL-2.0+
3 // S3C64xx specific support for pinctrl-samsung driver.
7 // Based on pinctrl-exynos.c, please see the file for original copyrights.
24 #include "pinctrl-samsung.h"
100 #define PIN_BANK_4BIT(pins, reg, id) \ argument
104 .nr_pins = pins, \
109 #define PIN_BANK_4BIT_EINTG(pins, reg, id, eoffs) \ argument
113 .nr_pins = pins, \
116 .eint_mask = (1 << (pins)) - 1, \
121 #define PIN_BANK_4BIT_EINTW(pins, reg, id, eoffs, emask) \ argument
[all …]
Dpinctrl-exynos.h1 /* SPDX-License-Identifier: GPL-2.0+ */
55 #define EXYNOS_PIN_BANK_EINTN(pins, reg, id) \ argument
59 .nr_pins = pins, \
64 #define EXYNOS_PIN_BANK_EINTG(pins, reg, id, offs) \ argument
68 .nr_pins = pins, \
74 #define EXYNOS_PIN_BANK_EINTW(pins, reg, id, offs) \ argument
78 .nr_pins = pins, \
84 #define EXYNOS5433_PIN_BANK_EINTG(pins, reg, id, offs) \ argument
88 .nr_pins = pins, \
94 #define EXYNOS5433_PIN_BANK_EINTW(pins, reg, id, offs) \ argument
[all …]
/linux-6.14.4/drivers/pinctrl/renesas/
Dpinctrl-rzv2m.c1 // SPDX-License-Identifier: GPL-2.0
23 #include <linux/pinctrl/pinconf-generic.h>
28 #include <dt-bindings/pinctrl/rzv2m-pinctrl.h>
34 #define DRV_NAME "pinctrl-rzv2m"
60 * n indicates number of pins in the port, a is the register index
118 struct pinctrl_pin_desc *pins; member
120 const struct rzv2m_pinctrl_data *data; member
148 rzv2m_writel_we(pctrl->base + DI_MSK(port), pin, 1); in rzv2m_pinctrl_set_pfc_mode()
149 rzv2m_writel_we(pctrl->base + EN_MSK(port), pin, 1); in rzv2m_pinctrl_set_pfc_mode()
152 addr = pctrl->base + PFSEL(port) + (pin / 4) * 4; in rzv2m_pinctrl_set_pfc_mode()
[all …]
/linux-6.14.4/drivers/pinctrl/vt8500/
Dpinctrl-wmt.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include <linux/pinctrl/pinconf-generic.h>
24 #include "pinctrl-wmt.h"
26 static inline void wmt_setbits(struct wmt_pinctrl_data *data, u32 reg, in wmt_setbits() argument
31 val = readl_relaxed(data->base + reg); in wmt_setbits()
33 writel_relaxed(val, data->base + reg); in wmt_setbits()
36 static inline void wmt_clearbits(struct wmt_pinctrl_data *data, u32 reg, in wmt_clearbits() argument
41 val = readl_relaxed(data->base + reg); in wmt_clearbits()
43 writel_relaxed(val, data->base + reg); in wmt_clearbits()
75 struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); in wmt_pmx_get_function_groups() local
[all …]
/linux-6.14.4/drivers/pinctrl/realtek/
Dpinctrl-rtd.c1 // SPDX-License-Identifier: GPL-2.0-or-later
15 #include <linux/pinctrl/pinconf-generic.h>
23 #include "../pinctrl-utils.h"
24 #include "pinctrl-rtd.h"
41 {"realtek,drive-strength-p", RTD_DRIVE_STRENGH_P, 0},
42 {"realtek,drive-strength-n", RTD_DRIVE_STRENGH_N, 0},
43 {"realtek,duty-cycle", RTD_DUTY_CYCLE, 0},
48 struct rtd_pinctrl *data = pinctrl_dev_get_drvdata(pcdev); in rtd_pinctrl_get_groups_count() local
50 return data->info->num_groups; in rtd_pinctrl_get_groups_count()
56 struct rtd_pinctrl *data = pinctrl_dev_get_drvdata(pcdev); in rtd_pinctrl_get_group_name() local
[all …]
/linux-6.14.4/drivers/pinctrl/
Dpinctrl-zynqmp.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
20 #include <linux/firmware/xlnx-zynqmp.h>
22 #include <linux/pinctrl/pinconf-generic.h>
28 #include "pinctrl-utils.h"
55 * struct zynqmp_pmux_function - a pinmux function
70 * struct zynqmp_pinctrl - driver data
77 * This struct is stored as driver data and used to retrieve
79 * group pins.
90 * struct zynqmp_pctrl_group - Pin control group info
[all …]
Dpinctrl-lantiq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/pinctrl/pinctrl-lantiq.c
4 * based on linux/drivers/pinctrl/pinctrl-pxa3xx.c
17 #include "pinctrl-lantiq.h"
22 return info->num_grps; in ltq_get_group_count()
29 if (selector >= info->num_grps) in ltq_get_group_name()
31 return info->grps[selector].name; in ltq_get_group_name()
36 const unsigned **pins, in ltq_get_group_pins() argument
40 if (selector >= info->num_grps) in ltq_get_group_pins()
41 return -EINVAL; in ltq_get_group_pins()
[all …]
Dpinctrl-single.c25 #include <linux/pinctrl/pinconf-generic.h>
30 #include <linux/platform_data/pinctrl-single.h>
37 #define DRIVER_NAME "pinctrl-single"
41 * struct pcs_func_vals - mux function register offset and value pair
53 * struct pcs_conf_vals - pinconf parameter, pinconf register offset
70 * struct pcs_conf_type - pinconf property name, pinconf param pair
80 * struct pcs_function - pinctrl function
98 * struct pcs_gpiofunc_range - pin ranges with same mux value of gpio function
99 * @offset: offset base of pins
100 * @npins: number pins with the same mux value of gpio function
[all …]
/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dqdu1000.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,qdu1000-gcc.h>
7 #include <dt-bindings/clock/qcom,rpmh.h>
8 #include <dt-bindings/dma/qcom-gpi.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interconnect/qcom,icc.h>
11 #include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
[all …]
Dsc7180-idp.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
14 #include "sc7180-firmware-tfa.dtsi"
20 compatible = "qcom,sc7180-idp", "qcom,sc7180";
30 stdout-path = "serial0:115200n8";
42 /delete-node/ &hyp_mem;
43 /delete-node/ &xbl_mem;
[all …]
Dsc8280xp-crd.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sc8280xp-pmics.dtsi"
17 compatible = "qcom,sc8280xp-crd", "qcom,sc8280xp";
27 compatible = "pwm-backlight";
29 enable-gpios = <&pmc8280_1_gpios 8 GPIO_ACTIVE_HIGH>;
30 power-supply = <&vreg_edp_bl>;
32 pinctrl-names = "default";
[all …]
/linux-6.14.4/arch/arm/boot/dts/marvell/
Dkirkwood-nsa320.dts1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright (c) 2014, Adam Baker <linux@baker-net.org.uk>
9 /dts-v1/;
11 #include "kirkwood-nsa3x0-common.dtsi"
15 compatible = "zyxel,nsa320", "marvell,kirkwood-88f6281", "marvell,kirkwood";
24 stdout-path = &uart0;
28 pinctrl: pin-controller@10000 {
29 pinctrl-names = "default";
31 /* SATA Activity and Present pins are not connected */
32 pmx_sata0: pmx-sata0 {
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/iio/resolver/
Dadi,ad2s1210.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AD2S1210 Resolver-to-Digital Converter
10 - Michael Hennerich <[email protected]>
13 The AD2S1210 is a complete 10-bit to 16-bit resolution tracking
14 resolver-to-digital converter, integrating an on-board programmable
19 angular velocity data directly from the parallel outputs or through
23 selected by the A0 and A1 input pins. In normal mode, data is latched by
25 data is read or written using a register access scheme (address byte with
[all …]
/linux-6.14.4/sound/soc/
Dsoc-jack.c1 // SPDX-License-Identifier: GPL-2.0+
3 // soc-jack.c -- ALSA SoC jack handling
20 * snd_soc_jack_report - Report the current status for a jack
27 * DAPM pins will be enabled or disabled as appropriate and DAPM
39 if (!jack || !jack->jack) in snd_soc_jack_report()
43 dapm = &jack->card->dapm; in snd_soc_jack_report()
45 mutex_lock(&jack->mutex); in snd_soc_jack_report()
47 jack->status &= ~mask; in snd_soc_jack_report()
48 jack->status |= status & mask; in snd_soc_jack_report()
52 list_for_each_entry(pin, &jack->pins, list) { in snd_soc_jack_report()
[all …]
/linux-6.14.4/arch/arm/boot/dts/qcom/
Dqcom-apq8064-pins.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 sdcc1_default_state: sdcc1-default-state {
5 clk-pins {
6 pins = "sdc1_clk";
7 drive-strength = <16>;
8 bias-disable;
11 cmd-pins {
12 pins = "sdc1_cmd";
13 drive-strength = <10>;
14 bias-pull-up;
[all …]
/linux-6.14.4/drivers/pinctrl/freescale/
Dpinctrl-imx.c1 // SPDX-License-Identifier: GPL-2.0+
30 #include "pinctrl-imx.h"
43 for (i = 0; i < pctldev->num_groups; i++) { in imx_pinctrl_find_group_by_name()
45 if (grp && !strcmp(grp->grp.name, name)) in imx_pinctrl_find_group_by_name()
55 seq_printf(s, "%s", dev_name(pctldev->dev)); in imx_pin_dbg_show()
63 const struct imx_pinctrl_soc_info *info = ipctl->info; in imx_dt_node_to_map()
73 * config maps for pins in imx_dt_node_to_map()
75 grp = imx_pinctrl_find_group_by_name(pctldev, np->name); in imx_dt_node_to_map()
77 dev_err(ipctl->dev, "unable to find group for node %pOFn\n", np); in imx_dt_node_to_map()
78 return -EINVAL; in imx_dt_node_to_map()
[all …]
/linux-6.14.4/Documentation/driver-api/media/drivers/
Dbttv-devel.rst1 .. SPDX-License-Identifier: GPL-2.0
7 -------------------------
15 bttv-cards.c, which holds the information required for each board.
24 example. The file Documentation/admin-guide/media/bttv-cardlist.rst has a list
48 Below is a do-it-yourself description for you.
50 The bt8xx chips have 32 general purpose pins, and registers to control
51 these pins. One register is the output enable register
52 (``BT848_GPIO_OUT_EN``), it says which pins are actively driven by the
53 bt848 chip. Another one is the data register (``BT848_GPIO_DATA``), where
54 you can get/set the status if these pins. They can be used for input
[all …]

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