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/linux-6.14.4/Documentation/devicetree/bindings/pwm/
Dmicrochip,corepwm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Conor Dooley <[email protected]>
16 https://www.microsemi.com/existing-parts/parts/152118
19 - $ref: pwm.yaml#
24 - const: microchip,corepwm-rtl-v4
32 "#pwm-cells":
37 microchip,sync-update-mask:
40 In synchronous mode, all channels are updated at the beginning of the PWM period,
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/linux-6.14.4/sound/soc/codecs/
Des8311.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * es8311.c -- es8311 ALSA SoC audio driver
38 static const DECLARE_TLV_DB_SCALE(es8311_adc_vol_tlv, -9550, 50, 0);
68 0, 1, TLV_DB_SCALE_ITEM(-3010, 600, 0),
69 2, 3, TLV_DB_SCALE_ITEM(-2060, 250, 0),
70 4, 5, TLV_DB_SCALE_ITEM(-1610, 160, 0),
71 6, 7, TLV_DB_SCALE_ITEM(-1320, 120, 0),
72 8, 9, TLV_DB_SCALE_ITEM(-1100, 90, 0),
73 10, 11, TLV_DB_SCALE_ITEM(-930, 80, 0),
74 12, 15, TLV_DB_SCALE_ITEM(-780, 60, 0),
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Dtwl4030.c1 // SPDX-License-Identifier: GPL-2.0-only
28 #include <linux/mfd/twl4030-audio.h>
67 u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1];
79 twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte; in tw4030_init_ctl_cache()
89 return -EIO; in twl4030_read()
98 value = twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL]; in twl4030_read()
116 if (twl4030->earpiece_enabled) in twl4030_can_write_to_chip()
120 if (twl4030->predrivel_enabled) in twl4030_can_write_to_chip()
124 if (twl4030->predriver_enabled) in twl4030_can_write_to_chip()
128 if (twl4030->carkitl_enabled) in twl4030_can_write_to_chip()
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Dab8500-codec.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson SA 2012
8 * for ST-Ericsson.
14 * for ST-Ericsson.
29 #include <linux/mfd/abx500/ab8500-sysctrl.h>
30 #include <linux/mfd/abx500/ab8500-codec.h>
39 #include <sound/soc-dapm.h>
42 #include "ab8500-codec.h"
56 /* Nr of FIR/IIR-coeff banks in ANC-block */
114 /* Private data for AB8500 device-driver */
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Dpcm3168a.c1 // SPDX-License-Identifier: GPL-2.0-only
48 /* ADC/DAC side parameters */
97 "DAC 1/2/3/4 AND", "DAC 1/2/3/4 OR", "DAC 1/2/3 AND",
98 "DAC 1/2/3 OR", "DAC 4 AND", "DAC 4 OR" };
108 static const char *const pcm3168a_con[] = { "Differential", "Single-Ended" };
126 /* -100db to 0db, register values 0-54 cause mute */
127 static const DECLARE_TLV_DB_SCALE(pcm3168a_dac_tlv, -10050, 50, 1);
129 /* -100db to 20db, register values 0-14 cause mute */
130 static const DECLARE_TLV_DB_SCALE(pcm3168a_adc_tlv, -10050, 50, 1);
133 SOC_SINGLE("DAC Power-Save Switch", PCM3168A_DAC_PWR_MST_FMT,
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Dtlv320aic31xx.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2017 Texas Instruments Incorporated - https://www.ti.com/
10 * The TLV320AIC31xx series of audio codecs are low-power, highly integrated
11 * high performance codecs which provides a stereo DAC, a mono ADC,
12 * and mono/stereo Class-D speaker driver.
36 #include <dt-bindings/sound/tlv320aic31xx.h>
180 u8 ocmv; /* output common-mode voltage */
311 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6350, 50, 0);
313 static const DECLARE_TLV_DB_SCALE(adc_cgain_tlv, -2000, 50, 0);
317 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -6350, 50, 0);
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Dssm2602.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
46 *(Mask value to extract the corresponding Register field)
59 /*Left DAC Volume Control (SSM2602_REG_LEFT_DAC_VOL)*/
64 /*Right DAC Volume Control (SSM2602_REG_RIGHT_DAC_VOL)*/
74 #define APANA_SELECT_DAC 0x010 /* Select DAC (1=Select DAC, 0=Don't Select DAC) …
81 #define APDIGI_DE_EMPHASIS 0x006 /* De-Emphasis Control …
82 #define APDIGI_ENABLE_DAC_MUTE 0x008 /* DAC Mute Control …
91 #define PWR_DAC_PDN 0x008 /* DAC Power Down …
95 #define PWR_POWER_OFF 0x080 /* POWEROFF Mode …
101 #define IFACE_DAC_LR_SWAP 0x020 /* Swap DAC data control …
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Des8316.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * es8316.c -- es8316 ALSA SoC audio driver
6 * Authors: David Yang <yangxiaohua@everest-semi.com>,
21 #include <sound/soc-dapm.h>
26 /* In slave mode at single speed, the codec is documented as accepting 5
52 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(dac_vol_tlv, -9600, 50, 1);
53 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_vol_tlv, -9600, 50, 1);
54 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(alc_max_gain_tlv, -650, 150, 0);
55 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(alc_min_gain_tlv, -1200, 150, 0);
58 0, 10, TLV_DB_SCALE_ITEM(-1650, 150, 0),
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Dcs42l51.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * Based on cs4270.c - Copyright (c) Freescale Semiconductor
12 * - Only I2C is support. Not SPI
13 * - master mode *NOT* supported
47 unsigned int audio_mode; /* The mode (I2S or left-justified) */
66 ucontrol->value.enumerated.item[0] = 0; in cs42l51_get_chan_mix()
71 ucontrol->value.enumerated.item[0] = 1; in cs42l51_get_chan_mix()
74 ucontrol->value.enumerated.item[0] = 2; in cs42l51_get_chan_mix()
91 switch (ucontrol->value.enumerated.item[0]) { in cs42l51_set_chan_mix()
109 static const DECLARE_TLV_DB_SCALE(adc_pcm_tlv, -5150, 50, 0);
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Dtscs454.c1 // SPDX-License-Identifier: GPL-2.0
2 // tscs454.c -- TSCS454 ALSA SoC Audio driver
21 #include <sound/soc-dapm.h>
50 pll->id = id; in pll_init()
51 mutex_init(&pll->lock); in pll_init()
66 aif->id = id; in aif_init()
85 cache[((norm_addrs[i] + 1) * COEFF_SIZE) - 1] = 0x40; in init_coeff_ram_cache()
90 init_coeff_ram_cache(ram->cache); in coeff_ram_init()
91 mutex_init(&ram->lock); in coeff_ram_init()
101 u8 mask = 0x01 << (aif_id * 2 + !playback); in set_aif_status_active() local
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Dadau17x1.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2011-2014 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <[email protected]>
26 #include "adau-utils.h"
48 static const DECLARE_TLV_DB_MINMAX(adau17x1_digital_tlv, -9563, 0);
60 SOC_SINGLE("Playback De-emphasis Switch", ADAU17X1_DAC_CONTROL0,
65 SOC_ENUM("Mic Bias Mode", adau17x1_mic_bias_mode_enum),
74 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in adau17x1_pll_event()
78 adau->pll_regs[5] = 1; in adau17x1_pll_event()
80 adau->pll_regs[5] = 0; in adau17x1_pll_event()
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Dmc13783.c1 // SPDX-License-Identifier: GPL-2.0-or-later
20 #include <sound/soc-dapm.h>
97 struct snd_soc_component *component = dai->component; in mc13783_pcm_hw_params_dac()
109 return -EINVAL; in mc13783_pcm_hw_params_dac()
116 struct snd_soc_component *component = dai->component; in mc13783_pcm_hw_params_codec()
128 return -EINVAL; in mc13783_pcm_hw_params_codec()
141 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in mc13783_pcm_hw_params_sync()
150 struct snd_soc_component *component = dai->component; in mc13783_set_fmt()
152 unsigned int mask = AUDIO_CFS(3) | AUDIO_BCL_INV | AUDIO_CFS_INV | in mc13783_set_fmt() local
156 /* DAI mode */ in mc13783_set_fmt()
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Dmax98090.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * max98090.c -- MAX98090 ALSA SoC Audio driver
5 * Copyright 2011-2012 Maxim Integrated Products
32 { 0x07, 0x00 }, /* 07 DAC Path Quick */
46 { 0x14, 0x00 }, /* 14 Digital Mic Mode */
54 { 0x1C, 0x00 }, /* 1C Clock Mode */
60 { 0x21, 0x00 }, /* 21 Master Mode */
96 { 0x43, 0x00 }, /* 43 DAC Control */
279 /* Reset the codec by writing to this write-only reset register */ in max98090_reset()
280 ret = regmap_write(max98090->regmap, M98090_REG_SOFTWARE_RESET, in max98090_reset()
[all …]
Dcpcap.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2017 - 2018 Sebastian Reichel <[email protected]>
8 * Copyright (C) 2007 - 2009 Motorola, Inc.
14 #include <linux/mfd/motorola-cpcap.h>
19 /* Register 512 CPCAP_REG_VAUDIOC --- Audio Regulator and Bias Voltage */
27 /* Register 513 CPCAP_REG_CC --- CODEC */
45 /* Register 514 CPCAP_REG_CDI --- CODEC Digital Audio Interface */
62 /* Register 515 CPCAP_REG_SDAC --- Stereo DAC */
76 /* Register 516 CPCAP_REG_SDACDI --- Stereo DAC Digital Audio Interface */
92 /* Register 517 CPCAP_REG_TXI --- TX Interface */
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Dtwl6040.c1 // SPDX-License-Identifier: GPL-2.0-only
21 #include <sound/soc-dapm.h>
61 u8 dl12_cache[TWL6040_REG_HFRCTL - TWL6040_REG_HSLCTL + 1];
69 /* set of rates for each pll: low-power and high-performance */
95 #define to_twl6040(component) dev_get_drvdata((component)->dev->parent)
104 return -EIO; in twl6040_read()
112 value = priv->dl12_cache[reg - TWL6040_REG_HSLCTL]; in twl6040_read()
132 return priv->dl1_unmuted; in twl6040_can_write_to_chip()
135 return priv->dl2_unmuted; in twl6040_can_write_to_chip()
152 priv->dl12_cache[reg - TWL6040_REG_HSLCTL] = value; in twl6040_update_dl12_cache()
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/linux-6.14.4/drivers/iio/dac/
Drohm-bd79703.c1 // SPDX-License-Identifier: GPL-2.0-only
21 * The BD79703 uses 12-bit SPI commands. First four bits (high bits) define
22 * channel(s) which are operated on, and also the mode. The mode can be to set
23 * a DAC word only, or set DAC word and output. The data-sheet is not very
24 * specific on how a previously set DAC word can be 'taken in to use'. Thus
25 * this driver only uses the 'set DAC and output it' -mode.
27 * The BD79703 latches last 12-bits when the chip-select is toggled. Thus we
28 * can use 16-bit transfers which should be widely supported. To simplify this
30 * address. This allows us to separate channels/mode by address and treat the
31 * 8-bit register value as DAC word. The highest 4 bits of address will be
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Dad5755.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * AD5755, AD5755-1, AD5757, AD5735, AD5737 Digital to analog converters driver
128 * struct ad5755_platform_data - AD5755 DAC driver platform data
129 * @ext_dc_dc_compenstation_resistor: Whether an external DC-DC converter
131 * @dc_dc_phase: DC-DC converter phase.
132 * @dc_dc_freq: DC-DC converter frequency.
133 * @dc_dc_maxv: DC-DC maximum allowed boost voltage.
134 * @dac: Per DAC instance parameters.
135 * @dac.mode: The mode to be used for the DAC output.
136 * @dac.ext_current_sense_resistor: Whether an external current sense resistor
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Dvf610_dac.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Freescale Vybrid vf610 DAC driver
47 info->conv_mode = VF610_DAC_CONV_LOW_POWER; in vf610_dac_init()
50 writel(val, info->regs + VF610_DACx_STATCTRL); in vf610_dac_init()
57 val = readl(info->regs + VF610_DACx_STATCTRL); in vf610_dac_exit()
59 writel(val, info->regs + VF610_DACx_STATCTRL); in vf610_dac_exit()
64 unsigned int mode) in vf610_set_conversion_mode() argument
69 mutex_lock(&info->lock); in vf610_set_conversion_mode()
70 info->conv_mode = mode; in vf610_set_conversion_mode()
71 val = readl(info->regs + VF610_DACx_STATCTRL); in vf610_set_conversion_mode()
[all …]
Dad9739a.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Analog Devices AD9739a SPI DAC driver
5 * Copyright 2015-2024 Analog Devices Inc.
65 #define AD9739A_FSC_RANGE (AD9739A_FSC_MAX - AD9739A_FSC_MIN + 1)
69 #define AD9739A_DAC_CLK_RANGE (AD9739A_MAX_DAC_CLK - AD9739A_MIN_DAC_CLK + 1)
83 u32 mode; in ad9739a_oper_mode_get() local
86 ret = regmap_read(st->regmap, AD9739A_REG_DEC_CNT, &mode); in ad9739a_oper_mode_get()
90 mode = FIELD_GET(AD9739A_DAC_DEC, mode); in ad9739a_oper_mode_get()
92 if (mode != AD9739A_NORMAL_MODE && mode != AD9739A_MIXED_MODE) in ad9739a_oper_mode_get()
93 return -EIO; in ad9739a_oper_mode_get()
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Dti-dac7311.c1 // SPDX-License-Identifier: GPL-2.0
2 /* ti-dac7311.c - Texas Instruments 8/10/12-bit 1-channel DAC driver
37 * struct ti_dac_chip - TI DAC chip
61 return ti_dac->powerdown_mode + 1; in ti_dac_get_power()
68 u8 shift = 14 - ti_dac->resolution; in ti_dac_cmd()
70 ti_dac->buf[0] = (val << shift) & 0xFF; in ti_dac_cmd()
71 ti_dac->buf[1] = (power << 6) | (val >> (8 - shift)); in ti_dac_cmd()
72 return spi_write(ti_dac->spi, ti_dac->buf, 2); in ti_dac_cmd()
86 return ti_dac->powerdown_mode; in ti_dac_get_powerdown_mode()
91 unsigned int mode) in ti_dac_set_powerdown_mode() argument
[all …]
/linux-6.14.4/sound/pci/ice1712/
Dmaya44.c1 // SPDX-License-Identifier: GPL-2.0-or-later
83 snd_vt1724_write_i2c(ice, wm->addr, in wm8776_write()
86 wm->regs[reg] = val; in wm8776_write()
90 * update the given register with and/or mask and save the data to the cache
94 unsigned short mask, unsigned short val) in wm8776_write_bits() argument
96 val |= wm->regs[reg] & ~mask; in wm8776_write_bits()
97 if (val != wm->regs[reg]) { in wm8776_write_bits()
112 unsigned short mask; /* value mask */ member
113 unsigned short offset; /* zero-value offset */
123 .mask = 0x7f,
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/linux-6.14.4/drivers/comedi/drivers/
Ds626.c1 // SPDX-License-Identifier: GPL-2.0+
6 * COMEDI - Linux Control and Measurement Device Interface
10 * Copyright (C) 2002-2004 Sensoray Co., Inc.
68 * struct s626_private - Working data for s626 driver.
69 * @ai_cmd_running: non-zero if ai_cmd is running.
73 * @counter_int_enabs: counter interrupt enable mask for MISC2 register.
76 * @ana_buf: DMA buffer used to receive ADC data and hold DAC data.
77 * @dac_wbuf: pointer to logical adrs of DMA buffer used to hold DAC data.
78 * @dacpol: image of DAC polarity register.
98 #define S626_INDXMASK(C) (1 << (((C) > 2) ? ((C) * 2 - 1) : ((C) * 2 + 4)))
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/linux-6.14.4/include/video/
Dsstfb.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * linux/drivers/video/sstfb.h -- voodoo graphics frame buffer
105 # define LFB_WORD_SWIZZLE_WR BIT(11) /* enable write-wordswap (big-endian) */
106 # define LFB_BYTE_SWIZZLE_WR BIT(12) /* enable write-byteswap (big-endian) */
108 # define LFB_WORD_SWIZZLE_RD BIT(15) /* enable read-wordswap (big-endian) */
109 # define LFB_BYTE_SWIZZLE_RD BIT(16) /* enable read-byteswap (big-endian) */
157 #define DAC_READ FBIINIT2 /* in remap mode */
164 # define DAC_READ_CMD BIT(11) /* set read dacreg mode */
166 # define FBIINIT5_MASK 0xfa40ffff /* mask video bits*/
191 #define BLTCOMMAND 0x02f8 /* BitBLT command mode (v2 specific) */
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/linux-6.14.4/arch/alpha/kernel/
Dpci_iommu.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/dma-map-ops.h>
15 #include <linux/iommu-helper.h>
44 return (paddr >> (PAGE_SHIFT-1)) | 1; in mk_iommu_pte()
71 particular systems can over-align the arena. */ in iommu_arena_new_node()
76 arena->ptes = memblock_alloc_or_panic(mem_size, align); in iommu_arena_new_node()
78 spin_lock_init(&arena->lock); in iommu_arena_new_node()
79 arena->hose = hose; in iommu_arena_new_node()
80 arena->dma_base = base; in iommu_arena_new_node()
81 arena->size = window_size; in iommu_arena_new_node()
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/linux-6.14.4/include/sound/
Demu10k1.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
16 #include <sound/pcm-indirect.h>
25 /* ------------------- DEFINES -------------------- */
28 #define MAXPAGES0 4096 /* 32 bit mode */
29 #define MAXPAGES1 8192 /* 31 bit mode */
33 /* FIXME? - according to the OSS driver the EMU10K1 needs a 29 bit DMA mask */
35 #define AUDIGY_DMA_MASK 0xffffffffUL /* 32bit mode */
41 // This is used to define hardware bit-fields (sub-registers) by combining
43 // mask must represent a single run of adjacent bits.
44 // The non-concatenating (_NC) variant should be used directly only for
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