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/linux-6.14.4/Documentation/devicetree/bindings/memory-controllers/
Dti,gpmc-child.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <[email protected]>
11 - Roger Quadros <[email protected]>
24 gpmc,sync-clk-ps:
28 # Chip-select signal timings corresponding to GPMC_CONFIG2:
29 gpmc,cs-on-ns:
33 gpmc,cs-rd-off-ns:
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/linux-6.14.4/include/linux/platform_data/
Dgpmc-omap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2014 Texas Instruments, Inc. - https://www.ti.com
34 /* Chip-select signal timings corresponding to GPMC_CS_CONFIG2 */
58 u32 page_burst_access; /* Multiple access word delay */
59 u32 access; /* Start-cycle to first data valid delay */
78 u32 t_ceasu; /* address setup to CS valid */
94 u32 t_ce; /* access time from CS asertion */
96 u32 t_cez_r; /* read CS deassertion to high Z */
97 u32 t_cez_w; /* write CS deassertion to high Z */
105 u32 t_bacc; /* burst access valid clock to output delay */
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/linux-6.14.4/drivers/memory/
Domap-gpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2005-2006 Nokia Corporation
10 * Added OMAP4 support - Santosh Shilimkar <[email protected]>
33 #include <linux/omap-gpmc.h>
37 #include <linux/platform_data/mtd-nand-omap2.h>
39 #define DEVICE_NAME "omap-gpmc"
207 /* Structure to save gpmc cs context */
258 /* Define chip-selects as reserved by default until probe completes */
278 void gpmc_cs_write_reg(int cs, int idx, u32 val) in gpmc_cs_write_reg() argument
282 reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; in gpmc_cs_write_reg()
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/linux-6.14.4/include/linux/spi/
Dspi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later
23 /* Max no. of CS supported per spi device */
36 * INTERFACES between SPI master-side drivers and SPI slave protocol handlers,
42 * struct spi_statistics - statistics for spi transfers
43 * @syncp: seqcount to protect members in this struct for per-cpu update
44 * on 32-bit systems
46 * @messages: number of spi-messages handled
95 u64_stats_update_begin(&__lstats->syncp); \
96 u64_stats_add(&__lstats->field, count); \
97 u64_stats_update_end(&__lstats->syncp); \
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/linux-6.14.4/drivers/iio/adc/
Dad4695.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include <linux/delay.h>
33 #include <dt-bindings/iio/adc/adi,ad4695.h>
139 * to control CS and add a delay between the last SCLK and next
189 .name = "ad4695-8",
219 .name = "ad4695-16",
296 * ad4695_set_single_cycle_mode - Set the device in single cycle mode
312 ret = regmap_clear_bits(st->regmap, AD4695_REG_SEQ_CTRL, in ad4695_set_single_cycle_mode()
318 ret = regmap_write(st->regmap, AD4695_REG_AS_SLOT(0), in ad4695_set_single_cycle_mode()
323 return regmap_set_bits(st->regmap, AD4695_REG_SETUP, in ad4695_set_single_cycle_mode()
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Dad4000.c1 // SPDX-License-Identifier: GPL-2.0+
53 .shift = _storage_bits - _real_bits, \
82 .shift = _storage_bits - _real_bits, \
108 /* maps adi,sdi-pin property value to enum */
112 [AD4000_SDI_CS] = "cs",
153 /* AD7946, AD7686, AD7688, AD7988-5, AD7693 */
177 /* AD7988-1 */
384 .dev_name = "ad7988-1",
390 .dev_name = "ad7988-5",
434 if (chan->scan_type.sign == 's') in ad4000_fill_scale_tbl()
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Dad7380.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * ad7380/1 : https://www.analog.com/media/en/technical-documentation/data-sheets/AD7380-7381.pdf
10 * ad7383/4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7383-7384.pdf
11 …* ad7386/7/8 : https://www.analog.com/media/en/technical-documentation/data-sheets/AD7386-7387-738…
12 * ad7380-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7380-4.pdf
13 * ad7381-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7381-4.pdf
14 …* ad7383/4-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7383-4-ad7384…
15 …* ad7386/7/8-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7386-4-7387…
16 * adaq4370-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4370-4.pdf
17 * adaq4380-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4380-4.pdf
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Dad7923.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright 2012 CS Systemes d'Information
17 #include <linux/delay.h>
47 #define EXTRACT(val, dec, bits) (((val) >> (dec)) & ((1 << (bits)) - 1))
64 * Length = 8 channels + 4 extra for 8 byte timestamp
97 .shift = 12 - (bits), \
172 for_each_set_bit(i, active_scan_mask, indio_dev->num_channels - 1) { in ad7923_update_scan_mode()
175 st->settings; in ad7923_update_scan_mode()
177 st->tx_buf[len++] = cpu_to_be16(cmd); in ad7923_update_scan_mode()
180 st->ring_xfer[0].tx_buf = &st->tx_buf[0]; in ad7923_update_scan_mode()
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Dti-ads1298.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2023 - 2024 Topic Embedded Products
10 #include <linux/delay.h>
89 * 2x the clock rate, this would require extra time between the command byte and
94 /* For reading and writing registers, we need a 3-byte buffer */
96 /* Outputs status word and 'n' 24-bit samples, plus the command byte */
119 * >2 = Multiple DRDY during transfer, lost rdata_xfer_busy - 2 samples
173 .tx_buf = priv->cmd_buffer, in ads1298_write_cmd()
174 .rx_buf = priv->cmd_buffer, in ads1298_write_cmd()
177 .delay = { in ads1298_write_cmd()
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/linux-6.14.4/net/ipv4/
Dtcp_vegas.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * IEEE Journal on Selected Areas in Communication, 13(8):1465--1480,
10 * ftp://ftp.cs.arizona.edu/xkernel/Papers/jsac.ps
12 * See http://www.cs.arizona.edu/xkernel/ for their implementation.
17 * using fine-grained timers, NewReno, and FACK.
19 * only every-other RTT during slow start, we increase during
29 * o When the sender re-starts from idle, it waits until it has
55 /* There are several situations when we must "re-start" Vegas:
65 * stale info -- both the saved cwnd and congestion feedback are
77 vegas->doing_vegas_now = 1; in vegas_enable()
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/linux-6.14.4/drivers/spi/
Dspi-axi-spi-engine.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * SPI-Engine SPI controller driver
5 * Author: Lars-Peter Clausen <[email protected]>
10 #include <linux/fpga/adi-axi-common.h>
63 /* Arbitrary sync ID for use by host->cur_msg */
71 #define SPI_ENGINE_CMD_ASSERT(delay, cs) \ argument
72 SPI_ENGINE_CMD(SPI_ENGINE_INST_ASSERT, (delay), (cs))
75 #define SPI_ENGINE_CMD_SLEEP(delay) \ argument
76 SPI_ENGINE_CMD(SPI_ENGINE_INST_MISC, SPI_ENGINE_MISC_SLEEP, (delay))
88 * struct spi_engine_message_state - SPI engine per-message state
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Dspi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/clk/clk-conf.h>
10 #include <linux/delay.h>
13 #include <linux/dma-mapping.h>
35 #include <linux/spi/spi-mem.h>
51 spi_controller_put(spi->controller); in spidev_release()
52 kfree(spi->driver_override); in spidev_release()
53 free_percpu(spi->pcpu_statistics); in spidev_release()
63 len = acpi_device_modalias(dev, buf, PAGE_SIZE - 1); in modalias_show()
64 if (len != -ENODEV) in modalias_show()
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Dspi-imx.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
9 #include <linux/delay.h>
11 #include <linux/dma-mapping.h>
30 #include <linux/dma/imx-dma.h>
138 return d->devtype_data->devtype == IMX27_CSPI; in is_imx27_cspi()
143 return d->devtype_data->devtype == IMX35_CSPI; in is_imx35_cspi()
148 return d->devtype_data->devtype == IMX51_ECSPI; in is_imx51_ecspi()
153 return d->devtype_data->devtype == IMX53_ECSPI; in is_imx53_ecspi()
159 unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA); \
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Dspi-mt7621.c1 // SPDX-License-Identifier: GPL-2.0
3 // spi-mt7621.c -- MediaTek MT7621 SPI controller driver
6 // Copyright (C) 2011-2013 Gabor Juhos <[email protected]>
7 // Copyright (C) 2014-2015 Felix Fietkau <[email protected]>
9 // Some parts are based on spi-orion.c:
11 // Copyright (C) 2007-2008 Marvell Ltd.
14 #include <linux/delay.h>
23 #define DRIVER_NAME "spi-mt7621"
67 return spi_controller_get_devdata(spi->controller); in spidev_to_mt7621_spi()
72 return ioread32(rs->base + reg); in mt7621_spi_read()
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/linux-6.14.4/drivers/mtd/nand/raw/
Dpl35x-nand-controller.c1 // SPDX-License-Identifier: GPL-2.0
15 #include <linux/delay.h>
31 #define PL35X_NANDC_DRIVER_NAME "pl35x-nand-controller"
119 unsigned int cs; member
126 * struct pl35x_nandc - NAND flash controller driver structure
133 * @assigned_cs: List of assigned CS
162 if (section >= chip->ecc.steps) in pl35x_ecc_ooblayout16_ecc()
163 return -ERANGE; in pl35x_ecc_ooblayout16_ecc()
165 oobregion->offset = (section * chip->ecc.bytes); in pl35x_ecc_ooblayout16_ecc()
166 oobregion->length = chip->ecc.bytes; in pl35x_ecc_ooblayout16_ecc()
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Dmarvell_nand.c1 // SPDX-License-Identifier: GPL-2.0
6 * Author: Miquel RAYNAL <miquel.raynal@free-electrons.com>
17 * The ECC layouts are depicted in details in Marvell AN-379, but here
28 * +-------------------------------------------------------------+
30 * +-------------------------------------------------------------+
33 * ECC) sections and potentially an extra one to deal with
39 * +-----------------------------------------
41 * +-----------------------------------------
43 * -------------------------------------------
45 * -------------------------------------------
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Darasan-nand-controller.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014 - 2020 Xilinx, Inc.
16 #include <linux/delay.h>
17 #include <linux/dma-mapping.h>
114 #define ANFC_MAX_PKT_SIZE (SZ_2K - 1)
124 * struct anfc_op - Defines how to execute an operation
150 * struct anand - Defines the NAND chip related information
153 * @rb: Ready-busy line
157 * @timings: NV-DDR specific timings to use
167 * @cs_idx: Array of chip-select for this device, values are indexes
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/linux-6.14.4/Documentation/spi/
Dspi-summary.rst5 02-Feb-2012
8 ------------
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
32 - SPI may be used for request/response style device protocols, as with
35 - It may also be used to stream data in either direction (half duplex),
38 - Some devices may use eight bit words. Others may use different word
39 lengths, such as streams of 12-bit or 20-bit digital samples.
41 - Words are usually sent with their most significant bit (MSB) first,
44 - Sometimes SPI is used to daisy-chain devices, like shift registers.
51 SPI is only one of the names used by such four-wire protocols, and
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/linux-6.14.4/drivers/gpu/drm/i915/gt/
Dintel_ring_submission.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2008-2021 Intel Corporation
32 * set-context and then emitting the batch.
42 if (engine->class == RENDER_CLASS) { in set_hwstam()
43 if (GRAPHICS_VER(engine->i915) >= 6) in set_hwstam()
57 if (GRAPHICS_VER(engine->i915) >= 4) in set_hws_pga()
60 intel_uncore_write(engine->uncore, HWS_PGA, addr); in set_hws_pga()
65 struct drm_i915_gem_object *obj = engine->status_page.vma->obj; in status_page()
68 return sg_page(obj->mm.pages->sgl); in status_page()
85 if (GRAPHICS_VER(engine->i915) == 7) { in set_hwsp()
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Dintel_migrate.c1 // SPDX-License-Identifier: MIT
19 #define CHUNK_SZ SZ_8M /* ~1ms at 8GiB/s preemption delay */
33 GEM_BUG_ON(engine->class != COPY_ENGINE_CLASS); in engine_supports_migration()
48 vm->insert_page(vm, 0, d->offset, in xehp_toggle_pdes()
49 i915_gem_get_pat_index(vm->i915, I915_CACHE_NONE), in xehp_toggle_pdes()
51 GEM_BUG_ON(!pt->is_compact); in xehp_toggle_pdes()
52 d->offset += SZ_2M; in xehp_toggle_pdes()
68 vm->insert_page(vm, px_dma(pt), d->offset, in xehp_insert_pte()
69 i915_gem_get_pat_index(vm->i915, I915_CACHE_NONE), in xehp_insert_pte()
71 d->offset += SZ_64K; in xehp_insert_pte()
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Dintel_engine_cs.c1 // SPDX-License-Identifier: MIT
40 * on HSW) - so the final size, including the extra state required for the
260 * intel_engine_context_size() - return the size of the context for an engine
275 struct intel_uncore *uncore = gt->uncore; in intel_engine_context_size()
284 switch (GRAPHICS_VER(gt->i915)) { in intel_engine_context_size()
286 MISSING_CASE(GRAPHICS_VER(gt->i915)); in intel_engine_context_size()
296 if (IS_HASWELL(gt->i915)) in intel_engine_context_size()
320 GRAPHICS_VER(gt->i915), cxt_size * 64, in intel_engine_context_size()
321 cxt_size - 1); in intel_engine_context_size()
337 if (GRAPHICS_VER(gt->i915) < 8) in intel_engine_context_size()
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/linux-6.14.4/include/linux/mtd/
Drawnand.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright © 2000-2010 David Woodhouse <[email protected]>
75 #define NAND_CMD_NONE -1
84 #define NAND_DATA_IFACE_CHECK_ONLY -1
98 * ecc.correct() returns -EBADMSG.
124 * Chip requires ready check on read (for auto-incremented sequential read).
142 #define NAND_HAS_SUBPAGE_READ(chip) ((chip->options & NAND_SUBPAGE_READ))
174 * In case your controller is implementing ->legacy.cmd_ctrl() and is relying
175 * on the default ->cmdfunc() implementation, you may want to let the core
176 * handle the tCCS delay which is required when a column change (RNDIN or
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/linux-6.14.4/drivers/infiniband/hw/qib/
Dqib_iba6120.c2 * Copyright (c) 2013 - 2017 Intel Corporation. All rights reserved.
17 * - Redistributions of source code must retain the above
21 * - Redistributions in binary form must reproduce the above
42 #include <linux/delay.h>
54 * This file contains all the chip-specific register information and
55 * access functions for the Intel Intel_IB PCI-Express chip.
59 /* KREG_IDX uses machine-generated #defines */
62 /* Use defines to tie machine-generated names to lower-case names */
115 #define CREG_IDX(regname) ((QIB_6120_##regname##_OFFS - \
237 * DDR when faking DDR negotiations with non-IBTA switches.
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/linux-6.14.4/drivers/staging/fbtft/
Dfbtft-core.c1 // SPDX-License-Identifier: GPL-2.0+
21 #include <linux/delay.h>
41 gpiod_set_value(par->gpio.dc, dc); in fbtft_write_buf_dc()
43 ret = par->fbtftops.write(par, buf, len); in fbtft_write_buf_dc()
45 dev_err(par->info->device, in fbtft_write_buf_dc()
64 512 - text_len, false); in fbtft_dbg_hex()
77 struct device *dev = par->info->device; in fbtft_request_one_gpio()
95 ret = fbtft_request_one_gpio(par, "reset", 0, &par->gpio.reset); in fbtft_request_gpios()
98 ret = fbtft_request_one_gpio(par, "dc", 0, &par->gpio.dc); in fbtft_request_gpios()
101 ret = fbtft_request_one_gpio(par, "rd", 0, &par->gpio.rd); in fbtft_request_gpios()
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/linux-6.14.4/include/linux/iio/imu/
Dadis.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Author: Lars-Peter Clausen <[email protected]>
28 * struct adis_timeouts - ADIS chip variant timeouts
29 * @reset_ms - Wait time after rst pin goes inactive
30 * @sw_reset_ms - Wait time after sw reset command
31 * @self_test_ms - Wait time after self test command
40 * struct adis_data - ADIS chip variant specific data
41 * @read_delay: SPI delay for read operations in us
42 * @write_delay: SPI delay for write operations in us
43 * @cs_change_delay: SPI delay between CS changes in us
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