Home
last modified time | relevance | path

Searched +full:cmdq +full:- +full:sync (Results 1 – 25 of 25) sorted by relevance

/linux-6.14.4/drivers/crypto/cavium/nitrox/
Dnitrox_reqmgr.c1 // SPDX-License-Identifier: GPL-2.0
24 * 0x00 - Success
26 * 0x43 - ERR_GC_DATA_LEN_INVALID
28 * less than 16 bytes for AES-XTS and AES-CTS.
29 * 0x45 - ERR_GC_CTX_LEN_INVALID
31 * 0x4F - ERR_GC_DOCSIS_CIPHER_INVALID
33 * AES/DES-CBC mode encryption.
34 * 0x50 - ERR_GC_DOCSIS_OFFSET_INVALID
39 * 0x51 - ERR_GC_CRC32_INVALID_SELECTION
41 * 0x52 - ERR_GC_AES_CCM_FLAG_INVALID
[all …]
/linux-6.14.4/drivers/iommu/arm/arm-smmu-v3/
Darm-smmu-v3.c1 // SPDX-License-Identifier: GPL-2.0
19 #include <linux/io-pgtable.h>
27 #include <linux/pci-ats.h>
33 #include "arm-smmu-v3.h"
34 #include "../../dma-iommu.h"
39 "Disable MSI-based polling for CMD_SYNC completion.");
82 { ARM_SMMU_OPT_SKIP_PREFETCH, "hisilicon,broken-prefetch-cmd" },
83 { ARM_SMMU_OPT_PAGE0_REGS_ONLY, "cavium,cn9900-broken-page1-regspace"},
116 if (of_property_read_bool(smmu->dev->of_node, in parse_driver_options()
118 smmu->options |= arm_smmu_options[i].opt; in parse_driver_options()
[all …]
Darm-smmu-v3.h1 /* SPDX-License-Identifier: GPL-2.0-only */
104 /* CR1 cacheability fields don't quite follow the usual TCR-style encoding */
185 #define Q_IDX(llq, p) ((p) & ((1 << (llq)->max_n_shift) - 1))
186 #define Q_WRP(llq, p) ((p) & (1 << (llq)->max_n_shift))
189 #define Q_ENT(q, p) ((q)->base + \
190 Q_IDX(&((q)->llq), p) * \
191 (q)->ent_dwords)
381 #define CMDQ_MAX_SZ_SHIFT (Q_MAX_SZ_SHIFT - CMDQ_ENT_SZ_SHIFT)
451 #define EVTQ_MAX_SZ_SHIFT (Q_MAX_SZ_SHIFT - EVTQ_ENT_SZ_SHIFT)
487 #define PRIQ_MAX_SZ_SHIFT (Q_MAX_SZ_SHIFT - PRIQ_ENT_SZ_SHIFT)
[all …]
/linux-6.14.4/include/dt-bindings/gce/
Dmt8186-gce.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
82 /* CMDQ: debug */
85 /* CMDQ: P7: debug */
348 /* CMDQ sw tokens
367 /* Notify normal CMDQ there are some secure task done
368 * MUST NOT CHANGE, this token sync with secure world
372 /* CMDQ use sw token */
386 * There are 15 32-bit GPR, 3 GPR form a set
387 * (64-bit for address, 32-bit for value)
388 * MUST NOT CHANGE, these tokens sync with MDP
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/iommu/
Darm,smmu-v3.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/iommu/arm,smmu-v3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Will Deacon <[email protected]>
11 - Robin Murphy <[email protected]>
15 revisions, replacing the MMIO register interface with in-memory command
21 pattern: "^iommu@[0-9a-f]*"
23 const: arm,smmu-v3
32 interrupt-names:
[all …]
/linux-6.14.4/drivers/accel/ivpu/
Divpu_mmu.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-2024 Intel Corporation
76 #define IVPU_MMU_Q_IDX_MASK (IVPU_MMU_Q_COUNT - 1)
226 #define IVPU_MMU_GERROR_ERR_MASK ((REG_FLD(IVPU_MMU_REG_GERROR, CMDQ)) | \
253 return "Transaction marks non-substream disabled"; in ivpu_mmu_event_to_str()
295 return "Sync failed to complete ATS invalidation"; in ivpu_mmu_cmdq_err_to_str()
337 struct ivpu_mmu_info *mmu = vdev->mmu; in ivpu_mmu_cdtab_alloc()
338 struct ivpu_mmu_cdtab *cdtab = &mmu->cdtab; in ivpu_mmu_cdtab_alloc()
341 cdtab->base = dmam_alloc_coherent(vdev->drm.dev, size, &cdtab->dma, GFP_KERNEL); in ivpu_mmu_cdtab_alloc()
342 if (!cdtab->base) in ivpu_mmu_cdtab_alloc()
[all …]
Dvpu_jsm_api.h1 /* SPDX-License-Identifier: MIT */
3 * Copyright (c) 2020-2024, Intel Corporation.
75 /* Job status returned when the job was preempted mid-inference */
80 * Host <-> VPU IPC channels.
81 * ASYNC commands use a high priority channel, other messages use low-priority ones.
132 * does not need per-job fence signalling. Other inline commands objects can be
159 * same process with a relative in-process priority. Valid values for relative
160 * priority are given below - max and min.
163 #define VPU_HWS_COMMAND_QUEUE_MIN_IN_PROCESS_PRIORITY -7
206 * present in the queue prior to them, and in-order relative to each other in the queue.
[all …]
/linux-6.14.4/drivers/net/ethernet/huawei/hinic/
Dhinic_hw_cmdq.c1 // SPDX-License-Identifier: GPL-2.0-only
78 #define cmdq_to_cmdqs(cmdq) container_of((cmdq) - (cmdq)->cmdq_type, \ argument
79 struct hinic_cmdqs, cmdq[0])
96 BUFDESC_LCMD_LEN = 2, /* 16 bytes - 2(8 byte unit) */
97 BUFDESC_SCMD_LEN = 3, /* 24 bytes - 3(8 byte unit) */
101 CTRL_SECT_LEN = 1, /* 4 bytes (ctrl) - 1(8 byte unit) */
102 CTRL_DIRECT_SECT_LEN = 2, /* 12 bytes (ctrl + rsvd) - 2(8 byte unit) */
120 * hinic_alloc_cmdq_buf - alloc buffer for sending command
124 * Return 0 - Success, negative - Failure
129 struct hinic_hwif *hwif = cmdqs->hwif; in hinic_alloc_cmdq_buf()
[all …]
/linux-6.14.4/drivers/net/ethernet/hisilicon/hns3/hns3_common/
Dhclge_comm_cmd.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2021-2021 Hisilicon Limited.
10 dma_addr_t dma = ring->desc_dma_addr; in hclge_comm_cmd_config_regs()
13 if (ring->ring_type == HCLGE_COMM_TYPE_CSQ) { in hclge_comm_cmd_config_regs()
20 reg_val |= ring->desc_num >> HCLGE_COMM_NIC_CMQ_DESC_NUM_S; in hclge_comm_cmd_config_regs()
29 reg_val = ring->desc_num >> HCLGE_COMM_NIC_CMQ_DESC_NUM_S; in hclge_comm_cmd_config_regs()
38 hclge_comm_cmd_config_regs(hw, &hw->cmq.csq); in hclge_comm_cmd_init_regs()
39 hclge_comm_cmd_config_regs(hw, &hw->cmq.crq); in hclge_comm_cmd_init_regs()
44 desc->flag = cpu_to_le16(HCLGE_COMM_CMD_FLAG_NO_INTR | in hclge_comm_cmd_reuse_desc()
47 desc->flag |= cpu_to_le16(HCLGE_COMM_CMD_FLAG_WR); in hclge_comm_cmd_reuse_desc()
[all …]
/linux-6.14.4/drivers/infiniband/hw/bnxt_re/
Dqplib_rcfw.c2 * Broadcom NetXtreme-E RoCE driver.
4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
57 * bnxt_qplib_map_rc - map return type based on opcode
95 return -ETIMEDOUT; in bnxt_qplib_map_rc()
100 * bnxt_re_is_fw_stalled - Check firmware health
105 * rcfw->max_timeout, consider firmware as stalled.
109 * -ENODEV if firmware is not responding
114 struct bnxt_qplib_cmdq_ctx *cmdq; in bnxt_re_is_fw_stalled() local
117 crsqe = &rcfw->crsqe_tbl[cookie]; in bnxt_re_is_fw_stalled()
118 cmdq = &rcfw->cmdq; in bnxt_re_is_fw_stalled()
[all …]
/linux-6.14.4/drivers/iommu/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 # The IOVA library may also be used by non-IOMMU_API users
40 sizes at both stage-1 and stage-2, as well as address spaces
41 up to 48-bits in size.
47 Enable self-tests for LPAE page table allocator. This performs
48 a series of page-table consistency checks during boot.
57 Enable support for the ARM Short-descriptor pagetable format.
58 This supports 32-bit virtual and physical addresses mapped using
59 2-level tables with 4KB pages/1MB sections, and contiguous entries
66 Enable self-tests for ARMv7s page table allocator. This performs
[all …]
/linux-6.14.4/arch/arm64/boot/dts/arm/
Dfvp-base-revc.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Architecture Envelope Model (AEM) ARMv8-A
11 /dts-v1/;
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 #include "rtsm_ve-motherboard.dtsi"
18 #include "rtsm_ve-motherboard-rs2.dtsi"
22 compatible = "arm,fvp-base-revc", "arm,vexpress";
23 interrupt-parent = <&gic>;
24 #address-cells = <2>;
25 #size-cells = <2>;
[all …]
/linux-6.14.4/drivers/net/wireless/intel/iwlwifi/pcie/
Dtrans.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2007-2015, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
18 #include "iwl-drv.h"
19 #include "iwl-trans.h"
20 #include "iwl-csr.h"
21 #include "iwl-prph.h"
22 #include "iwl-scd.h"
23 #include "iwl-agn-hw.h"
[all …]
/linux-6.14.4/drivers/scsi/aacraid/
Dcomminit.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * Copyright (c) 2000-2010 Adaptec, Inc.
10 * 2010-2015 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
11 * 2016-2017 Microsemi Corp. ([email protected])
59 const unsigned long fibsize = dev->max_fib_size; in aac_alloc_comm()
66 if ((dev->comm_interface == AAC_COMM_MESSAGE_TYPE1) || in aac_alloc_comm()
67 (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) || in aac_alloc_comm()
68 (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3 && in aac_alloc_comm()
69 !dev->sa_firmware)) { in aac_alloc_comm()
71 (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) in aac_alloc_comm()
[all …]
Dcommsup.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * Copyright (c) 2000-2010 Adaptec, Inc.
10 * 2010-2015 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
11 * 2016-2017 Microsemi Corp. ([email protected])
42 * fib_map_alloc - allocate the fib objects
51 if (dev->max_fib_size > AAC_MAX_NATIVE_SIZE) in fib_map_alloc()
52 dev->max_cmd_size = AAC_MAX_NATIVE_SIZE; in fib_map_alloc()
54 dev->max_cmd_size = dev->max_fib_size; in fib_map_alloc()
55 if (dev->max_fib_size < AAC_MAX_NATIVE_SIZE) { in fib_map_alloc()
56 dev->max_cmd_size = AAC_MAX_NATIVE_SIZE; in fib_map_alloc()
[all …]
Daacraid.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
9 * Copyright (c) 2000-2010 Adaptec, Inc.
10 * 2010-2015 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
11 * 2016-2017 Microsemi Corp. ([email protected])
34 /*------------------------------------------------------------------------------
36 *----------------------------------------------------------------------------*/
61 /* Bit definitions in IOA->Host Interrupt Register */
90 # define AAC_DRIVER_BRANCH "-custom"
95 #define AAC_NUM_IO_FIB (1024 - AAC_NUM_MGT_FIB)
106 /* Thor: 5 phys. buses: #0: empty, 1-4: 256 targets each */
[all …]
/linux-6.14.4/drivers/accel/habanalabs/goya/
Dgoya.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright 2016-2022 HabanaLabs, Ltd.
23 * - Range registers (When MMU is enabled, DMA RR does NOT protect host)
24 * - MMU
27 * - Range registers (protect the first 512MB)
28 * - MMU (isolation between users)
31 * - Range registers
32 * - Protection bits
44 * - checks DMA pointer
45 * - WREG, MSG_PROT are not allowed.
[all …]
/linux-6.14.4/include/uapi/linux/
Diommufd.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /* Copyright (c) 2021-2022, NVIDIA CORPORATION & AFFILIATES.
23 * - ENOTTY: The IOCTL number itself is not supported at all
24 * - E2BIG: The IOCTL number is supported, but the provided structure has
25 * non-zero in a part the kernel does not understand.
26 * - EOPNOTSUPP: The IOCTL number is supported, and the structure is
29 * - EINVAL: Everything about the IOCTL was understood, but a field is not
31 * - ENOENT: An ID or IOVA provided does not exist.
32 * - ENOMEM: Out of memory.
33 * - EOVERFLOW: Mathematics overflowed.
[all …]
/linux-6.14.4/arch/arm64/boot/dts/rockchip/
Drk3588-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rk3588-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/power/rk3588-power.h>
10 #include <dt-bindings/reset/rockchip,rk3588-cru.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/ata/ahci.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
[all …]
/linux-6.14.4/drivers/acpi/arm64/
Diort.c1 // SPDX-License-Identifier: GPL-2.0-only
21 #include <linux/dma-map-ops.h>
45 * iort_set_fwnode() - Create iort_fwnode and use it to register
62 return -ENOMEM; in iort_set_fwnode()
64 INIT_LIST_HEAD(&np->list); in iort_set_fwnode()
65 np->iort_node = iort_node; in iort_set_fwnode()
66 np->fwnode = fwnode; in iort_set_fwnode()
69 list_add_tail(&np->list, &iort_fwnode_list); in iort_set_fwnode()
76 * iort_get_fwnode() - Retrieve fwnode associated with an IORT node
78 * @node: IORT table node to be looked-up
[all …]
/linux-6.14.4/drivers/scsi/
Dncr53c8xx.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 ** Device driver for the PCI-SCSI NCR538XX controller family.
8 **-----------------------------------------------------------------------------
22 ** Stefan Esser <[email protected]-Koeln.de>
27 **-----------------------------------------------------------------------------
38 ** Support for Fast-20 scsi.
42 ** Support for Fast-40 scsi.
43 ** Support for on-Board RAM.
46 ** Full support for scsi scripts instructions pre-fetching.
57 ** Low PCI traffic for command handling when on-chip RAM is present.
[all …]
/linux-6.14.4/arch/arm64/boot/dts/freescale/
Dimx95.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
6 #include <dt-bindings/dma/fsl-edma.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx95-clock.h"
13 #include "imx95-pinfunc.h"
14 #include "imx95-power.h"
17 interrupt-parent = <&gic>;
[all …]
/linux-6.14.4/drivers/net/ethernet/hisilicon/hns3/hns3pf/
Dhclge_main.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
326 { OUTER_DST_MAC, 48, KEY_OPT_MAC, -1, -1 },
327 { OUTER_SRC_MAC, 48, KEY_OPT_MAC, -1, -1 },
328 { OUTER_VLAN_TAG_FST, 16, KEY_OPT_LE16, -1, -1 },
329 { OUTER_VLAN_TAG_SEC, 16, KEY_OPT_LE16, -1, -1 },
330 { OUTER_ETH_TYPE, 16, KEY_OPT_LE16, -1, -1 },
331 { OUTER_L2_RSV, 16, KEY_OPT_LE16, -1, -1 },
332 { OUTER_IP_TOS, 8, KEY_OPT_U8, -1, -1 },
333 { OUTER_IP_PROTO, 8, KEY_OPT_U8, -1, -1 },
[all …]
/linux-6.14.4/drivers/net/ethernet/hisilicon/hns3/
Dhns3_enet.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
4 #include <linux/dma-mapping.h>
54 static int debug = -1;
79 /* hns3_pci_tbl - PCI Device ID Table
387 napi_schedule_irqoff(&tqp_vector->napi); in hns3_irq_handle()
388 tqp_vector->event_cnt++; in hns3_irq_handle()
398 for (i = 0; i < priv->vector_num; i++) { in hns3_nic_uninit_irq()
399 tqp_vectors = &priv->tqp_vector[i]; in hns3_nic_uninit_irq()
401 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED) in hns3_nic_uninit_irq()
[all …]
/linux-6.14.4/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-[email protected]
88 F: drivers/scsi/3w-*
[all …]