| /aosp_15_r20/external/virglrenderer/tests/ |
| H A D | test_fuzzer_formats.c | 119 uint32_t cmd[VIRGL_CMD_BLIT_SIZE + 1]; in test_format_wrong_size() local
122 cmd[i++] = VIRGL_CMD_BLIT_SIZE << 16 | 0 << 8 | VIRGL_CCMD_BLIT; in test_format_wrong_size()
123 cmd[i++] = 0x8000001; // s0 in test_format_wrong_size()
124 cmd[i++] = 0; // minxy in test_format_wrong_size()
125 cmd[i++] = 0; // maxxy in test_format_wrong_size()
126 cmd[i++] = 10; //dhandle in test_format_wrong_size()
127 cmd[i++] = 0; // dlevel in test_format_wrong_size()
128 cmd[i++] = 0x1000029; //dformat in test_format_wrong_size()
129 cmd[i++] = 0; //dx in test_format_wrong_size()
130 cmd[i++] = 0; // dy in test_format_wrong_size()
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| /aosp_15_r20/out/soong/.intermediates/frameworks/rs/rs_generated_sources/gen/gensrcs/frameworks/rs/ |
| D | rsgApiReplay.cpp | 33 const RS_CMD_ContextSendMessage *cmd = static_cast<const RS_CMD_ContextSendMessage *>(vp); in rsp_ContextSendMessage() local
36 baseData = &((const uint8_t *)vp)[sizeof(*cmd)]; in rsp_ContextSendMessage()
39 cmd->id, in rsp_ContextSendMessage()
40 cmd->data_length == 0 ? NULL : (const uint8_t *)&baseData[(intptr_t)cmd->data], in rsp_ContextSendMessage()
41 cmd->data_length); in rsp_ContextSendMessage()
43 totalSize += cmd->data_length; in rsp_ContextSendMessage()
50 …const RS_CMD_AllocationSetupBufferQueue *cmd = static_cast<const RS_CMD_AllocationSetupBufferQueue… in rsp_AllocationSetupBufferQueue() local
52 cmd->alloc, in rsp_AllocationSetupBufferQueue()
53 cmd->numAlloc); in rsp_AllocationSetupBufferQueue()
58 …const RS_CMD_AllocationShareBufferQueue *cmd = static_cast<const RS_CMD_AllocationShareBufferQueue… in rsp_AllocationShareBufferQueue() local
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| /aosp_15_r20/system/extras/tests/mmc_tracepoints/ |
| H A D | mmc_trace_sample_data | 12 … mmcqd/0-82 [000] ...1 49.828932: mmc_blk_rw_start: cmd=25,addr=0x002c6518,size=0x00000010
13 … <...>-1484 [000] ..s4 49.829171: mmc_blk_rw_end: cmd=25,addr=0x002c6518,size=0x00000010
14 … mmcqd/0-82 [000] ...1 49.830095: mmc_blk_rw_start: cmd=25,addr=0x002c6528,size=0x00000008
15 … kworker/0:2-48 [000] ..s4 49.830218: mmc_blk_rw_end: cmd=25,addr=0x002c6528,size=0x00000008
16 … mmcqd/0-82 [000] ...1 52.465957: mmc_blk_rw_start: cmd=18,addr=0x001ad578,size=0x00000020
17 … <idle>-0 [000] ..s3 52.466404: mmc_blk_rw_end: cmd=18,addr=0x001ad578,size=0x00000020
18 … mmcqd/0-82 [000] ...1 52.492868: mmc_blk_rw_start: cmd=18,addr=0x001aecb8,size=0x00000020
19 … <idle>-0 [000] ..s3 52.493157: mmc_blk_rw_end: cmd=18,addr=0x001aecb8,size=0x00000020
20 … mmcqd/0-82 [000] ...1 54.834287: mmc_blk_rw_start: cmd=25,addr=0x005420a8,size=0x00000008
21 … <idle>-0 [000] ..s3 54.834383: mmc_blk_rw_end: cmd=25,addr=0x005420a8,size=0x00000008
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| /aosp_15_r20/external/intel-media-driver/media_driver/agnostic/gen12/hw/vdbox/ |
| H A D | mhw_vdbox_mfx_g12_X.cpp | 639 mhw_vdbox_mfx_g12_X::MFX_PIPE_MODE_SELECT_CMD cmd; in AddMfxPipeModeSelectCmd() local
641 MHW_MI_CHK_STATUS(m_cpInterface->SetProtectionSettingsForMfxPipeModeSelect((uint32_t *)&cmd)); in AddMfxPipeModeSelectCmd()
643 cmd.DW1.StreamOutEnable = params->bStreamOutEnabled; in AddMfxPipeModeSelectCmd()
644 cmd.DW1.DeblockerStreamOutEnable = params->bDeblockerStreamOutEnable; in AddMfxPipeModeSelectCmd()
648 cmd.DW1.PreDeblockingOutputEnablePredeblockoutenable = params->bPreDeblockOutEnable; in AddMfxPipeModeSelectCmd()
649 cmd.DW1.PostDeblockingOutputEnablePostdeblockoutenable = params->bPostDeblockOutEnable; in AddMfxPipeModeSelectCmd()
650 cmd.DW1.CodecSelect = decoderCodec; in AddMfxPipeModeSelectCmd()
651 cmd.DW1.DecoderShortFormatMode = !params->bShortFormatInUse; in AddMfxPipeModeSelectCmd()
652 cmd.DW2.Vlf720IOddHeightInVc1Mode = params->bVC1OddFrameHeight; in AddMfxPipeModeSelectCmd()
656 cmd.DW1.DecoderModeSelect = mfxDecoderModeVld; in AddMfxPipeModeSelectCmd()
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| H A D | mhw_vdbox_vdenc_g12_X.h | 344 typename TVdencCmds::VD_PIPELINE_FLUSH_CMD cmd; in AddVdPipelineFlushCmd() local
347 cmd.DW1.HevcPipelineDone = params->Flags.bWaitDoneHEVC; in AddVdPipelineFlushCmd()
348 cmd.DW1.VdencPipelineDone = params->Flags.bWaitDoneVDENC; in AddVdPipelineFlushCmd()
349 cmd.DW1.MflPipelineDone = params->Flags.bWaitDoneMFL; in AddVdPipelineFlushCmd()
350 cmd.DW1.MfxPipelineDone = params->Flags.bWaitDoneMFX; in AddVdPipelineFlushCmd()
351 cmd.DW1.VdCommandMessageParserDone = params->Flags.bWaitDoneVDCmdMsgParser; in AddVdPipelineFlushCmd()
352 cmd.DW1.HevcPipelineCommandFlush = params->Flags.bFlushHEVC; in AddVdPipelineFlushCmd()
353 cmd.DW1.VdencPipelineCommandFlush = params->Flags.bFlushVDENC; in AddVdPipelineFlushCmd()
354 cmd.DW1.MflPipelineCommandFlush = params->Flags.bFlushMFL; in AddVdPipelineFlushCmd()
355 cmd.DW1.MfxPipelineCommandFlush = params->Flags.bFlushMFX; in AddVdPipelineFlushCmd()
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| H A D | mhw_vdbox_avp_g12_X.cpp | 531 mhw_vdbox_avp_g12_X::AVP_PIPE_MODE_SELECT_CMD cmd; in AddAvpPipeModeSelectCmd() local
538 cmd.DW1.CodecSelect = cmd.CODEC_SELECT_DECODE; in AddAvpPipeModeSelectCmd()
542 cmd.DW1.CodecSelect = cmd.CODEC_SELECT_ENCODE; in AddAvpPipeModeSelectCmd()
545 cmd.DW1.CdefOutputStreamoutEnableFlag = false; in AddAvpPipeModeSelectCmd()
546 cmd.DW1.LoopRestorationOutputStreamoutEnableFlag = false; in AddAvpPipeModeSelectCmd()
547 cmd.DW1.PicStatusErrorReportEnable = false; in AddAvpPipeModeSelectCmd()
548 cmd.DW1.CodecStandardSelect = 2; in AddAvpPipeModeSelectCmd()
549 cmd.DW1.MultiEngineMode = paramsG12->MultiEngineMode; in AddAvpPipeModeSelectCmd()
550 cmd.DW1.PipeWorkingMode = paramsG12->PipeWorkMode; in AddAvpPipeModeSelectCmd()
551 cmd.DW1.TileBasedEngine = paramsG12->bTileBasedReplayMode; in AddAvpPipeModeSelectCmd()
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| H A D | mhw_vdbox_hcp_g12_X.cpp | 1430 mhw_vdbox_hcp_g12_X::HCP_PIPE_MODE_SELECT_CMD cmd; in AddHcpPipeModeSelectCmd() local
1437 …MHW_MI_CHK_STATUS(m_cpInterface->SetProtectionSettingsForHcpPipeModeSelect((uint32_t *)&cmd, bTwoP… in AddHcpPipeModeSelectCmd()
1439 cmd.DW1.AdvancedRateControlEnable = params->bAdvancedRateControlEnable; in AddHcpPipeModeSelectCmd()
1440 …cmd.DW1.CodecStandardSelect = CodecHal_GetStandardFromMode(params->Mode) - CODECHAL_HCP_B… in AddHcpPipeModeSelectCmd()
1441 …cmd.DW1.PakPipelineStreamoutEnable = params->bStreamOutEnabled || paramsG12->bBRCEnabled || para… in AddHcpPipeModeSelectCmd()
1442 cmd.DW1.DeblockerStreamoutEnable = params->bDeblockerStreamOutEnable; in AddHcpPipeModeSelectCmd()
1443 cmd.DW1.VdencMode = params->bVdencEnabled; in AddHcpPipeModeSelectCmd()
1444 cmd.DW1.RdoqEnabledFlag = params->bRdoqEnable; in AddHcpPipeModeSelectCmd()
1445 …cmd.DW1.PakFrameLevelStreamoutEnable = params->bStreamOutEnabled || params->pakFrmLvlStrmoutEnable; in AddHcpPipeModeSelectCmd()
1446 cmd.DW1.PipeWorkingMode = paramsG12->PipeWorkMode; in AddHcpPipeModeSelectCmd()
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| /aosp_15_r20/external/intel-media-driver/media_driver/agnostic/gen11/hw/vdbox/ |
| H A D | mhw_vdbox_mfx_g11_X.cpp | 684 mhw_vdbox_mfx_g11_X::MFX_PIPE_MODE_SELECT_CMD cmd; in AddMfxPipeModeSelectCmd() local
686 MHW_MI_CHK_STATUS(m_cpInterface->SetProtectionSettingsForMfxPipeModeSelect((uint32_t *)&cmd)); in AddMfxPipeModeSelectCmd()
688 cmd.DW1.StreamOutEnable = params->bStreamOutEnabled; in AddMfxPipeModeSelectCmd()
689 cmd.DW1.DeblockerStreamOutEnable = params->bDeblockerStreamOutEnable; in AddMfxPipeModeSelectCmd()
693 cmd.DW1.PreDeblockingOutputEnablePredeblockoutenable = params->bPreDeblockOutEnable; in AddMfxPipeModeSelectCmd()
694 cmd.DW1.PostDeblockingOutputEnablePostdeblockoutenable = params->bPostDeblockOutEnable; in AddMfxPipeModeSelectCmd()
695 cmd.DW1.CodecSelect = decoderCodec; in AddMfxPipeModeSelectCmd()
696 cmd.DW1.DecoderShortFormatMode = !params->bShortFormatInUse; in AddMfxPipeModeSelectCmd()
697 cmd.DW2.Vlf720IOddHeightInVc1Mode = params->bVC1OddFrameHeight; in AddMfxPipeModeSelectCmd()
701 cmd.DW1.DecoderModeSelect = mfxDecoderModeVld; in AddMfxPipeModeSelectCmd()
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| H A D | mhw_vdbox_vdenc_g11_X.h | 492 typename TVdencCmds::VDENC_PIPE_MODE_SELECT_CMD cmd; in AddVdencPipeModeSelectCmd() local
494 cmd.DW1.StandardSelect = CodecHal_GetStandardFromMode(params->Mode); in AddVdencPipeModeSelectCmd()
495 …cmd.DW1.ScalabilityMode = !(paramsG11->MultiEngineMode == MHW_VDBOX_HCP_MULTI_ENGIN… in AddVdencPipeModeSelectCmd()
496 cmd.DW1.FrameStatisticsStreamOutEnable = 1; in AddVdencPipeModeSelectCmd()
497 cmd.DW1.VdencPakObjCmdStreamOutEnable = params->bVdencPakObjCmdStreamOutEnable; in AddVdencPipeModeSelectCmd()
498 cmd.DW1.TlbPrefetchEnable = params->bTlbPrefetchEnable; in AddVdencPipeModeSelectCmd()
499 cmd.DW1.PakThresholdCheckEnable = params->bDynamicSliceEnable; in AddVdencPipeModeSelectCmd()
500 cmd.DW1.VdencStreamInEnable = params->bVdencStreamInEnable; in AddVdencPipeModeSelectCmd()
501 cmd.DW1.BitDepth = params->ucVdencBitDepthMinus8; in AddVdencPipeModeSelectCmd()
505 cmd.DW1.PakChromaSubSamplingType = params->ChromaType; in AddVdencPipeModeSelectCmd()
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| H A D | mhw_vdbox_hcp_g11_X.cpp | 1204 mhw_vdbox_hcp_g11_X::HCP_PIPE_MODE_SELECT_CMD cmd; in AddHcpPipeModeSelectCmd() local
1211 …MHW_MI_CHK_STATUS(m_cpInterface->SetProtectionSettingsForHcpPipeModeSelect((uint32_t *)&cmd, scala… in AddHcpPipeModeSelectCmd()
1213 cmd.DW1.AdvancedRateControlEnable = params->bAdvancedRateControlEnable; in AddHcpPipeModeSelectCmd()
1214 …cmd.DW1.CodecStandardSelect = CodecHal_GetStandardFromMode(params->Mode) - CODECHAL_HCP_B… in AddHcpPipeModeSelectCmd()
1215 …cmd.DW1.PakPipelineStreamoutEnable = params->bStreamOutEnabled || params->pakPiplnStrmoutEnabled; in AddHcpPipeModeSelectCmd()
1216 cmd.DW1.DeblockerStreamoutEnable = params->bDeblockerStreamOutEnable; in AddHcpPipeModeSelectCmd()
1217 cmd.DW1.VdencMode = params->bVdencEnabled; in AddHcpPipeModeSelectCmd()
1218 cmd.DW1.RdoqEnabledFlag = params->bRdoqEnable; in AddHcpPipeModeSelectCmd()
1219 …cmd.DW1.PakFrameLevelStreamoutEnable = params->bStreamOutEnabled || params->pakFrmLvlStrmoutEnable; in AddHcpPipeModeSelectCmd()
1220 cmd.DW1.PipeWorkingMode = paramsG11->PipeWorkMode; in AddHcpPipeModeSelectCmd()
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| /aosp_15_r20/external/intel-media-driver/media_driver/agnostic/gen9/hw/vdbox/ |
| H A D | mhw_vdbox_mfx_g9_X.h | 700 typename TMfxCmds::MFX_PIPE_MODE_SELECT_CMD cmd; in AddMfxPipeModeSelectCmd() local
702 …HW_MI_CHK_STATUS(this->m_cpInterface->SetProtectionSettingsForMfxPipeModeSelect((uint32_t *)&cmd)); in AddMfxPipeModeSelectCmd()
705 cmd.DW1.StreamOutEnable = params->bStreamOutEnabled && (!params->bVdencEnabled); in AddMfxPipeModeSelectCmd()
706 cmd.DW1.DeblockerStreamOutEnable = params->bDeblockerStreamOutEnable; in AddMfxPipeModeSelectCmd()
710 cmd.DW1.PreDeblockingOutputEnablePredeblockoutenable = params->bPreDeblockOutEnable; in AddMfxPipeModeSelectCmd()
711 cmd.DW1.PostDeblockingOutputEnablePostdeblockoutenable = params->bPostDeblockOutEnable; in AddMfxPipeModeSelectCmd()
712 cmd.DW1.CodecSelect = MhwVdboxMfxInterface::decoderCodec; in AddMfxPipeModeSelectCmd()
713 cmd.DW1.DecoderShortFormatMode = !params->bShortFormatInUse; in AddMfxPipeModeSelectCmd()
714 cmd.DW2.Vlf720IOddHeightInVc1Mode = params->bVC1OddFrameHeight; in AddMfxPipeModeSelectCmd()
718 cmd.DW1.DecoderModeSelect = MhwVdboxMfxInterface::mfxDecoderModeVld; in AddMfxPipeModeSelectCmd()
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| /aosp_15_r20/external/intel-media-driver/media_driver/agnostic/common/hw/vdbox/ |
| H A D | mhw_vdbox_mfx_generic.h | 73 typename TMfxCmds::MFD_AVC_PICID_STATE_CMD cmd; in AddMfdAvcPicidCmd() local
75 cmd.DW1.PictureidRemappingDisable = 1; in AddMfdAvcPicidCmd()
79 cmd.DW1.PictureidRemappingDisable = 0; in AddMfdAvcPicidCmd()
83 cmd.Pictureidlist1616Bits[i] = avcPicidDefault; in AddMfdAvcPicidCmd()
87 …cmd.Pictureidlist1616Bits[i] = (cmd.Pictureidlist1616Bits[i] & 0xffff0000) | params->pAvcPicIdx[j … in AddMfdAvcPicidCmd()
92 …cmd.Pictureidlist1616Bits[i] = (cmd.Pictureidlist1616Bits[i] & 0x0000ffff) | (params->pAvcPicIdx[j… in AddMfdAvcPicidCmd()
100 cmd.Pictureidlist1616Bits[i] = avcPicidDisabled; in AddMfdAvcPicidCmd()
104 MHW_MI_CHK_STATUS(m_osInterface->pfnAddCommand(cmdBuffer, &cmd, sizeof(cmd))); in AddMfdAvcPicidCmd()
121 typename TMfxCmds::MFX_QM_STATE_CMD cmd; in AddMfxQmCmd() local
123 uint8_t* qMatrix = (uint8_t*)cmd.ForwardQuantizerMatrix; in AddMfxQmCmd()
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| H A D | mhw_vdbox_vdenc_generic.h | 64 typename TVdencCmds::VD_PIPELINE_FLUSH_CMD cmd; in AddVdPipelineFlushCmd() local
66 cmd.DW1.HevcPipelineDone = params->Flags.bWaitDoneHEVC; in AddVdPipelineFlushCmd()
67 cmd.DW1.VdencPipelineDone = params->Flags.bWaitDoneVDENC; in AddVdPipelineFlushCmd()
68 cmd.DW1.MflPipelineDone = params->Flags.bWaitDoneMFL; in AddVdPipelineFlushCmd()
69 cmd.DW1.MfxPipelineDone = params->Flags.bWaitDoneMFX; in AddVdPipelineFlushCmd()
70 cmd.DW1.VdCommandMessageParserDone = params->Flags.bWaitDoneVDCmdMsgParser; in AddVdPipelineFlushCmd()
71 cmd.DW1.HevcPipelineCommandFlush = params->Flags.bFlushHEVC; in AddVdPipelineFlushCmd()
72 cmd.DW1.VdencPipelineCommandFlush = params->Flags.bFlushVDENC; in AddVdPipelineFlushCmd()
73 cmd.DW1.MflPipelineCommandFlush = params->Flags.bFlushMFL; in AddVdPipelineFlushCmd()
74 cmd.DW1.MfxPipelineCommandFlush = params->Flags.bFlushMFX; in AddVdPipelineFlushCmd()
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| /aosp_15_r20/external/intel-media-driver/media_softlet/agnostic/Xe2_M_plus/Xe2_LPM_base/hw/ |
| H A D | mhw_sfc_xe2_lpm_base_next_impl.h | 44 class Impl : public sfc::Impl<mhw::sfc::xe2_lpm_base_next::Cmd>
53 mhw::sfc::xe2_lpm_base_next::Cmd::SFC_STATE_CMD *cmd, in SetOutputSurfaceFormatType() argument
59 MHW_CHK_NULL_RETURN(cmd); in SetOutputSurfaceFormatType()
65 cmd->DW3.RgbPlanarMemoryFormatEnable = 1; in SetOutputSurfaceFormatType()
66 cmd->DW3.OutputSurfaceFormatType = cmd->OUTPUT_SURFACE_FORMAT_TYPE_A8B8G8R8; in SetOutputSurfaceFormatType()
69 cmd->DW3.OutputSurfaceFormatType = cmd->OUTPUT_SURFACE_FORMAT_TYPE_INTEGRAL_32; in SetOutputSurfaceFormatType()
72 cmd->DW3.OutputSurfaceFormatType = cmd->OUTPUT_SURFACE_FORMAT_TYPE_AYUV; in SetOutputSurfaceFormatType()
78 cmd->DW3.OutputSurfaceFormatType = cmd->OUTPUT_SURFACE_FORMAT_TYPE_A8B8G8R8; in SetOutputSurfaceFormatType()
82 cmd->DW3.OutputSurfaceFormatType = cmd->OUTPUT_SURFACE_FORMAT_TYPE_A2R10G10B10; in SetOutputSurfaceFormatType()
85 cmd->DW3.OutputSurfaceFormatType = cmd->OUTPUT_SURFACE_FORMAT_TYPE_R5G6B5; in SetOutputSurfaceFormatType()
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| /aosp_15_r20/external/intel-media-driver/media_softlet/agnostic/Xe_M_plus/Xe2_HPM/hw/ |
| H A D | mhw_sfc_xe2_hpm_next_impl.h | 44 class Impl : public sfc::Impl<mhw::sfc::xe2_hpm_next::Cmd>
53 mhw::sfc::xe2_hpm_next::Cmd::SFC_STATE_CMD *cmd, in SetOutputSurfaceFormatType() argument
59 MHW_CHK_NULL_RETURN(cmd); in SetOutputSurfaceFormatType()
65 cmd->DW3.RgbPlanarMemoryFormatEnable = 1; in SetOutputSurfaceFormatType()
66 cmd->DW3.OutputSurfaceFormatType = cmd->OUTPUT_SURFACE_FORMAT_TYPE_A8B8G8R8; in SetOutputSurfaceFormatType()
69 cmd->DW3.OutputSurfaceFormatType = cmd->OUTPUT_SURFACE_FORMAT_TYPE_INTEGRAL_32; in SetOutputSurfaceFormatType()
72 cmd->DW3.OutputSurfaceFormatType = cmd->OUTPUT_SURFACE_FORMAT_TYPE_AYUV; in SetOutputSurfaceFormatType()
78 cmd->DW3.OutputSurfaceFormatType = cmd->OUTPUT_SURFACE_FORMAT_TYPE_A8B8G8R8; in SetOutputSurfaceFormatType()
82 cmd->DW3.OutputSurfaceFormatType = cmd->OUTPUT_SURFACE_FORMAT_TYPE_A2R10G10B10; in SetOutputSurfaceFormatType()
85 cmd->DW3.OutputSurfaceFormatType = cmd->OUTPUT_SURFACE_FORMAT_TYPE_R5G6B5; in SetOutputSurfaceFormatType()
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| /aosp_15_r20/external/mesa3d/src/gallium/drivers/svga/svgadump/ |
| H A D | svga_dump.c | 40 dump_SVGA3dVertexDecl(const SVGA3dVertexDecl *cmd) in dump_SVGA3dVertexDecl() argument
42 switch((*cmd).identity.type) { in dump_SVGA3dVertexDecl()
98 _debug_printf("\t\t.identity.type = %i\n", (*cmd).identity.type); in dump_SVGA3dVertexDecl()
101 switch((*cmd).identity.method) { in dump_SVGA3dVertexDecl()
124 _debug_printf("\t\t.identity.method = %i\n", (*cmd).identity.method); in dump_SVGA3dVertexDecl()
127 switch((*cmd).identity.usage) { in dump_SVGA3dVertexDecl()
174 _debug_printf("\t\t.identity.usage = %i\n", (*cmd).identity.usage); in dump_SVGA3dVertexDecl()
177 _debug_printf("\t\t.identity.usageIndex = %u\n", (*cmd).identity.usageIndex); in dump_SVGA3dVertexDecl()
178 _debug_printf("\t\t.array.surfaceId = %u\n", (*cmd).array.surfaceId); in dump_SVGA3dVertexDecl()
179 _debug_printf("\t\t.array.offset = %u\n", (*cmd).array.offset); in dump_SVGA3dVertexDecl()
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| /aosp_15_r20/external/intel-media-driver/media_softlet/agnostic/Xe_M_plus/Xe_LPM_plus_base/hw/ |
| H A D | mhw_sfc_xe_lpm_plus_base_next_impl.h | 56 class Impl : public sfc::Impl<mhw::sfc::xe_lpm_plus_next::Cmd>
65 mhw::sfc::xe_lpm_plus_next::Cmd::SFC_STATE_CMD *cmd, in SetOutputSurfaceFormatType() argument
71 MHW_CHK_NULL_RETURN(cmd); in SetOutputSurfaceFormatType()
76 cmd->DW3.OutputSurfaceFormatType = cmd->OUTPUT_SURFACE_FORMAT_TYPE_AYUV; in SetOutputSurfaceFormatType()
82 cmd->DW3.OutputSurfaceFormatType = cmd->OUTPUT_SURFACE_FORMAT_TYPE_A8B8G8R8; in SetOutputSurfaceFormatType()
86 cmd->DW3.OutputSurfaceFormatType = cmd->OUTPUT_SURFACE_FORMAT_TYPE_A2R10G10B10; in SetOutputSurfaceFormatType()
89 cmd->DW3.OutputSurfaceFormatType = cmd->OUTPUT_SURFACE_FORMAT_TYPE_R5G6B5; in SetOutputSurfaceFormatType()
92 cmd->DW3.OutputSurfaceFormatType = cmd->OUTPUT_SURFACE_FORMAT_TYPE_NV12; in SetOutputSurfaceFormatType()
98 cmd->DW3.OutputSurfaceFormatType = cmd->OUTPUT_SURFACE_FORMAT_TYPE_YUYV; in SetOutputSurfaceFormatType()
102 cmd->DW3.OutputSurfaceFormatType = cmd->OUTPUT_SURFACE_FORMAT_TYPE_UYVY; in SetOutputSurfaceFormatType()
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| /aosp_15_r20/external/intel-media-driver/media_driver/agnostic/gen9_kbl/hw/vdbox/ |
| H A D | mhw_vdbox_hcp_g9_kbl.cpp | 274 mhw_vdbox_hcp_g9_kbl::HCP_PIPE_MODE_SELECT_CMD *cmd = in AddHcpPipeModeSelectCmd() local
279 m_cpInterface->SetProtectionSettingsForMfxPipeModeSelect((uint32_t *)cmd); in AddHcpPipeModeSelectCmd()
283 cmd->DW4.HprVp9ModeSwitchEcoDisable = 1; in AddHcpPipeModeSelectCmd()
285 cmd->DW1.PakPipelineStreamoutEnable = params->bStreamOutEnabled; in AddHcpPipeModeSelectCmd()
286 cmd->DW1.AdvancedRateControlEnable = params->bAdvancedRateControlEnable; in AddHcpPipeModeSelectCmd()
299 mhw_vdbox_hcp_g9_kbl::HCP_SURFACE_STATE_CMD *cmd = in AddHcpDecodeSurfaceStateCmd() local
306 cmd->DW2.SurfaceFormat = HCP_SURFACE_FORMAT_PLANAR_420_8; in AddHcpDecodeSurfaceStateCmd()
310 cmd->DW2.SurfaceFormat = HCP_SURFACE_FORMAT_P010; in AddHcpDecodeSurfaceStateCmd()
324 mhw_vdbox_hcp_g9_kbl::HCP_SURFACE_STATE_CMD *cmd = in AddHcpEncodeSurfaceStateCmd() local
329 cmd->DW2.YOffsetForUCbInPixel = params->psSurface->UPlaneOffset.iYOffset; in AddHcpEncodeSurfaceStateCmd()
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| /aosp_15_r20/external/vboot_reference/utility/ |
| H A D | tlcl_generator.c | 54 static void AddVisibleField(Command* cmd, const char* name, int offset) { in AddVisibleField() argument
56 if (cmd->fields != NULL) { in AddVisibleField()
59 fld->next = cmd->fields; in AddVisibleField()
60 cmd->fields = fld; in AddVisibleField()
69 static void AddInitializedField(Command* cmd, int offset, in AddInitializedField() argument
72 fld->next = cmd->fields; in AddInitializedField()
73 cmd->fields = fld; in AddInitializedField()
84 Command* cmd = (Command*) calloc(1, sizeof(Command)); in newCommandWithTag() local
85 cmd->size = size; in newCommandWithTag()
86 AddInitializedField(cmd, 0, sizeof(TPM_TAG), tag); in newCommandWithTag()
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| /aosp_15_r20/external/mesa3d/src/freedreno/vulkan/ |
| H A D | tu_cmd_buffer.cc | 27 tu_clone_trace_range(struct tu_cmd_buffer *cmd, struct tu_cs *cs, in tu_clone_trace_range() argument
35 u_trace_clone_append(begin, end, &cmd->trace, cs, tu_copy_buffer); in tu_clone_trace_range()
39 tu_clone_trace(struct tu_cmd_buffer *cmd, struct tu_cs *cs, in tu_clone_trace() argument
42 tu_clone_trace_range(cmd, cs, u_trace_begin_iterator(trace), in tu_clone_trace()
48 tu_emit_raw_event_write(struct tu_cmd_buffer *cmd, in tu_emit_raw_event_write() argument
66 tu_cs_emit_qw(cs, global_iova(cmd, seqno_dummy)); in tu_emit_raw_event_write()
73 tu_emit_event_write(struct tu_cmd_buffer *cmd, in tu_emit_event_write() argument
78 tu_emit_raw_event_write<CHIP>(cmd, cs, event_info.raw_event, in tu_emit_event_write()
90 tu6_lazy_emit_tessfactor_addr(struct tu_cmd_buffer *cmd) in tu6_lazy_emit_tessfactor_addr() argument
92 if (cmd->state.tessfactor_addr_set) in tu6_lazy_emit_tessfactor_addr()
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| /aosp_15_r20/external/intel-media-driver/media_driver/agnostic/Xe_M/Xe_XPM/hw/ |
| H A D | mhw_sfc_xe_xpm.cpp | 101 mhw_sfc_xe_xpm::SFC_STATE_CMD cmd; in AddSfcState() local
130 cmd.DW0.MediaCommandOpcode = cmd.MEDIA_COMMAND_OPCODE_MEDIAHCPSFCMODE; in AddSfcState()
134 cmd.DW0.MediaCommandOpcode = cmd.MEDIA_COMMAND_OPCODE_MEDIAMFXVEBOXSFCMODE; in AddSfcState()
138 cmd.DW1.SfcPipeMode = pSfcStateparamsXe_Xpm->sfcPipeMode; in AddSfcState()
139 cmd.DW1.SfcInputChromaSubSampling = pSfcStateparamsXe_Xpm->dwInputChromaSubSampling; in AddSfcState()
140 cmd.DW1.VdVeInputOrderingMode = pSfcStateparamsXe_Xpm->dwVDVEInputOrderingMode; in AddSfcState()
141 cmd.DW1.SfcEngineMode = pSfcStateparamsXe_Xpm->engineMode; in AddSfcState()
144 cmd.DW2.InputFrameResolutionWidth = pSfcStateparamsXe_Xpm->dwInputFrameWidth - 1; in AddSfcState()
145 cmd.DW2.InputFrameResolutionHeight = pSfcStateparamsXe_Xpm->dwInputFrameHeight - 1; in AddSfcState()
148 …cmd.DW3.OutputChromaDownsamplingCoSitingPositionVerticalDirection = pSfcStateparamsXe_Xpm->dw… in AddSfcState()
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| /aosp_15_r20/out/soong/.intermediates/external/rust/cxx/gen/cmd/cxxbridge/linux_glibc_x86_64/ |
| D | cxxbridge.d.raw | 1 …cmd/cxxbridge/linux_glibc_x86_64/cxxbridge: external/rust/cxx/gen/cmd/src/main.rs external/rust/cx…
3 …cmd/cxxbridge/linux_glibc_x86_64/cxxbridge.d.raw: external/rust/cxx/gen/cmd/src/main.rs external/r…
5 external/rust/cxx/gen/cmd/src/main.rs:
6 external/rust/cxx/gen/cmd/src/app.rs:
7 external/rust/cxx/gen/cmd/src/cfg.rs:
8 external/rust/cxx/gen/cmd/src/gen/mod.rs:
9 external/rust/cxx/gen/cmd/src/gen/block.rs:
10 external/rust/cxx/gen/cmd/src/gen/builtin.rs:
11 external/rust/cxx/gen/cmd/src/gen/cfg.rs:
12 external/rust/cxx/gen/cmd/src/gen/check.rs:
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| /aosp_15_r20/tools/test/connectivity/acts/framework/acts/controllers/anritsu_lib/ |
| D | md8475a.py | 567 cmd = "IMSCSCFSTAT? {}".format(virtual_network_id)
568 return self.send_query(cmd)
580 cmd = "IMSCSCFCALL {},{}".format(virtual_network_id, action)
581 self.send_command(cmd)
778 cmd = "LOADSIMPARAM \"" + filepath + '\";ERROR?'
779 self.send_query(cmd, LOAD_SIMULATION_PARAM_FILE_WAIT_TIME)
791 cmd = "LOADCELLPARAM \"" + filepath + '\";ERROR?'
792 status = int(self.send_query(cmd))
794 raise AnritsuError(status, cmd)
856 cmd = "SIMMODEL?"
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| /aosp_15_r20/external/mesa3d/src/gallium/drivers/svga/ |
| H A D | svga_cmd_vgpu10.c | 64 SVGA3dCmdDX##CommandName *cmd; \
66 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_##CommandCode, \
68 if (!cmd) \
73 SVGA3dCmdDX##CommandName *cmd; \
76 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_##CommandCode, \
79 if (!cmd) \
85 cmd->VariableName = VariableName; \
159 SVGA3dCmdDXPredCopyRegion *cmd = in SVGA3D_vgpu10_PredCopyRegion() local
164 if (!cmd) in SVGA3D_vgpu10_PredCopyRegion()
167 swc->surface_relocation(swc, &cmd->dstSid, NULL, dstSurf, SVGA_RELOC_WRITE); in SVGA3D_vgpu10_PredCopyRegion()
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| /aosp_15_r20/external/intel-media-driver/media_driver/agnostic/Xe_M/Xe_HPM/hw/vdbox/ |
| H A D | mhw_vdbox_avp_xe_hpm.cpp | 94 mhw::mi::xe_xpm_base::Cmd::MI_FLUSH_DW_CMD::byteSize + in GetAvpStateCommandSize()
95 mhw::vdbox::avp::xe_hpm::Cmd::AVP_PIPE_MODE_SELECT_CMD::byteSize + in GetAvpStateCommandSize()
96 mhw::vdbox::avp::xe_hpm::Cmd::AVP_SURFACE_STATE_CMD::byteSize * 11 + in GetAvpStateCommandSize()
97 mhw::vdbox::avp::xe_hpm::Cmd::AVP_PIPE_BUF_ADDR_STATE_CMD::byteSize + in GetAvpStateCommandSize()
98 mhw::vdbox::avp::xe_hpm::Cmd::AVP_IND_OBJ_BASE_ADDR_STATE_CMD::byteSize + in GetAvpStateCommandSize()
99 mhw::vdbox::avp::xe_hpm::Cmd::AVP_SEGMENT_STATE_CMD::byteSize * 8 + in GetAvpStateCommandSize()
100 mhw::vdbox::avp::xe_hpm::Cmd::AVP_INLOOP_FILTER_STATE_CMD::byteSize + in GetAvpStateCommandSize()
101 mhw::vdbox::avp::xe_hpm::Cmd::AVP_INTER_PRED_STATE_CMD::byteSize; in GetAvpStateCommandSize()
117 mhw::vdbox::avp::xe_hpm::Cmd::AVP_PIC_STATE_CMD::byteSize + in GetAvpStateCommandSize()
118 mhw::mi::xe_xpm_base::Cmd::VD_CONTROL_STATE_CMD::byteSize * 2; in GetAvpStateCommandSize()
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