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/linux-6.14.4/Documentation/driver-api/media/drivers/
Dpxa_camera.rst1 .. SPDX-License-Identifier: GPL-2.0
3 PXA-Camera Host Driver
9 -----------
13 This is due to DMA constraints, which transfers only planes of 8 byte
18 ---------------------
26 capture. The new buffers are "appended" at the tail of the DMA chain, and
35 c) Capture global finite state machine schema
37 .. code-block:: none
39 +----+ +---+ +----+
42 +-----------+ +------------------------+
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/linux-6.14.4/Documentation/devicetree/bindings/sound/
Dfsl,ssi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <[email protected]>
13 Notes on fsl,playback-dma and fsl,capture-dma
14 On SOCs that have an SSI, specific DMA channels are hard-wired for playback
15 and capture. On the MPC8610, for example, SSI1 must use DMA channel 0 for
16 playback and DMA channel 1 for capture. SSI2 must use DMA channel 2 for
17 playback and DMA channel 3 for capture. The developer can choose which
18 DMA controller to use, but the channels themselves are hard-wired. The
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Dsamsung-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <[email protected]>
11 - Sylwester Nawrocki <[email protected]>
14 - $ref: dai-common.yaml#
19 samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
21 samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with
25 samsung,exynos5420-i2s: for 8/16/24bit multichannel (5.1) I2S for
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Drenesas,rsnd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car Sound Driver
10 - Kuninori Morimoto <[email protected]>
17 - items:
18 - enum:
19 - renesas,rcar_sound-r8a7778 # R-Car M1A
20 - renesas,rcar_sound-r8a7779 # R-Car H1
21 - const: renesas,rcar_sound-gen1
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Drockchip-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The I2S bus (Inter-IC sound bus) is a serial link for digital
14 - Heiko Stuebner <[email protected]>
17 - $ref: dai-common.yaml#
22 - const: rockchip,rk3066-i2s
23 - items:
24 - enum:
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Dst,stm32-spdifrx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/st,stm32-spdifrx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Olivier Moysan <[email protected]>
14 IEC-60958 and IEC-61937.
17 - $ref: dai-common.yaml#
22 - st,stm32h7-spdifrx
24 "#sound-dai-cells":
33 clock-names:
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/linux-6.14.4/drivers/media/pci/saa7134/
Dsaa7134-alsa.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include "saa7134-reg.h"
27 #define MIXER_ADDR_UNSELECTED -1
34 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
36 static int enable[SNDRV_CARDS] = {1, [1 ... (SNDRV_CARDS - 1)] = 1};
40 MODULE_PARM_DESC(index, "Index value for SAA7134 capture interface(s).");
41 MODULE_PARM_DESC(enable, "Enable (or not) the SAA7134 capture interface(s).");
81 * saa7134 DMA audio stop
83 * Called when the capture device is released or the buffer overflows
85 * - Copied verbatim from saa7134-oss's dsp_dma_stop.
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/linux-6.14.4/sound/soc/fsl/
Dmpc5200_dma.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // Freescale MPC5200 PSC DMA
10 #include <linux/dma-mapping.h>
33 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; in psc_dma_status_irq()
36 isr = in_be16(&regs->mpc52xx_psc_isr); in psc_dma_status_irq()
39 if (psc_dma->playback.active && (isr & MPC52xx_PSC_IMR_TXEMP)) in psc_dma_status_irq()
40 psc_dma->stats.underrun_count++; in psc_dma_status_irq()
42 /* Capture overrun error */ in psc_dma_status_irq()
43 if (psc_dma->capture.active && (isr & MPC52xx_PSC_IMR_ORERR)) in psc_dma_status_irq()
44 psc_dma->stats.overrun_count++; in psc_dma_status_irq()
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Dmpc5200_dma.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Freescale MPC5200 Audio DMA driver
12 * psc_ac97_stream - Data specific to a single stream (playback or capture)
17 * @period_end: physical address of end of DMA region
18 * @period_next_pt: physical address of next DMA buffer to enqueue
19 * @period_bytes: size of DMA period in bytes
39 * psc_dma - Private driver data
49 * @capture: Capture stream context data
65 /* per-stream data */
67 struct psc_dma_stream capture; member
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Dp1022_ds.c1 // SPDX-License-Identifier: GPL-2.0
21 /* P1022-specific PMUXCR and DMUXCR bit definitions */
30 #define CCSR_GUTS_DMUXCR_PAD 1 /* DMA controller/channel set to pad */
31 #define CCSR_GUTS_DMUXCR_SSI 2 /* DMA controller/channel set to SSI */
37 * channel on each DMA controller. Rather than have a bunch of repetitive
42 * co: The DMA controller (0 or 1)
43 * ch: The channel on the DMA controller (0, 1, 2, or 3)
49 unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch)); in guts_set_dmuxcr()
51 clrsetbits_be32(&guts->dmuxcr, 3 << shift, device << shift); in guts_set_dmuxcr()
58 * machine_data: machine-specific ASoC device data
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Dp1022_rdk.c1 // SPDX-License-Identifier: GPL-2.0
28 /* P1022-specific PMUXCR and DMUXCR bit definitions */
37 #define CCSR_GUTS_DMUXCR_PAD 1 /* DMA controller/channel set to pad */
38 #define CCSR_GUTS_DMUXCR_SSI 2 /* DMA controller/channel set to SSI */
44 * channel on each DMA controller. Rather than have a bunch of repetitive
49 * co: The DMA controller (0 or 1)
50 * ch: The channel on the DMA controller (0, 1, 2, or 3)
56 unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch)); in guts_set_dmuxcr()
58 clrsetbits_be32(&guts->dmuxcr, 3 << shift, device << shift); in guts_set_dmuxcr()
65 * machine_data: machine-specific ASoC device data
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Dfsl_dma.c1 // SPDX-License-Identifier: GPL-2.0
3 // Freescale DMA ALSA SoC PCM driver
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
9 // This driver implements ASoC support for the Elo DMA controller, which is
10 // the DMA controller on Freescale 83xx, 85xx, and 86xx SOCs. In ALSA terms,
11 // the PCM driver is what handles the DMA buffer.
16 #include <linux/dma-mapping.h>
39 * The formats that the DMA controller supports, which is anything
67 * The number of DMA links to use. Two is the bare minimum, but if you
72 /** fsl_dma_private: p-substream DMA data
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/linux-6.14.4/sound/soc/amd/
Dacp.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 /* Playback and Capture Offset for Stoney */
26 * playback and SRAM Bank 2 for capture where as in case of BT I2S
28 * be used for capture. Carrizo uses I2S SP controller instance. SRAM Banks
30 * for capture scenario.
73 /* Playback DMA channels */
77 /* Capture DMA channels */
81 /* Playback DMA Channels for I2S BT instance */
85 /* Capture DMA Channels for I2S BT Instance */
89 /* Playback DMA channels for I2S MICSP instance */
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/linux-6.14.4/sound/pci/emu10k1/
Dp16v.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) by James Courtier-Dutton <[email protected]>
11 /* Audigy2 P16V pointer-offset register set, accessed through the PTR2 and DATA2 registers …
19 #define PLAYBACK_LIST_ADDR 0x00 /* Base DMA address of a list of pointers to each period/size */
20 /* One list entry: 4 bytes for DMA address,
25 #define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */
28 #define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA address */
34 #define CAPTURE_DMA_ADDR 0x10 /* Capture DMA address */
35 #define CAPTURE_BUFFER_SIZE 0x11 /* Capture buffer size */
36 #define CAPTURE_POINTER 0x12 /* Capture buffer pointer. Sample currently in ADC */
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/linux-6.14.4/include/linux/mfd/
Dstm32-timers.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 #include <linux/dma-mapping.h>
18 #define TIM_DIER 0x0C /* DMA/interrupt register */
26 #define TIM_ARR 0x2c /* Auto-Reload Register */
27 #define TIM_CCRx(x) (0x34 + 4 * ((x) - 1)) /* Capt/Comp Register x (x ∈ {1, .. 4}) */
32 #define TIM_BDTR 0x44 /* Break and Dead-Time Reg */
33 #define TIM_DCR 0x48 /* DMA control register */
34 #define TIM_DMAR 0x4C /* DMA register for transfer */
39 #define TIM_CR1_ARPE BIT(7) /* Auto-reload Preload Ena */
45 #define TIM_DIER_CCxIE(x) BIT(1 + ((x) - 1)) /* CCx Interrupt Enable (x ∈ {1, .. 4}) */
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/linux-6.14.4/drivers/media/platform/samsung/exynos4-is/
Dfimc-core.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
21 #include <media/media-entity.h>
22 #include <media/videobuf2-v4l2.h>
23 #include <media/v4l2-ctrls.h>
24 #include <media/v4l2-device.h>
25 #include <media/v4l2-mem2mem.h>
26 #include <media/v4l2-mediabus.h>
27 #include <media/drv-intf/exynos-fimc.h>
35 #define FIMC_DRIVER_NAME "exynos4-fimc"
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
33 module will be called s5p-fimc.
36 tristate "S5P/EXYNOS MIPI-CSI2 receiver (MIPI-CSIS) driver"
41 This is a V4L2 driver for Samsung S5P and EXYNOS4 SoC MIPI-CSI2
42 receiver (MIPI-CSIS) devices.
45 module will be called s5p-csis.
48 tristate "EXYNOS FIMC-LITE camera interface driver"
55 This is a V4L2 driver for Samsung EXYNOS4/5 SoC FIMC-LITE camera
59 module will be called exynos-fimc-lite.
62 tristate "EXYNOS4x12 FIMC-IS (Imaging Subsystem) driver"
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/linux-6.14.4/sound/soc/renesas/
Drz-ssi.c1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas RZ/G2L ASoC Serial Sound Interface (SSIF-2) Driver
75 #define SSI_RATES SNDRV_PCM_RATE_8000_48000 /* 8k-48kHz */
87 int dma_buffer_pos; /* The address for the next DMA descriptor */
117 * The SSI supports full-duplex transmission and reception.
120 * So it is better to use as half-duplex (playing and recording
124 struct rz_ssi_stream capture; member
148 writel(data, (priv->base + reg)); in rz_ssi_reg_writel()
153 return readl(priv->base + reg); in rz_ssi_reg_readl()
161 val = readl(priv->base + reg); in rz_ssi_reg_mask_setl()
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Dsiu_pcm.c1 // SPDX-License-Identifier: GPL-2.0+
3 // siu_pcm.c - ALSA driver for Renesas SH7343, SH7722 SIU peripheral.
5 // Copyright (C) 2009-2010 Guennadi Liakhovetski <[email protected]>
9 #include <linux/dma-mapping.h>
25 #define DRV_NAME "siu-i2s"
36 /* transfersize is number of u32 dma transfers per period */
40 u32 __iomem *base = info->reg; in siu_pcm_stmwrite_stop()
41 struct siu_stream *siu_stream = &port_info->playback; in siu_pcm_stmwrite_stop()
44 if (!siu_stream->rw_flg) in siu_pcm_stmwrite_stop()
45 return -EPERM; in siu_pcm_stmwrite_stop()
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/linux-6.14.4/drivers/pwm/
Dpwm-stm32.c1 // SPDX-License-Identifier: GPL-2.0
7 * Inspired by timer-stm32.c from Maxime Coquelin
8 * pwm-atmel.c from Bo Shen
12 #include <linux/mfd/stm32-timers.h>
37 u32 capture[4] ____cacheline_aligned; /* DMA'able buffer */ member
49 regmap_read(dev->regmap, TIM_CCER, &ccer); in active_channels()
68 unsigned int ch = pwm->hwpwm; in stm32_pwm_round_waveform_tohw()
73 if (wf->period_length_ns == 0) { in stm32_pwm_round_waveform_tohw()
81 ret = clk_enable(priv->clk); in stm32_pwm_round_waveform_tohw()
85 wfhw->ccer = TIM_CCER_CCxE(ch + 1); in stm32_pwm_round_waveform_tohw()
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/linux-6.14.4/sound/ppc/
Dpmac.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include <linux/dma-mapping.h>
54 rec->space = dma_alloc_coherent(&chip->pdev->dev, rsize, in snd_pmac_dbdma_alloc()
55 &rec->dma_base, GFP_KERNEL); in snd_pmac_dbdma_alloc()
56 if (rec->space == NULL) in snd_pmac_dbdma_alloc()
57 return -ENOMEM; in snd_pmac_dbdma_alloc()
58 rec->size = size; in snd_pmac_dbdma_alloc()
59 memset(rec->space, 0, rsize); in snd_pmac_dbdma_alloc()
60 rec->cmds = (void __iomem *)DBDMA_ALIGN(rec->space); in snd_pmac_dbdma_alloc()
61 rec->addr = rec->dma_base + (unsigned long)((char *)rec->cmds - (char *)rec->space); in snd_pmac_dbdma_alloc()
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/linux-6.14.4/Documentation/devicetree/bindings/dma/
Dloongson,ls1b-apbdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/loongson,ls1b-apbdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-1 APB DMA Controller
10 - Keguang Zhang <[email protected]>
13 Loongson-1 APB DMA controller provides 3 independent channels for
14 peripherals such as NAND, audio playback and capture.
19 - const: loongson,ls1b-apbdma
20 - items:
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/linux-6.14.4/drivers/staging/media/atomisp/pci/
Dinput_system_ctrl_defs.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 /* --------------------------------------------------*/
14 /* --------------------------------------------------*/
16 /* --------------------------------------------------*/
60 …_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset)
61 …_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset)
62 …EDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset)
63 …EDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset)
98 /* --------------------------------------------------*/
100 /* --------------------------------------------------*/
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/linux-6.14.4/Documentation/devicetree/bindings/soc/qcom/
Dqcom,dcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Data Capture and Compare
10 - Souradeep Chowdhury <[email protected]>
13 DCC (Data Capture and Compare) is a DMA engine which is used to save
15 or SW trigger. DCC is used to capture and store data for debugging purpose
20 - enum:
21 - qcom,sm8150-dcc
22 - qcom,sc7280-dcc
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/linux-6.14.4/sound/pci/ice1712/
Denvy24ht.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
39 #define ICEREG1724(ice, x) ((ice)->port + VT1724_REG_##x)
49 #define VT1724_REG_SYS_CFG 0x04 /* byte - system configuration PCI60 on Envy24*/
60 #define VT1724_CFG_AC97_PACKED 0x01 /* split or packed mode - AC'97 */
65 #define VT1724_CFG_I2S_RESMASK 0x30 /* resolution mask, 16,18,20,24-bit */
106 bit3 - during reset used for Eeprom power-on strapping
114 * Professional multi-track direct control registers
117 #define ICEMT1724(ice, x) ((ice)->profi_port + VT1724_MT_##x)
119 #define VT1724_MT_IRQ 0x00 /* byte - interrupt mask */
124 #define VT1724_MULTI_FIFO_ERR 0x08 /* DMA FIFO underrun/overrun. */
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