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/linux-6.14.4/certs/
Dsystem_keyring.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <keys/asymmetric-type.h>
36 * restrict_link_by_builtin_trusted - Restrict keyring addition by built-in CA
40 * @restriction_key: A ring of keys that can be used to vouch for the new cert.
42 * Restrict the addition of keys into a keyring based on the key-to-be-added
55 * restrict_link_by_digsig_builtin - Restrict digitalSignature key additions by the built-in keyring
59 * @restriction_key: A ring of keys that can be used to vouch for the new cert.
61 * Restrict the addition of keys into a keyring based on the key-to-be-added
76 * restrict_link_by_builtin_and_secondary_trusted - Restrict keyring
77 * addition by both built-in and secondary keyrings.
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0
16 certificate as described in Documentation/admin-guide/module-signing.rst
45 bool "Provide system-wide ring of trusted keys"
50 Provide a system keyring to which trusted keys can be added. Keys in
52 by the kernel from compiled-in data and from hardware key stores, but
53 userspace may only add extra keys if those keys can be verified by
62 If set, this option should be the filename of a PEM-formatted file
68 form of DER-encoded *.x509 files in the top-level build directory,
94 secondary trusted keyring.
101 keyring may be loaded onto the secondary trusted keyring.
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/net/can/
Dst,stm32-bxcan.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 description: STMicroelectronics BxCAN controller for CAN bus
12 - Dario Binacchi <[email protected]>
15 - $ref: can-controller.yaml#
20 - st,stm32f4-bxcan
22 st,can-primary:
25 two CAN peripherals in dual CAN configuration. In that case they share
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/linux-6.14.4/Documentation/arch/sparc/oradax/
Ddax-hv-api.txt3 Publication date 2017-09-25 08:21
5 Extracted via "pdftotext -f 547 -l 572 -layout sun4v_20170925.pdf"
16 live-migration and other system management activities.
20 …high speed processoring of database-centric operations. The coprocessors may support one or more of
28 …e Completion Area and, unless execution order is specifically restricted through the use of serial-
39 …machine, however, internal resource limitations within the virtual machine can cause CCB submissio…
45 …device node in the guest MD (Section 8.24.17, “Database Analytics Accelerators (DAX) virtual-device
51 36.1.1.1. "ORCL,sun4v-dax" Device Compatibility
54 • No-op/Sync
81 36.1.1.2. "ORCL,sun4v-dax-fc" Device Compatibility
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/linux-6.14.4/tools/perf/pmu-events/arch/x86/broadwellde/
Duncore-interconnect.json111 … "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary",
116 …"PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
121 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary",
126 … "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
131 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary",
136 … "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary",
141 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects",
146 "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Rejects",
151 "BriefDescription": "Misc Events - Set 0; Fastpath Requests",
156 "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Requests",
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/linux-6.14.4/include/linux/
Dmmu_notifier.h1 /* SPDX-License-Identifier: GPL-2.0 */
18 * enum mmu_notifier_event - reason for the mmu notifier callback
68 * freed. This can run concurrently with other mmu notifier
70 * should tear down all secondary mmu mappings and freeze the
71 * secondary mmu. If this method isn't implemented you've to
73 * through the secondary mmu by the time the last thread with
74 * tsk->mm == mm exits.
76 * As side note: the pages freed after ->release returns could
78 * address with a different cache model, so if ->release isn't
80 * through the secondary mmu are terminated by the time the
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/linux-6.14.4/Documentation/fb/
Dmatroxfb.rst15 * You can run XF{68,86}_FBDev or XFree86 fbdev driver on top of /dev/fb0
16 * Most important: boot logo :-)
34 box) and matroxfb (for graphics mode). You should not compile-in vesafb
35 unless you have primary display on non-Matrox VBE2.0 device (see
43 -------------
58 -------------------------
73 ----------
82 You can enter these number either hexadecimal (leading `0x`) or decimal
83 (0x100 = 256). You can also use value + 512 to achieve compatibility
86 Non-listed number can be achieved by more complicated command-line, for
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Dviafb.rst6 --------
15 ---------------
34 ----------------------
47 - 640x480 (default)
48 - 720x480
49 - 800x600
50 - 1024x768
53 - 8, 16, 32 (default:32)
56 - 60, 75, 85, 100, 120 (default:60)
59 - 0 : expansion (default)
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/linux-6.14.4/Documentation/userspace-api/media/v4l/
Dvidioc-g-tuner.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_G_TUNER - VIDIOC_S_TUNER - Get or set tuner attributes
52 Since this is a write-only ioctl, it does not return the actually
68 .. flat-table:: struct v4l2_tuner
69 :header-rows: 0
70 :stub-columns: 0
72 * - __u32
73 - ``index``
74 - :cspan:`1` Identifies the tuner, set by the application.
75 * - __u8
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/linux-6.14.4/drivers/block/drbd/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
19 DRBD is a shared-nothing, synchronously replicated block device. It
21 clusters and in this context, is a "drop-in" replacement for shared
24 Each minor device has a role, which can be 'primary' or 'secondary'.
28 node with the device in 'secondary' state. The secondary device
31 DRBD can also be used in dual-Primary mode (device writable on both
32 nodes), which means it can exhibit shared disk semantics in a
33 shared-nothing cluster. Needless to say, on top of dual-Primary
38 See also: https://www.drbd.org/, http://www.linux-ha.org
/linux-6.14.4/arch/x86/kernel/acpi/
Dmadt_wakeup.c1 // SPDX-License-Identifier: GPL-2.0-or-later
49 acpi_mp_wake_mailbox->apic_id = apicid; in acpi_mp_cpu_die()
50 smp_store_release(&acpi_mp_wake_mailbox->command, in acpi_mp_cpu_die()
55 while (READ_ONCE(acpi_mp_wake_mailbox->command) && --timeout) in acpi_mp_cpu_die()
93 return -ENOMEM; in init_transition_pgtable()
100 return -ENOMEM; in init_transition_pgtable()
107 return -ENOMEM; in init_transition_pgtable()
114 return -ENOMEM; in init_transition_pgtable()
137 return -ENOMEM; in acpi_mp_setup_reset()
146 return -ENOMEM; in acpi_mp_setup_reset()
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/linux-6.14.4/arch/arm/mach-mvebu/
Dcoherency_ll.S1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
10 * coherency fabric. This function is called by each of the secondary
12 * function have to callable from assembly. It can also be called by a
23 .arch armv7-a
55 * coherency CPU mask can be used with the coherency fabric
57 * endian-swapped as appropriate so that the calling functions do not
73 * MMU can be disabled. The Armada XP SoC has an exclusive monitor
84 * calls. This function is used very early in the secondary
109 * calls. This function is used very early in the secondary
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/linux-6.14.4/drivers/net/wireless/intel/iwlwifi/mvm/
Dcoex.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2013-2014, 2018-2020, 2022-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
11 #include "iwl-modparams.h"
13 #include "iwl-debug.h"
100 * Checking that we hold mvm->mutex is a good idea, but the rate in iwl_get_coex_type()
101 * control can't acquire the mutex since it runs in Tx path. in iwl_get_coex_type()
109 chanctx_conf = rcu_dereference(vif->bss_conf.chanctx_conf); in iwl_get_coex_type()
112 chanctx_conf->def.chan->band != NL80211_BAND_2GHZ) { in iwl_get_coex_type()
119 phy_ctx_id = *((u16 *)chanctx_conf->drv_priv); in iwl_get_coex_type()
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/linux-6.14.4/Documentation/PCI/endpoint/
Dpci-ntb-howto.rst1 .. SPDX-License-Identifier: GPL-2.0
4 PCI Non-Transparent Bridge (NTB) Endpoint Function (EPF) User Guide
9 This document is a guide to help users use pci-epf-ntb function driver
13 Documentation/PCI/endpoint/pci-ntb-function.rst
19 ---------------------------
27 2900000.pcie-ep 2910000.pcie-ep
32 2900000.pcie-ep 2910000.pcie-ep
36 -------------------------
40 # ls /sys/bus/pci-epf/drivers
49 Creating pci-epf-ntb Device
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Dpci-endpoint-cfs.rst1 .. SPDX-License-Identifier: GPL-2.0
18 directory. configfs can be mounted using the following command::
20 mount -t configfs none /sys/kernel/config
54 Every <EPF device> directory consists of the following entries that can be
75 ... secondary/
79 Non-transparent bridge), symlink of endpoint controller connected to primary
81 controller connected to secondary interface should be added in 'secondary'
84 The <EPF Device> directory can have a list of symbolic links
111 that represents a physical function can be linked to a EPC device.
138 [1] Documentation/PCI/endpoint/pci-endpoint.rst
/linux-6.14.4/arch/arm/mach-omap2/
Domap-smp.c1 // SPDX-License-Identifier: GPL-2.0-only
19 #include <linux/irqchip/arm-gic.h>
25 #include "omap-secure.h"
26 #include "omap-wakeupgen.h"
87 * BIT(27) - Disables streaming. All write-allocate lines allocate in in omap5_erratum_workaround_801819()
89 * BIT(25) - Disables streaming. All write-allocate lines allocate in in omap5_erratum_workaround_801819()
110 * ICIALLU) to activate the workaround for secondary Core.
115 * In General Purpose(GP) devices, ACR bit settings can only be done
150 * OMAP44XX EMU/HS devices - CPU0 SMP bit access is enabled in PPA in omap4_secondary_init()
153 * OMAP443X GP devices- SMP bit isn't accessible. in omap4_secondary_init()
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/linux-6.14.4/security/integrity/ima/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
23 being measured, we can tell.
27 TPM hardware, so that the TPM can prove to a third party
44 Depending on the IMA policy, the measurement list can grow to
71 limited to 255 characters. The 'ima-ng' measurement list
73 pathnames. The configured default template can be replaced
77 bool "ima-ng (default)"
79 bool "ima-sig"
84 default "ima-ng" if IMA_NG_TEMPLATE
85 default "ima-sig" if IMA_SIG_TEMPLATE
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/linux-6.14.4/Documentation/devicetree/bindings/interrupt-controller/
Dsnps,dw-apb-ictl.txt4 dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs with
5 APB bus, e.g. Marvell Armada 1500. It can also be used as primary interrupt
9 - compatible: shall be "snps,dw-apb-ictl"
10 - reg: physical base address of the controller and length of memory mapped
12 - interrupt-controller: identifies the node as an interrupt controller
13 - #interrupt-cells: number of cells to encode an interrupt-specifier, shall be 1
15 Additional required property when it's used as secondary interrupt controller:
16 - interrupts: interrupt reference to primary interrupt controller
20 - 0 maps to bit 0 of low interrupts,
21 - 1 maps to bit 1 of low interrupts,
[all …]
/linux-6.14.4/kernel/irq/
Dmanage.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4 * Copyright (C) 2005-2006 Thomas Gleixner
50 while (irqd_irq_inprogress(&desc->irq_data)) in __synchronize_hardirq()
53 /* Ok, that indicated we're done: double-check carefully. */ in __synchronize_hardirq()
54 raw_spin_lock_irqsave(&desc->lock, flags); in __synchronize_hardirq()
55 inprogress = irqd_irq_inprogress(&desc->irq_data); in __synchronize_hardirq()
70 raw_spin_unlock_irqrestore(&desc->lock, flags); in __synchronize_hardirq()
77 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
91 * This function may be called - with care - from IRQ context.
[all …]
/linux-6.14.4/arch/powerpc/kexec/
Dcore_64.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2004-2005, IBM Corp.
35 #include <asm/crashdump-ppc64.h>
51 for (i = 0; i < image->nr_segments; i++) in machine_kexec_prepare()
52 if (image->segment[i].mem < __pa(_end)) in machine_kexec_prepare()
53 return -ETXTBSY; in machine_kexec_prepare()
57 basep = of_get_property(node, "linux,tce-base", NULL); in machine_kexec_prepare()
58 sizep = of_get_property(node, "linux,tce-size", NULL); in machine_kexec_prepare()
65 for (i = 0; i < image->nr_segments; i++) { in machine_kexec_prepare()
66 begin = image->segment[i].mem; in machine_kexec_prepare()
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/linux-6.14.4/drivers/net/ethernet/mellanox/mlx5/core/lib/
Dsd.c1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
12 dev_info((__dev)->device, "Socket-Direct: " format, ##__VA_ARGS__)
14 dev_warn((__dev)->device, "Socket-Direct: " format, ##__VA_ARGS__)
24 struct mlx5_core_dev *secondaries[MLX5_SD_MAX_GROUP_SZ - 1];
27 struct { /* secondary */
41 return sd->host_buses; in mlx5_sd_get_host_buses()
51 return sd->primary ? dev : sd->primary_dev; in mlx5_sd_get_primary()
66 return sd->secondaries[idx - 1]; in mlx5_sd_primary_get_peer()
185 sd_warn(dev, "can't support requested netdev combining for group id 0x%x), skipping\n", in sd_init()
192 return -ENOMEM; in sd_init()
[all …]
/linux-6.14.4/drivers/usb/misc/
Donboard_usb_dev_pdevs.c1 // SPDX-License-Identifier: GPL-2.0-only
33 * onboard_dev_create_pdevs -- create platform devices for onboard USB devices
40 * hubs, it can optionally control whether the device remains powered during
46 * Some background about the logic in this function, which can be a bit hard
50 * HCD. The primary and secondary HCD are usually represented by a single DT
51 * node. That means the root hubs of the primary and secondary HCD share the
52 * same device tree node (the HCD node). As a result this function can be called
57 * connected to the root hub of the secondary HCD if needed.
70 struct usb_hcd *hcd = bus_to_hcd(parent_hub->bus); in onboard_dev_create_pdevs()
75 if (!parent_hub->dev.of_node) in onboard_dev_create_pdevs()
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/linux-6.14.4/Documentation/admin-guide/blockdev/
Dzram.rst2 zram: Compressed RAM-based block devices
8 The zram module creates RAM-based block devices named /dev/zram<id>
20 There are several ways to configure and manage zram device(-s):
23 b) using zramctl utility, provided by util-linux (util-[email protected]).
28 In order to get a better idea about zramctl please consult util-linux
29 documentation, zramctl man-page or `zramctl --help`. Please be informed
30 that zram maintainers do not develop/maintain util-linux or zramctl, should
31 you have any questions please contact util-[email protected]
45 -EBUSY an attempt to modify an attribute that cannot be changed once
47 -ENOMEM zram was not able to allocate enough memory to fulfil your
[all …]
/linux-6.14.4/drivers/ata/
Dpata_mpiix.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * pata_mpiix.c - Intel MPIIX PATA for new ATA layer
4 * (C) 2005-2006 Red Hat Inc
15 * be IDE class PCI. This requires slightly non-standard probe logic compared
24 * configuration the secondary port of the MPIIX is disabled and the addresses
46 SECONDARY = (1 << 14) enumerator
51 struct ata_port *ap = link->ap; in mpiix_pre_reset()
52 struct pci_dev *pdev = to_pci_dev(ap->host->dev); in mpiix_pre_reset()
56 return -ENOENT; in mpiix_pre_reset()
62 * mpiix_set_piomode - set initial PIO mode data
[all …]
Dpata_jmicron.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * pata_jmicron.c - JMicron ATA driver for non AHCI mode. This drives the
6 * this driver can handle other setups if we need it.
31 * jmicron_pre_reset - check for 40/80 pin
37 * On the Jmicron 361/363 there is a single PATA port that can be mapped
38 * either as primary or secondary (or neither). We don't do any policy
44 struct ata_port *ap = link->ap; in jmicron_pre_reset()
45 struct pci_dev *pdev = to_pci_dev(ap->host->dev); in jmicron_pre_reset()
48 int port_mask = 1<< (4 * ap->port_no); in jmicron_pre_reset()
49 int port = ap->port_no; in jmicron_pre_reset()
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