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/linux-6.14.4/Documentation/devicetree/bindings/rtc/
Dbrcm,brcmstb-waketimer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/brcm,brcmstb-waketimer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom STB wake-up Timer
10 - Florian Fainelli <[email protected]>
13 The Broadcom STB wake-up timer provides a 27Mhz resolution timer, with the
14 ability to wake up the system from low-power suspend/standby modes and
18 - $ref: rtc.yaml#
22 const: brcm,brcmstb-waketimer
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/linux-6.14.4/arch/mips/boot/dts/brcm/
Dbcm7358.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
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Dbcm7360.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
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Dbcm7362.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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Dbcm7346.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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Dbcm7435.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <175625000>;
42 cpu_intc: interrupt-controller {
43 #address-cells = <0>;
44 compatible = "mti,cpu-interrupt-controller";
46 interrupt-controller;
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Dbcm7425.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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/linux-6.14.4/drivers/rtc/
Drtc-brcmstb-waketimer.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2014-2023 Broadcom
52 reg = readl_relaxed(timer->base + BRCMSTB_WKTMR_EVENT); in brcmstb_waketmr_is_pending()
60 if (timer->alarm_en && timer->alarm_irq) in brcmstb_waketmr_clear_alarm()
61 disable_irq(timer->alarm_irq); in brcmstb_waketmr_clear_alarm()
62 timer->alarm_en = false; in brcmstb_waketmr_clear_alarm()
63 reg = readl_relaxed(timer->base + BRCMSTB_WKTMR_COUNTER); in brcmstb_waketmr_clear_alarm()
64 writel_relaxed(reg - 1, timer->base + BRCMSTB_WKTMR_ALARM); in brcmstb_waketmr_clear_alarm()
65 writel_relaxed(WKTMR_ALARM_EVENT, timer->base + BRCMSTB_WKTMR_EVENT); in brcmstb_waketmr_clear_alarm()
66 (void)readl_relaxed(timer->base + BRCMSTB_WKTMR_EVENT); in brcmstb_waketmr_clear_alarm()
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 ccflags-$(CONFIG_RTC_DEBUG) := -DDEBUG
8 obj-$(CONFIG_RTC_LIB) += lib.o
9 obj-$(CONFIG_RTC_CLASS) += rtc-core.o
10 obj-$(CONFIG_RTC_MC146818_LIB) += rtc-mc146818-lib.o
11 rtc-core-y := class.o interface.o
13 rtc-core-$(CONFIG_RTC_NVMEM) += nvmem.o
14 rtc-core-$(CONFIG_RTC_INTF_DEV) += dev.o
15 rtc-core-$(CONFIG_RTC_INTF_PROC) += proc.o
16 rtc-core-$(CONFIG_RTC_INTF_SYSFS) += sysfs.o
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
44 This clock should be battery-backed, so that it reads the correct
45 time when the system boots from a power-off state. Otherwise, your
141 once-per-second update interrupts, used for synchronization.
159 will be called rtc-test.
173 will be called rtc-88pm860x.
183 will be called rtc-88pm80x.
193 will be called rtc-88pm886.
197 tristate "Abracon AB-RTCMC-32.768kHz-B5ZE-S3"
200 AB-RTCMC-32.768kHz-B5ZE-S3 I2C RTC chip.
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