| /linux-6.14.4/Documentation/devicetree/bindings/mtd/ |
| D | amlogic,meson-nand.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: nand-controller.yaml
13 - [email protected]
18 - amlogic,meson-gxl-nfc
19 - amlogic,meson-axg-nfc
24 reg-names:
26 - const: nfc
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| /linux-6.14.4/mm/ |
| D | Kconfig.debug | 1 # SPDX-License-Identifier: GPL-2.0-only
17 Unmap pages from the kernel linear mapping after free_pages().
22 pages are being allocated and freed, as unexpected state changes
24 use-after-free). The error reports for these checks can be augmented
26 PAGE_OWNER is also selected and enabled on boot.
29 fill the pages with poison patterns after free_pages() and verify
33 pages are not saved to the suspend image.
36 allowing the kernel mapping to be backed by large pages on some
65 Boot with debugging on by default. SLUB boots by default with
67 equivalent to specifying the "slab_debug" parameter on boot.
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| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
26 bool "Compressed cache for swap pages"
31 A lightweight compressed cache for swap pages. It takes
32 pages that are in the process of being swapped out and attempts to
33 compress them into a dynamically allocated RAM-based memory pool.
39 bool "Enable the compressed cache for swap pages by default"
42 If selected, the compressed cache for swap pages will be enabled
43 at boot, otherwise it will be disabled.
53 If selected, the zswap shrinker will be enabled, and the pages
59 reducing the chance that cold pages will reside in the zswap pool
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| D | mm_init.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * mm_init.c - Memory initialisation verification and debugging
18 #include <linux/page-isolation.h>
62 zonelist = &pgdat->node_zonelists[listid]; in mminit_verify_zonelist()
63 zone = &pgdat->node_zones[zoneid]; in mminit_verify_zonelist()
70 zone->name); in mminit_verify_zonelist()
74 pr_cont("%d:%s ", zone_to_nid(zone), zone->name); in mminit_verify_zonelist()
86 width = shift - NR_NON_PAGEFLAG_BITS; in mminit_verify_pageflags_layout()
112 "Node/Zone ID: %lu -> %lu\n", in mminit_verify_pageflags_layout()
116 "location: %d -> %d layout %d -> %d unused %d -> %d page-flags\n", in mminit_verify_pageflags_layout()
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| /linux-6.14.4/Documentation/admin-guide/mm/ |
| D | zswap.rst | 8 Zswap is a lightweight compressed cache for swap pages. It takes pages that are
10 dynamically allocated RAM-based memory pool. zswap basically trades CPU cycles
11 for potentially reduced swap I/O. This trade-off can also result in a
24 drastically reducing life-shortening writes.
26 Zswap evicts pages from compressed cache on an LRU basis to the backing swap
30 Whether Zswap is enabled at the boot time depends on whether
40 When zswap is disabled at runtime it will stop storing pages that are
42 back into memory all of the pages stored in the compressed pool. The
43 pages stored in zswap will remain in the compressed pool until they are
45 pages out of the compressed pool, a swapoff on the swap device(s) will
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| D | hugetlbpage.rst | 2 HugeTLB Pages
13 256M and ppc64 supports 4K and 16M. A TLB is a cache of virtual-to-physical
28 persistent hugetlb pages in the kernel's huge page pool. It also displays
30 and surplus huge pages in the pool of huge pages of default size.
46 is the size of the pool of huge pages.
48 is the number of huge pages in the pool that are not yet
51 is short for "reserved," and is the number of huge pages for
53 but no allocation has yet been made. Reserved huge pages
55 huge page from the pool of huge pages at fault time.
57 is short for "surplus," and is the number of huge pages in
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| D | memory-hotplug.rst | 20 - The physical memory available to a machine can be adjusted at runtime, up- or
25 - Replacing hardware, such as DIMMs or whole NUMA nodes, without downtime. One
28 - Reducing energy consumption either by physically unplugging memory modules or
32 used to expose persistent memory, other performance-differentiated memory and
39 ------------------------------
54 ------------------------
71 --------------------------
80 relevant free pages from the page allocator After this phase, the memory is no
94 ------------------
112 --------------
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| D | numa_memory_policy.rst | 10 supported platforms with Non-Uniform Memory Access architectures since 2.4.?.
16 (``Documentation/admin-guide/cgroup-v1/cpusets.rst``)
19 programming interface that a NUMA-aware application can take advantage of. When
28 ------------------------
38 use "local allocation" described below. However, during boot
41 not to overload the initial boot node with boot-time
45 this is an optional, per-task policy. When defined for a
61 In a multi-threaded task, task policies apply only to the thread
67 A task policy applies only to pages allocated after the policy is
68 installed. Any pages already faulted in by the task when the task
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| /linux-6.14.4/drivers/net/ethernet/mellanox/mlx5/core/ |
| D | pagealloc.c | 2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
106 root = xa_load(&dev->priv.page_root_xa, function); in page_root_per_function()
112 return ERR_PTR(-ENOMEM); in page_root_per_function()
114 err = xa_insert(&dev->priv.page_root_xa, function, root, GFP_KERNEL); in page_root_per_function()
138 new = &root->rb_node; in insert_page()
143 if (tfp->addr < addr) in insert_page()
144 new = &parent->rb_left; in insert_page()
145 else if (tfp->addr > addr) in insert_page()
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| /linux-6.14.4/Documentation/arch/arm64/ |
| D | arm-cca.rst | 1 .. SPDX-License-Identifier: GPL-2.0
24 is split into two. The lower half is protected - any memory that is
27 (e.g. the Normal World cannot replace pages in this region without the
29 to make changes to the pages in this region, and is able to emulate MMIO
43 ----------------------
46 either by the VMM or by a `boot loader` run in the Realm before Linux:
54 * MMIO devices emulated by the Normal World and used very early in boot
62 expect to be able to access unprotected pages at the same IPA address
64 VMM will remove the physical pages from the protected mapping and
65 provide those pages as unprotected pages.
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| /linux-6.14.4/Documentation/mm/ |
| D | physical_memory.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 architecture-independent abstraction to represent the physical memory. This
13 `Non-Uniform Memory Access (NUMA)
14 <https://en.wikipedia.org/wiki/Non-uniform_memory_access>`_.
15 With multi-core and multi-socket machines, memory may be arranged into banks
27 specific code early during boot. Usually, these structures are allocated
42 memory with DMA specific requirements (Documentation/core-api/dma-api.rst),
47 ``CONFIG_ZONE_DMA32`` configuration options. Some 64-bit platforms may need
52 the time. DMA operations can be performed on pages in this zone if the DMA
59 only on some 32-bit architectures and is enabled with ``CONFIG_HIGHMEM``.
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| D | page_owner.rst | 11 and order of pages is stored into certain storage for each page.
12 When we need to know about status of all pages, we can get and analyze
28 allocated base pages, which gives us a quick overview of where the memory
29 is going without the need to screen through all the pages and match the
33 to add "page_owner=on" to your boot cmdline. If the kernel is built
35 boot option, runtime overhead is marginal. If disabled in runtime, it
52 memory system, so, until initialization, many pages can be allocated and
54 pages are investigated and marked as allocated in initialization phase.
57 more accurately. On 2GB memory x86-64 VM box, 13343 early allocated pages
60 un-tracking state.
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| D | vmemmap_dedup.rst | 2 .. SPDX-License-Identifier: GPL-2.0
14 default, there is a one-to-one mapping from a page frame to its corresponding
17 HugeTLB pages consist of multiple base page size pages and is supported by many
18 architectures. See Documentation/admin-guide/mm/hugetlbpage.rst for more
19 details. On the x86-64 architecture, HugeTLB pages of size 2MB and 1GB are
21 consists of 512 base pages and a 1GB HugeTLB page consists of 262144 base pages.
27 is the compound_head field, and this field is the same for all tail pages.
29 By removing redundant ``struct page`` for HugeTLB pages, memory can be returned
32 Different architectures support different HugeTLB pages. For example, the
34 architectures. Because arm64 supports 4k, 16k, and 64k base pages and
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| /linux-6.14.4/Documentation/virt/kvm/s390/ |
| D | s390-pv-boot.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 s390 (IBM Z) Boot/IPL of Protected VMs
8 -------
13 Documentation/virt/kvm/s390/s390-pv.rst for details."
15 On IPL (boot) a small plaintext bootloader is started, which provides
29 direct kernel, ...) without the need to change the boot process.
33 -------
46 The new PV load-device-specific-parameters field specifies all data
52 * AES-XTS Tweak prefix
62 After the initial import of the encrypted data, all defined pages will
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| /linux-6.14.4/Documentation/devicetree/bindings/mips/cavium/ |
| D | bootbus.txt | 1 * Boot Bus
3 The Octeon Boot Bus is a configurable parallel bus with 8 chip
7 - compatible: "cavium,octeon-3860-bootbus"
11 - reg: The base address of the Boot Bus' register bank.
13 - #address-cells: Must be <2>. The first cell is the chip select
16 - #size-cells: Must be <1>.
18 - ranges: There must be one one triplet of (child-bus-address,
19 parent-bus-address, length) for each active chip select. If the
27 - compatible: "cavium,octeon-3860-bootbus-config"
29 - cavium,cs-index: A single cell indicating the chip select that
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| /linux-6.14.4/arch/powerpc/platforms/powernv/ |
| D | opal-fadump.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Firmware-Assisted Dump support on POWER platform (OPAL).
20 #include <asm/fadump-internal.h>
22 #include "opal-fadump.h"
29 * preserving kernel boot is going to process this crash data.
40 if (dn == -FDT_ERR_NOTFOUND) in opal_fadump_dt_scan()
46 prop = of_get_flat_dt_prop(dn, "mpipl-boot", NULL); in opal_fadump_dt_scan()
63 if (be16_to_cpu(opal_fdm_active->registered_regions) == 0) in opal_fadump_dt_scan()
68 pr_err("Failed to get boot memory tag (%lld)\n", ret); in opal_fadump_dt_scan()
77 fadump_conf->boot_mem_top = be64_to_cpu(addr); in opal_fadump_dt_scan()
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| /linux-6.14.4/lib/ |
| D | Kconfig.kfence | 1 # SPDX-License-Identifier: GPL-2.0-only
7 bool "KFENCE: low-overhead sampling-based memory safety error detector"
12 KFENCE is a low-overhead sampling-based detector of heap out-of-bounds
13 access, use-after-free, and invalid-free errors. KFENCE is designed
17 See <file:Documentation/dev-tools/kfence.rst> for more details.
33 allocations will be guarded by KFENCE. May be overridden via boot
37 setting "kfence.sample_interval" to a non-zero value enables KFENCE.
45 pages are required; with one containing the object and two adjacent
46 ones used as guard pages.
52 CPU wake-ups if the system is idle, at the risk of a less predictable
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| /linux-6.14.4/arch/x86/kernel/ |
| D | machine_kexec_64.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2002-2005 Eric Biederman <[email protected]>
27 #include <asm/kexec-bzimage64.h>
47 return kernel_ident_mapping_init(data->info, data->level4p, in mem_region_callback()
48 res->start, res->end + 1); in mem_region_callback()
62 ret = walk_iomem_res_desc(IORES_DESC_ACPI_TABLES, flags, 0, -1, in map_acpi_tables()
64 if (ret && ret != -EINVAL) in map_acpi_tables()
67 /* ACPI tables could be located in ACPI Non-volatile Storage region */ in map_acpi_tables()
68 ret = walk_iomem_res_desc(IORES_DESC_ACPI_NV_STORAGE, flags, 0, -1, in map_acpi_tables()
70 if (ret && ret != -EINVAL) in map_acpi_tables()
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| D | head_64.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit
21 #include <asm/processor-flags.h>
25 #include <asm/nospec-branch.h>
33 * because we need identity-mapped pages.
44 * kernel pages and possibly all of memory.
51 * arch/x86/boot/compressed/head_64.S.
53 * We only come here initially at boot nothing else comes here.
86 * be done now, since this also includes setup of the SEV-SNP CPUID table,
98 * Derive the kernel's physical-to-virtual offset from the physical and
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| /linux-6.14.4/Documentation/arch/x86/ |
| D | tdx.rst | 1 .. SPDX-License-Identifier: GPL-2.0
18 CPU-attested software module called 'the TDX module' runs inside the new
22 TDX also leverages Intel Multi-Key Total Memory Encryption (MKTME) to
23 provide crypto-protection to the VMs. TDX reserves part of MKTME KeyIDs
32 TDX boot-time detection
33 -----------------------
36 boot. Below dmesg shows when TDX is enabled by BIOS::
41 ---------------------------------------
59 Besides initializing the TDX module, a per-cpu initialization SEAMCALL
103 ------------------------------------------
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| /linux-6.14.4/Documentation/dev-tools/ |
| D | kfence.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Kernel Electric-Fence (KFENCE)
7 Kernel Electric-Fence (KFENCE) is a low-overhead sampling-based memory safety
8 error detector. KFENCE detects heap out-of-bounds access, use-after-free, and
9 invalid-free errors.
15 non-production test workloads. One way to quickly achieve a large enough total
19 -----
26 ``kfence.sample_interval`` to non-zero value), configure the kernel with::
38 the kernel boot parameter ``kfence.sample_interval`` in milliseconds. The
46 causes CPU wake-ups when the system is completely idle. This may be undesirable
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| /linux-6.14.4/tools/testing/selftests/mm/ |
| D | thuge-gen.c | 1 // SPDX-License-Identifier: GPL-2.0
4 Before running this huge pages for each huge page size must have been
6 For large pages beyond MAX_PAGE_ORDER (like 1GB on x86) boot options must
10 And nothing using huge pages should run in parallel.
12 ipcrm -m by hand, like this
13 sudo ipcs | awk '$1 == "0x00000000" {print $2}' | xargs -n1 sudo ipcrm -m
36 #define SHM_HUGETLB 04000 /* segment will use huge TLB pages */
75 "cat /sys/kernel/mm/hugepages/hugepages-%lukB/free_hugepages", in show()
110 "/sys/kernel/mm/hugepages/hugepages-%lukB/free_hugepages", in read_free()
121 MAP_PRIVATE|MAP_ANONYMOUS|MAP_HUGETLB|flags, -1, 0); in test_mmap()
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| /linux-6.14.4/Documentation/virt/hyperv/ |
| D | coco.rst | 1 .. SPDX-License-Identifier: GPL-2.0
5 Hyper-V can create and run Linux guests that are Confidential Computing
9 CoCo VMs on Hyper-V share the generic CoCo VM threat model and security
10 objectives described in Documentation/security/snp-tdx-threat-model.rst. Note
11 that Hyper-V specific code in Linux refers to CoCo VMs as "isolated VMs" or
14 A Linux CoCo VM on Hyper-V requires the cooperation and interaction of the
19 * The hardware runs a version of Windows/Hyper-V with support for CoCo VMs
25 * AMD processor with SEV-SNP. Hyper-V does not run guest VMs with AMD SME,
26 SEV, or SEV-ES encryption, and such encryption is not sufficient for a CoCo
27 VM on Hyper-V.
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| /linux-6.14.4/arch/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
22 # IOMMUs not handled by dma-iommu. Drivers must never select this symbol.
29 menu "General architecture-dependent options"
34 Select if the architecture can check permissions at sub-page
80 for kernel debugging, non-intrusive instrumentation and testing.
89 makes certain almost-always-true or almost-always-false branch
92 Certain performance-sensitive kernel code, such as trace points,
106 ( On 32-bit x86, the necessary options added to the compiler
113 Boot time self-test of the branch patching code.
119 Boot time self-test of the call patching code.
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| /linux-6.14.4/arch/powerpc/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
5 def_bool PPC64 && $(cc-option, -mabi=elfv2)
8 def_bool PPC64 && $(cc-option, -mcpu=power10 -mprefixed)
11 # Clang has a bug (https://github.com/llvm/llvm-project/issues/62372)
12 # where pcrel code is not generated if -msoft-float, -mno-altivec, or
13 # -mno-vsx options are also given. Without these options, fp/vec
16 def_bool PPC64 && CC_IS_GCC && $(cc-option, -mcpu=power10 -mpcrel)
35 # On Book3S 64, the default virtual address space for 64-bit processes
38 # between bottom-up and top-down allocations for applications that
41 default 29 if PPC_BOOK3S_64 && PPC_64K_PAGES # 29 = 45 (32T) - 16 (64K)
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