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/linux-6.14.4/Documentation/devicetree/bindings/iio/adc/
Dadi,axi-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/adi,axi-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AXI ADC IP core
10 - Michael Hennerich <[email protected]>
13 Analog Devices Generic AXI ADC IP core for interfacing an ADC device
17 interface for the actual ADC, while this IP core will interface
18 to the data-lines of the ADC and handle the streaming of data into
26 - adi,axi-adc-10.0.a
[all …]
Dxilinx-xadc.txt6 The Xilinx XADC is an ADC that can be found in the Series 7 FPGAs from Xilinx.
10 on all series 7 platforms and is a softmacro with a AXI interface. This binding
14 The Xilinx System Monitor is an ADC that is found in the UltraScale and
17 System Monitor through an AXI interface in the FPGA fabric. This IP core is
22 - compatible: Should be one of
23 * "xlnx,zynq-xadc-1.00.a": When using the ZYNQ device
25 * "xlnx,axi-xadc-1.00.a": When using the axi-xadc pcore to
27 * "xlnx,system-management-wiz-1.3": When using the
30 - reg: Address and length of the register set for the device
31 - interrupts: Interrupt for the XADC control interface.
[all …]
Dadi,ad7625.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/adi,ad7625.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <[email protected]>
11 - Nuno Sá <[email protected]>
24 - adi,ad7625
25 - adi,ad7626
26 - adi,ad7960
27 - adi,ad7961
[all …]
/linux-6.14.4/drivers/iio/adc/
Dadi-axi-adc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Analog Devices Generic AXI ADC IP core
6 * Copyright 2012-2020 Analog Devices Inc.
23 #include <linux/fpga/adi-axi-common.h>
26 #include <linux/iio/buffer-dmaengine.h>
35 /* ADC controls */
48 /* ADC Channel controls */
96 guard(mutex)(&st->lock); in axi_adc_enable()
97 ret = regmap_set_bits(st->regmap, ADI_AXI_REG_RSTN, in axi_adc_enable()
107 ret = regmap_read_poll_timeout(st->regmap, ADI_AXI_ADC_REG_DRP_STATUS, in axi_adc_enable()
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # ADC drivers
10 bool "ST-Ericsson AB8500 GPADC driver"
25 tristate "Analog Devices AD4000 ADC Driver"
31 SPI analog to digital converters (ADC).
37 tristate "Analog Device AD4130 ADC Driver"
45 Say yes here to build support for Analog Devices AD4130-8 SPI analog
46 to digital converters (ADC).
52 tristate "Analog Device AD4695 ADC Driver"
59 analog to digital converters (ADC).
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for IIO ADC drivers
7 obj-$(CONFIG_AB8500_GPADC) += ab8500-gpadc.o
8 obj-$(CONFIG_AD_SIGMA_DELTA) += ad_sigma_delta.o
9 obj-$(CONFIG_AD4000) += ad4000.o
10 obj-$(CONFIG_AD4130) += ad4130.o
11 obj-$(CONFIG_AD4695) += ad4695.o
12 obj-$(CONFIG_AD7091R) += ad7091r-base.o
13 obj-$(CONFIG_AD7091R5) += ad7091r5.o
14 obj-$(CONFIG_AD7091R8) += ad7091r8.o
[all …]
Dxilinx-xadc-core.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2013-2014 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <[email protected]>
9 * - XADC hardmacro: Xilinx UG480
10 * - ZYNQ XADC interface: Xilinx UG585
11 * - AXI XADC interface: Xilinx PG019
36 #include "xilinx-xadc.h"
88 /* AXI register definitions */
117 * overloaded by the interrupts that it soft-lockups. For this reason the driver
126 writel(val, xadc->base + reg); in xadc_write_reg()
[all …]
Dad9467.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Analog Devices AD9467 SPI ADC driver
5 * Copyright 2012-2020 Analog Devices Inc.
32 * ADI High-Speed ADC common spi interface registers
33 * See Application-Note AN-877:
34 * https://www.analog.com/media/en/technical-documentation/application-notes/AN-877.pdf
85 * Analog Devices AD9265 16-Bit, 125/105/80 MSPS ADC
93 * Analog Devices AD9434 12-Bit, 370/500 MSPS ADC
101 * Analog Devices AD9467 16-Bit, 200/250 MSPS ADC
109 * Analog Devices AD9643 14-Bit, 170/210/250 MSPS ADC
[all …]
Dad7625.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 * Analog Devices Inc. AD7625 ADC driver
8 * Note that this driver requires the AXI ADC IP block configured for
47 /* AD7625_CHAN_SPEC - Define a chan spec structure for a specific chip */
75 * Waveforms containing the last-requested and rounded
85 * EN2 controls the device -3dB bandwidth (and by extension, max
189 cnv_wf.duty_length_ns = st->info->timing_spec->conv_high_ns; in ad7625_set_sampling_freq()
191 ret = pwm_round_waveform_might_sleep(st->cnv_pwm, &cnv_wf); in ad7625_set_sampling_freq()
202 st->info->chan_spec.scan_type.realbits, in ad7625_set_sampling_freq()
203 st->ref_clk_rate_hz); in ad7625_set_sampling_freq()
[all …]
/linux-6.14.4/arch/arm/boot/dts/st/
Dstm32mp133.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
14 reg-names = "m_can", "message_ram";
17 interrupt-names = "int0", "int1";
19 clock-names = "hclk", "cclk";
20 bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
27 reg-names = "m_can", "message_ram";
30 interrupt-names = "int0", "int1";
32 clock-names = "hclk", "cclk";
33 bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
[all …]
Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
[all …]
/linux-6.14.4/drivers/iio/dac/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
22 module will be called ad3552r-hs.
41 tristate "Analog Devices AD5064 and similar multi-channel DAC driver"
45 AD5045, AD5064, AD5064-1, AD5065, AD5625, AD5625R, AD5627, AD5627R,
59 AD5362, AD5363, AD5370, AD5371, AD5373 multi-channel
72 AD5382, AD5383, AD5384, AD5390, AD5391, AD5392 multi-channel
82 Say yes here to build support for Analog Devices AD5421 loop-powered
83 digital-to-analog converters (DAC).
115 tristate "Analog Devices AD5592R ADC/DAC driver"
127 tristate "Analog Devices AD5593R ADC/DAC driver"
[all …]
/linux-6.14.4/Documentation/iio/
Dad7606.rst1 .. SPDX-License-Identifier: GPL-2.0-only
7 ADC driver for Analog Devices Inc. AD7606 and similar devices. The module name
24 ----------------
30 --------------------
34 platform in the device tree (with no io-backends node defined, see below).
36 IIO-backend mode
37 ----------------
41 The backend mode is enabled when through the definition of the "io-backends"
44 The reference configuration for the current implementation of IIO-backend mode
46 https://wiki.analog.com/resources/eval/user-guides/ad7606x-fmc/hdl
[all …]
/linux-6.14.4/arch/arm/boot/dts/nxp/imx/
Dimx6sx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6sx-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6sx-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
60 #address-cells = <1>;
[all …]
Dimx6ul.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
57 #address-cells = <1>;
[all …]
/linux-6.14.4/arch/arc/boot/dts/
Dhsdk.dts1 // SPDX-License-Identifier: GPL-2.0-only
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/reset/snps,hsdk-reset.h>
18 #address-cells = <2>;
19 #size-cells = <2>;
22 … "earlycon=uart8250,mmio32,0xf0005000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
30 #address-cells = <1>;
31 #size-cells = <0>;
62 input_clk: input-clk {
[all …]
/linux-6.14.4/drivers/clk/
Dclk-npcm8xx.c1 // SPDX-License-Identifier: GPL-2.0
15 #include <linux/clk-provider.h>
23 #include <dt-bindings/clock/nuvoton,npcm845-clk.h>
24 #include <soc/nuvoton/clock-npcm8xx.h>
190 { NPCM8XX_CLKDIV1, 21, 5, "pre_adc", &npcm8xx_muxes[6].hw, CLK_DIVIDER_READ_ONLY, 0, -1 },
196 …{ NPCM8XX_CLKDIV1, 28, 3, "adc", &npcm8xx_pre_divs[0].hw, CLK_DIVIDER_READ_ONLY | CLK_DIVIDER_POWE…
237 val = readl_relaxed(pll->pllcon); in npcm8xx_clk_pll_recalc_rate()
265 return ERR_PTR(-ENOMEM); in npcm8xx_clk_register_pll()
273 pll->pllcon = pllcon; in npcm8xx_clk_register_pll()
274 pll->hw.init = &init; in npcm8xx_clk_register_pll()
[all …]
/linux-6.14.4/sound/soc/codecs/
Drt5631.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5631.c -- RT5631 ALSA Soc Audio driver
22 #include <sound/soc-dapm.h>
68 * rt5631_write_index - write index register of 2nd layer
78 * rt5631_read_index - read index register of 2nd layer
169 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
170 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -95625, 375, 0);
171 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
189 ucontrol->value.integer.value[0] = rt5631->dmic_used_flag; in rt5631_dmic_get()
200 rt5631->dmic_used_flag = ucontrol->value.integer.value[0]; in rt5631_dmic_put()
[all …]
/linux-6.14.4/arch/arm64/boot/dts/renesas/
Dr9a08g045.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/r9a08g045-cpg.h>
10 #include <dt-bindings/clock/renesas,r9a08g045-vbattb.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
17 audio_clk1: audio1-clk {
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
21 clock-frequency = <0>;
[all …]
Dr9a07g043.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/clock/r9a07g043-cpg.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
15 audio_clk1: audio1-clk {
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
19 clock-frequency = <0>;
22 audio_clk2: audio2-clk {
23 compatible = "fixed-clock";
[all …]
Dr9a07g054.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/r9a07g054-cpg.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_clk1: audio1-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
23 audio_clk2: audio2-clk {
[all …]
Dr9a07g044.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/r9a07g044-cpg.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_clk1: audio1-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
23 audio_clk2: audio2-clk {
[all …]
/linux-6.14.4/arch/arm/boot/dts/broadcom/
Dbcm-cygnus.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-cygnus.h>
38 #address-cells = <1>;
39 #size-cells = <1>;
42 interrupt-parent = <&gic>;
54 #address-cells = <1>;
55 #size-cells = <0>;
59 compatible = "arm,cortex-a9";
60 next-level-cache = <&L2>;
[all …]
/linux-6.14.4/drivers/hwmon/
Daxi-fan-control.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/fpga/adi-axi-common.h>
11 #include <linux/hwmon-sysfs.h>
66 iowrite32(val, ctl->base + reg); in axi_iowrite()
72 return ioread32(ctl->base + reg); in axi_ioread()
77 * T = /raw * 509.3140064 / 65535) - 280.2308787
83 u32 temp = axi_ioread(attr->index, ctl); in axi_fan_control_show()
85 temp = DIV_ROUND_CLOSEST_ULL(temp * 509314ULL, 65535) - 280230; in axi_fan_control_show()
103 axi_iowrite(temp, attr->index, ctl); in axi_fan_control_store()
148 return DIV_ROUND_CLOSEST(60 * ctl->clk_rate, ctl->ppr * tach); in axi_fan_control_get_fan_rpm()
[all …]
/linux-6.14.4/arch/arm/boot/dts/xilinx/
Dzynq-7000.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
7 #address-cells = <1>;
8 #size-cells = <1>;
9 compatible = "xlnx,zynq-7000";
12 #address-cells = <1>;
13 #size-cells = <0>;
16 compatible = "arm,cortex-a9";
20 clock-latency = <1000>;
21 cpu0-supply = <&regulator_vccpint>;
[all …]

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