| /linux-6.14.4/drivers/gpu/drm/imx/ipuv3/ |
| D | imx-tve.c | 106 struct imx_tve *tve; member
126 return container_of(c, struct imx_tve_encoder, connector)->tve; in con_to_tve()
131 return container_of(e, struct imx_tve_encoder, encoder)->tve; in enc_to_tve()
134 static void tve_enable(struct imx_tve *tve) in tve_enable() argument
136 clk_prepare_enable(tve->clk); in tve_enable()
137 regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, TVE_EN, TVE_EN); in tve_enable()
140 regmap_write(tve->regmap, TVE_STAT_REG, 0xffffffff); in tve_enable()
143 if (tve->mode == TVE_MODE_VGA) in tve_enable()
144 regmap_write(tve->regmap, TVE_INT_CONT_REG, 0); in tve_enable()
146 regmap_write(tve->regmap, TVE_INT_CONT_REG, in tve_enable()
[all …]
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| D | Makefile | 8 obj-$(CONFIG_DRM_IMX_TVE) += imx-tve.o
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| D | Kconfig | 28 Choose this to enable the internal Television Encoder (TVe)
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| /linux-6.14.4/Documentation/devicetree/bindings/display/ |
| D | faraday,tve200.yaml | 29 - const: TVE
61 clock-names = "PCLK", "TVE";
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| D | simple-framebuffer.yaml | 143 - mixer1-lcd1-tve
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| /linux-6.14.4/drivers/gpu/drm/sun4i/ |
| D | sun8i_tcon_top.c | 187 * channel clock. Parent could be either TCON TV or TVE clock. For now in sun8i_tcon_top_bind()
188 * we leave this fixed to TCON TV, since TVE driver for R40 is not yet in sun8i_tcon_top_bind()
190 * if TVE is active on each TCON TV. If it is, mux should be switched in sun8i_tcon_top_bind()
191 * to TVE clock parent. in sun8i_tcon_top_bind()
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| D | Kconfig | 86 HDMI, TVE and LCD.
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| D | sun4i_tv.c | 564 .name = "sun4i-tve",
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| /linux-6.14.4/arch/arm/boot/dts/nxp/imx/ |
| D | imx53-mba53.dts | 228 &tve {
232 fsl,tve-mode = "vga";
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| D | imx53-qsb-common.dtsi | 325 &tve {
329 fsl,tve-mode = "vga";
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| D | imx53-qsb.dts | 109 &tve {
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| D | imx53.dtsi | 813 tve: tve@63ff0000 { label
814 compatible = "fsl,imx53-tve";
819 clock-names = "tve", "di_sel";
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| D | imx53-qsrb.dts | 145 &tve {
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| /linux-6.14.4/drivers/gpu/drm/tve200/ |
| D | tve200_drv.c | 189 priv->clk = devm_clk_get(dev, "TVE"); in tve200_probe()
191 dev_err(dev, "unable to get TVE clock\n"); in tve200_probe()
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| D | tve200_drm.h | 96 #define TVE200_TVEEN BIT(0) /* Enable TVE block */
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| /linux-6.14.4/drivers/clk/sunxi-ng/ |
| D | ccu-suniv-f1c100s.c | 174 static SUNXI_CCU_GATE(bus_tve_clk, "bus-tve", "ahb",
294 static SUNXI_CCU_M_WITH_MUX_TABLE_GATE(tve_clk2_clk, "tve-clk2",
297 static SUNXI_CCU_M_WITH_GATE(tve_clk1_clk, "tve-clk1", "tve-clk2",
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| D | ccu-sun20i-d1.c | 762 static SUNXI_CCU_MP_HW_WITH_MUX_GATE(tve_clk, "tve", tcon_tve_parents, 0xbb0,
769 static SUNXI_CCU_GATE_HWS(bus_tve_top_clk, "bus-tve-top", psi_ahb_hws,
771 static SUNXI_CCU_GATE_HWS(bus_tve_clk, "bus-tve", psi_ahb_hws,
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| D | ccu-sun5i.c | 280 static SUNXI_CCU_GATE(ahb_tve_clk, "ahb-tve", "ahb",
442 static SUNXI_CCU_GATE(dram_tve_clk, "dram-tve", "pll-ddr",
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| D | ccu-sun8i-h3.c | 270 static SUNXI_CCU_GATE(bus_tve_clk, "bus-tve", "ahb1",
466 static SUNXI_CCU_M_WITH_MUX_GATE(tve_clk, "tve", tve_parents,
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| /linux-6.14.4/drivers/gpu/ipu-v3/ |
| D | ipu-di.c | 337 .offset_count = div * sig->v_to_h_sync + 18, /* magic value from Freescale TVE driver */ in ipu_di_sync_config_noninterlaced()
354 .offset_count = 1, /* magic value from Freescale TVE driver */ in ipu_di_sync_config_noninterlaced()
363 .offset_count = div * sig->v_to_h_sync + 18, /* magic value from Freescale TVE driver */ in ipu_di_sync_config_noninterlaced()
372 .offset_count = 1, /* magic value from Freescale TVE driver */ in ipu_di_sync_config_noninterlaced()
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| /linux-6.14.4/arch/powerpc/platforms/powernv/ |
| D | pci-ioda.c | 1050 * Reconfigure TVE#0 to be usable as 64-bit DMA space.
1054 * by hardware, which indicates TVE#1 should be used instead of TVE#0.
1057 * devices in TVE#0.
1059 * In order to work around this, reconfigure TVE#0 to be suitable for 64-bit
1110 pe_info(pe, "Using 64-bit DMA iommu bypass (through TVE#0)\n"); in pnv_pci_ioda_dma_64bit_bypass()
1137 * to access 4GB or more, on PHB3 we can reconfigure TVE#0 to in pnv_pci_ioda_iommu_bypass_supported()
1294 * Map TCE table through TVT. The TVE index is the PE number in pnv_pci_ioda2_set_window()
1595 /* TVE #1 is selected by PCI address bit 59 */ in pnv_pci_ioda2_setup_dma_pe()
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| /linux-6.14.4/drivers/clk/ingenic/ |
| D | jz4755-cgu.c | 175 "tve", CGU_CLK_MUX | CGU_CLK_GATE,
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| D | jz4760-cgu.c | 235 "tve", CGU_CLK_GATE | CGU_CLK_MUX,
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| /linux-6.14.4/arch/arm/boot/dts/allwinner/ |
| D | sunxi-h3-h5.dtsi | 71 framebuffer-tve {
74 allwinner,pipeline = "mixer1-lcd1-tve";
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| /linux-6.14.4/arch/arm/boot/dts/gemini/ |
| D | gemini.dtsi | 435 clock-names = "PCLK", "TVE";
|