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/linux-6.14.4/Documentation/devicetree/bindings/soc/mediatek/
Dmtk-svs.yaml4 $id: http://devicetree.org/schemas/soc/mediatek/mtk-svs.yaml#
7 title: MediaTek Smart Voltage Scaling (SVS)
15 The SVS engine is a piece of hardware which has several
19 driver could apply SVS bank voltage to PMIC/Buck.
24 - mediatek,mt8183-svs
25 - mediatek,mt8186-svs
26 - mediatek,mt8188-svs
27 - mediatek,mt8192-svs
28 - mediatek,mt8195-svs
32 description: Address range of the MTK SVS controller.
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/linux-6.14.4/drivers/soc/mediatek/
Dmtk-svs.c37 /* svs bank mode support */
43 /* svs bank volt flags */
50 /* svs bank register fields and common configuration */
123 /* SVS Thermal Coefficients */
130 /* svs bank related setting */
177 * enum svsb_sw_id - SVS Bank Software ID
193 * enum svsb_type - SVS Bank 2-line: Type and Role
207 * enum svsb_phase - svs bank phase enumeration
208 * @SVSB_PHASE_ERROR: svs bank encounters unexpected condition
209 * @SVSB_PHASE_INIT01: svs bank basic init for data calibration
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DKconfig73 tristate "MediaTek Smart Voltage Scaling(SVS)"
76 The Smart Voltage Scaling(SVS) engine is a piece of hardware
80 driver could apply SVS bank voltage to PMIC/Buck.
DMakefile10 obj-$(CONFIG_MTK_SVS) += mtk-svs.o
/linux-6.14.4/drivers/thermal/mediatek/
Dauxadc_thermal.c479 * the bank concept wouldn't be necessary here. However, the SVS (Smart
520 * so the bank concept wouldn't be necessary here. However, the SVS (Smart
551 * so the bank concept wouldn't be necessary here. However, the SVS (Smart
585 * so the bank concept wouldn't be necessary here. However, the SVS (Smart
644 * the bank concept wouldn't be necessary here. However, the SVS (Smart
/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dipq9574-rdp-common.dtsi100 * Update the regulator-min-microvolt with SVS voltage of 725mV so that
/linux-6.14.4/drivers/cpufreq/
Dmediatek-cpufreq-hw.c257 pr_info("SVS of CPU%d is not enabled\n", policy->cpu); in mtk_cpufreq_hw_cpu_init()
/linux-6.14.4/arch/arm64/boot/dts/mediatek/
Dmt8192.dtsi812 svs: svs@1100bc00 { label
813 compatible = "mediatek,mt8192-svs";
819 nvmem-cell-names = "svs-calibration-data", "t-calibration-data";
Dmt8183.dtsi1200 svs: svs@1100bc00 { label
1201 compatible = "mediatek,mt8183-svs";
1208 nvmem-cell-names = "svs-calibration-data",
Dmt8186.dtsi1384 svs: svs@1100bc00 { label
1385 compatible = "mediatek,mt8186-svs";
1391 nvmem-cell-names = "svs-calibration-data", "t-calibration-data";
Dmt8195.dtsi1131 svs: svs@1100bc00 { label
1132 compatible = "mediatek,mt8195-svs";
1138 nvmem-cell-names = "svs-calibration-data", "t-calibration-data";
1725 svs_calib_data: svs-calib@580 {
/linux-6.14.4/drivers/gpu/drm/amd/display/dc/dce/
Ddce_clock_source.c362 * ## SVS Wed 15 Jul 2009 */ in calculate_pixel_clock_pll_dividers()