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/linux-6.14.4/include/dt-bindings/clock/
Dqcom,gcc-sdm660.h142 #define PCIE_0_GDSC 0 macro
Dqcom,gcc-msm8994.h166 #define PCIE_0_GDSC 1 macro
Dqcom,qdu1000-gcc.h173 #define PCIE_0_GDSC 0 macro
Dqcom,sm7150-gcc.h175 #define PCIE_0_GDSC 0 macro
Dqcom,sar2130p-gcc.h174 #define PCIE_0_GDSC 0 macro
Dqcom,qcs615-gcc.h199 #define PCIE_0_GDSC 1 macro
Dqcom,sm8550-gcc.h222 #define PCIE_0_GDSC 0 macro
Dqcom,gcc-sdm845.h233 #define PCIE_0_GDSC 0 macro
Dqcom,gcc-sm8450.h241 #define PCIE_0_GDSC 0 macro
Dqcom,sm8650-gcc.h245 #define PCIE_0_GDSC 0 macro
Dqcom,gcc-sm8150.h247 #define PCIE_0_GDSC 0 macro
Dqcom,gcc-sm8350.h254 #define PCIE_0_GDSC 0 macro
Dqcom,gcc-sm8250.h259 #define PCIE_0_GDSC 0 macro
Dqcom,gcc-sc8180x.h305 #define PCIE_0_GDSC 1 macro
Dqcom,sa8775p-gcc.h310 #define PCIE_0_GDSC 0 macro
Dqcom,gcc-msm8998.h200 #define PCIE_0_GDSC 0 macro
/linux-6.14.4/Documentation/devicetree/bindings/pci/
Dqcom,pcie-sc8180x.yaml165 power-domains = <&gcc PCIE_0_GDSC>;
Dqcom,pcie-sm8150.yaml150 power-domains = <&gcc PCIE_0_GDSC>;
Dqcom,pcie-sa8775p.yaml158 power-domains = <&gcc PCIE_0_GDSC>;
Dqcom,pcie-sm8350.yaml154 power-domains = <&gcc PCIE_0_GDSC>;
Dqcom,pcie-sm8250.yaml165 power-domains = <&gcc PCIE_0_GDSC>;
Dqcom,pcie-sm8550.yaml168 power-domains = <&gcc PCIE_0_GDSC>;
Dqcom,pcie-sm8450.yaml172 power-domains = <&gcc PCIE_0_GDSC>;
/linux-6.14.4/drivers/clk/qcom/
Dgcc-sar2130p.c2054 static struct gdsc pcie_0_gdsc = { variable
2059 .name = "pcie_0_gdsc",
2287 [PCIE_0_GDSC] = &pcie_0_gdsc,
Dgcc-sdm660.c2270 static struct gdsc pcie_0_gdsc = { variable
2274 .name = "pcie_0_gdsc",
2417 [PCIE_0_GDSC] = &pcie_0_gdsc,

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