Searched full:mt7988 (Results 1 – 25 of 44) sorted by relevance
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| /linux-6.14.4/Documentation/devicetree/bindings/phy/ |
| D | mediatek,mt7988-xfi-tphy.yaml | 4 $id: http://devicetree.org/schemas/phy/mediatek,mt7988-xfi-tphy.yaml#
7 title: MediaTek MT7988 XFI T-PHY
15 MediaTek's 10G-capabale MT7988 SoC.
20 const: mediatek,mt7988-xfi-tphy
42 One instance of the T-PHY on MT7988 suffers from a performance
45 is required for XFI Port0 of the MT7988 SoC to be in compliance with
63 #include <dt-bindings/clock/mediatek,mt7988-clk.h>
69 compatible = "mediatek,mt7988-xfi-tphy";
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| /linux-6.14.4/Documentation/devicetree/bindings/clock/ |
| D | mediatek,mt7988-ethwarp.yaml | 4 $id: http://devicetree.org/schemas/clock/mediatek,mt7988-ethwarp.yaml#
7 title: MediaTek MT7988 ethwarp Controller
13 The Mediatek MT7988 ethwarp controller provides clocks and resets for the
14 Ethernet related subsystems found the MT7988 SoC.
20 - const: mediatek,mt7988-ethwarp
47 compatible = "mediatek,mt7988-ethwarp";
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| D | mediatek,mt7988-xfi-pll.yaml | 4 $id: http://devicetree.org/schemas/clock/mediatek,mt7988-xfi-pll.yaml#
7 title: MediaTek MT7988 XFI PLL Clock Controller
18 const: mediatek,mt7988-xfi-pll
43 compatible = "mediatek,mt7988-xfi-pll";
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| D | mediatek,topckgen.yaml | 42 - mediatek,mt7988-mcusys
43 - mediatek,mt7988-topckgen
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| D | mediatek,ethsys.yaml | 25 - mediatek,mt7988-ethsys
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| D | mediatek,apmixedsys.yaml | 26 - mediatek,mt7988-apmixedsys
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| /linux-6.14.4/drivers/clk/mediatek/ |
| D | clk-mt7988-eth.c | 16 #include <dt-bindings/clock/mediatek,mt7988-clk.h>
17 #include <dt-bindings/reset/mediatek,mt7988-resets.h>
131 { .compatible = "mediatek,mt7988-ethsys", .data = ðdma_desc },
132 { .compatible = "mediatek,mt7988-sgmiisys0", .data = &sgmii0_desc },
133 { .compatible = "mediatek,mt7988-sgmiisys1", .data = &sgmii1_desc },
134 { .compatible = "mediatek,mt7988-ethwarp", .data = ðwarp_desc },
141 .name = "clk-mt7988-eth",
149 MODULE_DESCRIPTION("MediaTek MT7988 Ethernet clocks driver");
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| D | clk-mt7988-xfipll.c | 13 #include <dt-bindings/clock/mediatek,mt7988-clk.h>
66 { .compatible = "mediatek,mt7988-xfi-pll", .data = &xfipll_desc },
73 .name = "clk-mt7988-xfipll",
81 MODULE_DESCRIPTION("MediaTek MT7988 XFI PLL clock driver");
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| D | clk-mt7988-apmixed.c | 17 #include <dt-bindings/clock/mediatek,mt7988-clk.h>
75 { .compatible = "mediatek,mt7988-apmixedsys" },
109 .name = "clk-mt7988-apmixed",
115 MODULE_DESCRIPTION("MediaTek MT7988 apmixedsys clocks driver");
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| D | clk-mt7988-infracfg.c | 16 #include <dt-bindings/clock/mediatek,mt7988-clk.h>
17 #include <dt-bindings/reset/mediatek,mt7988-resets.h>
284 { .compatible = "mediatek,mt7988-infracfg", .data = &infra_desc },
291 .name = "clk-mt7988-infracfg",
299 MODULE_DESCRIPTION("MediaTek MT7988 infracfg clocks driver");
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| D | Makefile | 70 obj-$(CONFIG_COMMON_CLK_MT7988) += clk-mt7988-apmixed.o
71 obj-$(CONFIG_COMMON_CLK_MT7988) += clk-mt7988-topckgen.o
72 obj-$(CONFIG_COMMON_CLK_MT7988) += clk-mt7988-infracfg.o
73 obj-$(CONFIG_COMMON_CLK_MT7988) += clk-mt7988-eth.o
74 obj-$(CONFIG_COMMON_CLK_MT7988) += clk-mt7988-xfipll.o
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| D | clk-mt7988-topckgen.c | 16 #include <dt-bindings/clock/mediatek,mt7988-clk.h>
310 { .compatible = "mediatek,mt7988-topckgen", .data = &topck_desc },
311 { .compatible = "mediatek,mt7988-mcusys", .data = &mcusys_desc },
320 .name = "clk-mt7988-topckgen",
326 MODULE_DESCRIPTION("MediaTek MT7988 top clock generators driver");
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| /linux-6.14.4/arch/arm64/boot/dts/mediatek/ |
| D | mt7988a.dtsi | 3 #include <dt-bindings/clock/mediatek,mt7988-clk.h>
7 #include <dt-bindings/reset/mediatek,mt7988-resets.h>
136 compatible = "mediatek,mt7988-infracfg", "syscon";
143 compatible = "mediatek,mt7988-topckgen", "syscon";
149 compatible = "mediatek,mt7988-wdt";
156 compatible = "mediatek,mt7988-apmixedsys";
162 compatible = "mediatek,mt7988-pinctrl";
215 compatible = "mediatek,mt7988-pwm";
234 compatible = "mediatek,mt7988-mcusys", "syscon";
240 compatible = "mediatek,mt7988-uart", "mediatek,mt6577-uart";
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| /linux-6.14.4/Documentation/devicetree/bindings/net/pcs/ |
| D | mediatek,sgmiisys.yaml | 30 - mediatek,mt7988-sgmiisys0
31 - mediatek,mt7988-sgmiisys1
50 const: mediatek,mt7988-sgmii
79 - mediatek,mt7988-sgmiisys0
80 - mediatek,mt7988-sgmiisys1
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| /linux-6.14.4/Documentation/devicetree/bindings/pinctrl/ |
| D | mediatek,mt7988-pinctrl.yaml | 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7988-pinctrl.yaml#
7 title: MediaTek MT7988 Pin Controller
13 The MediaTek's MT7988 Pin controller is used to control SoC pins.
18 - mediatek,mt7988-pinctrl
484 compatible = "mediatek,mt7988-pinctrl";
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| /linux-6.14.4/Documentation/devicetree/bindings/sound/ |
| D | mediatek,mt7986-afe.yaml | 19 - mediatek,mt7988-afe
108 const: mediatek,mt7988-afe
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| /linux-6.14.4/drivers/net/dsa/ |
| D | Kconfig | 45 MT7621ST and MT7623AI SoCs, and built-in switch in MT7988 SoC are
66 in the MediaTek MT7988 SoC.
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| /linux-6.14.4/Documentation/devicetree/bindings/mmc/ |
| D | mtk-sd.yaml | 24 - mediatek,mt7988-mmc
240 - mediatek,mt7988-mmc
282 - mediatek,mt7988-mmc
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| /linux-6.14.4/drivers/net/ethernet/mediatek/ |
| D | mtk_wed_wo.h | 94 #define MT7988_FIRMWARE_WO0 "mediatek/mt7988/mt7988_wo_0.bin"
95 #define MT7988_FIRMWARE_WO1 "mediatek/mt7988/mt7988_wo_1.bin"
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| /linux-6.14.4/drivers/net/phy/mediatek/ |
| D | Kconfig | 25 the MT7981 and MT7988 SoCs. These PHYs need calibration data
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| /linux-6.14.4/Documentation/devicetree/bindings/net/dsa/ |
| D | mediatek,mt7530.yaml | 23 The MT7988 SoC comes with a built-in switch similar to MT7531 as well as four
92 Built-in switch of the MT7988 SoC
93 const: mediatek,mt7988-switch
292 - mediatek,mt7988-switch
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| /linux-6.14.4/Documentation/devicetree/bindings/soc/mediatek/ |
| D | mediatek,mt7986-wo-ccif.yaml | 23 - mediatek,mt7988-wo-ccif
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| /linux-6.14.4/Documentation/devicetree/bindings/watchdog/ |
| D | mediatek,mtk-wdt.yaml | 28 - mediatek,mt7988-wdt
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| /linux-6.14.4/drivers/pinctrl/mediatek/ |
| D | Makefile | 31 obj-$(CONFIG_PINCTRL_MT7988) += pinctrl-mt7988.o
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| /linux-6.14.4/Documentation/devicetree/bindings/pwm/ |
| D | mediatek,mt2712-pwm.yaml | 27 - mediatek,mt7988-pwm
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