Searched full:msdc (Results 1 – 9 of 9) sorted by relevance
7 title: MTK MSDC Storage Host Controller60 Should at least contain MSDC GIC interrupt. To support SDIO in-band wakeup, an extended67 - const: msdc267 - description: msdc subsys clock gate332 - description: msdc subsys clock gate379 interrupt-names = "msdc", "sdio_wakeup";
61 .name = "clk-mt8192-msdc",
884 tristate "Clock driver for MediaTek MT8192 msdc"888 This driver supports MediaTek MT8192 msdc and msdc_top clocks.
135 obj-$(CONFIG_COMMON_CLK_MT8192_MSDC) += clk-mt8192-msdc.o
477 struct clk *src_clk; /* msdc source clock */478 struct clk *h_clk; /* msdc h_clk */480 struct clk *src_clk_cg; /* msdc source clock control gate */481 struct clk *sys_clk_cg; /* msdc subsys clock control gate */482 struct clk *crypto_clk; /* msdc crypto clock control gate */2405 * MSDC IP which supports data tune + async fifo can do CMD/DAT tune2664 * On MediaTek SoCs the MSDC controller's CQE uses msdc_hclk as ITCFVAL in msdc_cqe_cit_cal()3289 .name = "mtk-msdc",
412 /* MSDC */
812 /* MSDC */1353 PINCTRL_PIN_FUNCTION("msdc", mt7623_msdc),
402 * or msdc->cap_dirty_lock. List presence can also be checked while
506 interrupt-names = "msdc", "sdio_wakeup";