/linux-6.14.4/Documentation/filesystems/ext4/ |
D | blocks.rst | 7 sectors between 1KiB and 64KiB, and the number of sectors must be an 10 4KiB. You may experience mounting problems if block size is greater than 11 page size (i.e. 64KiB blocks on a i386 which only has 4KiB memory 24 - 1KiB 25 - 2KiB 26 - 4KiB 27 - 64KiB 86 - 1KiB 87 - 2KiB 88 - 4KiB [all …]
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/linux-6.14.4/Documentation/mm/damon/ |
D | monitoring_intervals_tuning_example.rst | 114 12 addr 56.364 GiB size 4.000 KiB access 95 % age 16 s 115 13 addr 49.275 GiB size 4.000 KiB access 100 % age 8 m 24 s # hottest 123 [-5,519,996,000, 3,800,005,000) 4.000 KiB |* | 129 [50,400,010,000, 59,720,011,000) 4.000 KiB |* | 132 DAMON found two distinct 4 KiB regions that pretty hot. The regions are also 133 well aged. The hottest 4 KiB region was keeping the access frequency for about 137 Especially, the finding of the 4 KiB regions among the 62 GiB total memory 163 26 addr 9.513 GiB size 12.000 KiB access 20 % age 0 ns 164 27 addr 9.511 GiB size 108.000 KiB access 25 % age 0 ns 165 28 addr 9.513 GiB size 20.000 KiB access 25 % age 0 ns [all …]
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/linux-6.14.4/arch/x86/platform/intel-quark/ |
D | imr_selftest.c | 56 * zero sized allocations and 1 KiB sized areas. 84 /* Test that a 1 KiB IMR @ zero with read/write all will bomb out. */ in imr_self_test() 87 imr_self_test_result(ret < 0, "1KiB IMR @ 0x00000000 - access-all\n"); in imr_self_test() 89 /* Test that a 1 KiB IMR @ zero with CPU only will work. */ in imr_self_test() 91 imr_self_test_result(ret >= 0, "1KiB IMR @ 0x00000000 - cpu-access\n"); in imr_self_test() 97 /* Test 2 KiB works. */ in imr_self_test() 100 imr_self_test_result(ret >= 0, "2KiB IMR @ 0x00000000\n"); in imr_self_test() 103 imr_self_test_result(ret == 0, "teardown 2KiB\n"); in imr_self_test()
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D | imr.c | 56 * 23:2 1 KiB aligned lo address 61 * 23:2 1 KiB aligned hi address 252 pr_err("base %pa size 0x%08zx must align to 1KiB\n", in imr_check_params() 292 * @base: physical base address of region aligned to 1KiB. 293 * @size: physical size of region in bytes must be aligned to 1KiB. 401 * @base: physical base address of region aligned to 1 KiB. 402 * @size: physical size of region in bytes aligned to 1 KiB. 493 * @base: physical base address of region aligned to 1 KiB. 494 * @size: physical size of region in bytes aligned to 1 KiB. 562 pr_err("unable to setup IMR for kernel: %zu KiB (%lx - %lx)\n", in imr_fixup_memmap() [all …]
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/linux-6.14.4/arch/arm/boot/dts/broadcom/ |
D | bcm2837.dtsi | 57 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 60 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set 72 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 75 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set 87 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 90 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set 102 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 105 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set 120 cache-sets = <512>; // 512KiB(size)/64(line-size)=8192ways/16-way set
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D | bcm2836.dtsi | 58 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 61 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set 72 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 75 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set 86 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 89 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set 100 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 103 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set 118 cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set
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/linux-6.14.4/Documentation/networking/ |
D | smc-sysctl.rst | 48 The minimum value is 16KiB and there is no hard limit for max value, but 49 only allowed 512KiB for SMC-R and 1MiB for SMC-D. 51 Default: 64KiB 56 The minimum value is 16KiB and there is no hard limit for max value, but 57 only allowed 512KiB for SMC-R and 1MiB for SMC-D. 59 Default: 64KiB
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/linux-6.14.4/Documentation/arch/arm/ |
D | tcm.rst | 8 This is usually just a few (4-64) KiB of RAM inside the ARM 15 The size of DTCM or ITCM is minimum 4KiB so the typical 16 minimum configuration is 4KiB ITCM and 4KiB DTCM. 42 on, supporting a maximum of 32KiB of ITCM and 32KiB of DTCM. 45 TCMs in two separate banks, so for example an 8KiB ITCM is divided 46 into two 4KiB banks with its own control registers. The idea is to
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/linux-6.14.4/Documentation/admin-guide/device-mapper/ |
D | dm-ebs.rst | 36 2^N supported, e.g. 8 = emulate 8 sectors of 512 bytes = 4KiB. 47 Emulate 2 sector = 1KiB logical block size on /dev/sda starting at 48 offset 128 sectors, enforce 2KiB underlying device block size. 49 This presumes 2KiB logical blocksize on /dev/sda or less to work:
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/linux-6.14.4/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_fdinfo.c | 99 drm_printf(p, "drm-memory-vram:\t%llu KiB\n", in amdgpu_show_fdinfo() 101 drm_printf(p, "drm-memory-gtt: \t%llu KiB\n", in amdgpu_show_fdinfo() 103 drm_printf(p, "drm-memory-cpu: \t%llu KiB\n", in amdgpu_show_fdinfo() 107 drm_printf(p, "amd-evicted-vram:\t%llu KiB\n", in amdgpu_show_fdinfo() 109 drm_printf(p, "amd-requested-vram:\t%llu KiB\n", in amdgpu_show_fdinfo() 112 drm_printf(p, "amd-requested-gtt:\t%llu KiB\n", in amdgpu_show_fdinfo()
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/linux-6.14.4/drivers/mtd/spi-nor/ |
D | Kconfig | 19 to erasing whole blocks (32/64 KiB). 22 64 KiB block instead of 16 × 4 KiB sectors. 25 4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum).
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/linux-6.14.4/arch/arm64/boot/dts/broadcom/ |
D | bcm2712.dtsi | 61 d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set 64 i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set 71 cache-sets = <1024>; //512KiB(size)/64(line-size)=8192ways/8-way set 85 d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set 88 i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set 95 cache-sets = <1024>; //512KiB(size)/64(line-size)=8192ways/8-way set 109 d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set 112 i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set 119 cache-sets = <1024>; //512KiB(size)/64(line-size)=8192ways/8-way set 133 d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set [all …]
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/linux-6.14.4/Documentation/gpu/ |
D | drm-usage-stats.rst | 157 Default unit shall be bytes with optional unit specifiers of 'KiB' or 'MiB' 160 - drm-total-<region>: <uint> [KiB|MiB] 168 - drm-shared-<region>: <uint> [KiB|MiB] 174 - drm-resident-<region>: <uint> [KiB|MiB] 179 - drm-memory-<region>: <uint> [KiB|MiB] 184 - drm-purgeable-<region>: <uint> [KiB|MiB] 192 - drm-active-<region>: <uint> [KiB|MiB]
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D | panthor.rst | 29 drm-total-memory: 16480 KiB 31 drm-active-memory: 16200 KiB 32 drm-resident-memory: 16480 KiB
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/linux-6.14.4/arch/arm/boot/dts/nxp/lpc/ |
D | lpc4350.dtsi | 26 reg = <0x10000000 0x20000>; /* 96 + 32 KiB local SRAM */ 31 reg = <0x10080000 0x12000>; /* 64 + 8 KiB local SRAM */ 36 reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
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D | lpc4357.dtsi | 26 reg = <0x10000000 0x8000>; /* 32 KiB local SRAM */ 31 reg = <0x10080000 0xa000>; /* 32 + 8 KiB local SRAM */ 36 reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
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/linux-6.14.4/Documentation/ABI/stable/ |
D | sysfs-devices-system-xen_memory | 54 As target above, except the value is in KiB. 61 Current size (in KiB) of this domain's memory 69 Amount (in KiB) of high memory in the balloon. 76 Amount (in KiB) of low (or normal) memory in the
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/linux-6.14.4/tools/perf/arch/x86/util/ |
D | intel-bts.c | 28 #define KiB(x) ((x) * 1024) macro 30 #define KiB_MASK(x) (KiB(x) - 1) 157 opts->auxtrace_mmap_pages = KiB(128) / page_size; in intel_bts_recording_options() 159 opts->mmap_pages = KiB(256) / page_size; in intel_bts_recording_options() 163 opts->mmap_pages = KiB(256) / page_size; in intel_bts_recording_options() 194 opts->auxtrace_mmap_pages = KiB(128) / page_size; in intel_bts_recording_options() 196 opts->mmap_pages = KiB(256) / page_size; in intel_bts_recording_options() 206 min_sz = KiB(4); in intel_bts_recording_options() 208 min_sz = KiB(8); in intel_bts_recording_options()
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/linux-6.14.4/drivers/gpu/drm/imagination/ |
D | pvr_mmu.h | 32 * device page sizes are: 4KiB, 16KiB, 64KiB, 256KiB, 1MiB and 2MiB.
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/linux-6.14.4/drivers/mtd/tests/ |
D | speedtest.c | 259 pr_info("eraseblock write speed is %ld KiB/s\n", speed); in mtd_speedtest_init() 277 pr_info("eraseblock read speed is %ld KiB/s\n", speed); in mtd_speedtest_init() 299 pr_info("page write speed is %ld KiB/s\n", speed); in mtd_speedtest_init() 317 pr_info("page read speed is %ld KiB/s\n", speed); in mtd_speedtest_init() 339 pr_info("2 page write speed is %ld KiB/s\n", speed); in mtd_speedtest_init() 357 pr_info("2 page read speed is %ld KiB/s\n", speed); in mtd_speedtest_init() 367 pr_info("erase speed is %ld KiB/s\n", speed); in mtd_speedtest_init() 395 pr_info("%dx multi-block erase speed is %ld KiB/s\n", in mtd_speedtest_init()
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/linux-6.14.4/arch/arm/boot/dts/marvell/ |
D | armada-385-linksys-rango.dts | 97 reg = <0x200000 0x20000>; /* 128KiB */ 102 reg = <0x220000 0x40000>; /* 256KiB */ 107 reg = <0x7e0000 0x40000>; /* 256KiB */ 113 reg = <0x820000 0x1e0000>; /* 1920KiB */
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/linux-6.14.4/tools/perf/arch/arm64/util/ |
D | arm-spe.c | 32 #define KiB(x) ((x) * 1024) macro 176 * snapshot size is specified, then the default is 4MiB for privileged users, 128KiB for in arm_spe_snapshot_resolve_auxtrace_defaults() 179 * The default auxtrace mmap size is 4MiB/page_size for privileged users, 128KiB for in arm_spe_snapshot_resolve_auxtrace_defaults() 181 * will be reduced from the default 512KiB/page_size to 256KiB/page_size, otherwise the in arm_spe_snapshot_resolve_auxtrace_defaults() 192 opts->auxtrace_mmap_pages = KiB(128) / page_size; in arm_spe_snapshot_resolve_auxtrace_defaults() 194 opts->mmap_pages = KiB(256) / page_size; in arm_spe_snapshot_resolve_auxtrace_defaults() 197 opts->mmap_pages = KiB(256) / page_size; in arm_spe_snapshot_resolve_auxtrace_defaults() 319 opts->auxtrace_mmap_pages = KiB(128) / page_size; in arm_spe_setup_aux_buffer() 321 opts->mmap_pages = KiB(256) / page_size; in arm_spe_setup_aux_buffer() 328 size_t min_sz = KiB(8); in arm_spe_setup_aux_buffer()
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D | hisi-ptt.c | 27 #define KiB(x) ((x) * 1024) macro 75 opts->auxtrace_mmap_pages = KiB(128) / page_size; in hisi_ptt_set_auxtrace_mmap_page() 77 opts->mmap_pages = KiB(256) / page_size; in hisi_ptt_set_auxtrace_mmap_page() 84 size_t min_sz = KiB(8); in hisi_ptt_set_auxtrace_mmap_page()
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/linux-6.14.4/drivers/mtd/nand/onenand/ |
D | Kconfig | 63 of 4KiB. Plane1 has only even blocks such as block0, block2, block4 65 So MTD regards it as 4KiB page size and 256KiB block size
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/linux-6.14.4/arch/ |
D | Kconfig | 1215 bool "4KiB pages" 1218 This option select the standard 4KiB Linux page size and the only 1219 available option on many architectures. Using 4KiB page size will 1223 assumptions about the page size and only runs on 4KiB pages. 1226 bool "8KiB pages" 1230 processors, and can be slightly faster than 4KiB pages. 1233 bool "16KiB pages" 1244 bool "32KiB pages" 1247 Using 32KiB page size will result in slightly higher performance 1249 16KiB pages. This option is available only on cnMIPS cores. [all …]
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