Home
last modified time | relevance | path

Searched full:ios (Results 1 – 25 of 300) sorted by relevance

12345678910>>...12

/linux-6.14.4/drivers/mmc/core/
Ddebugfs.c59 struct mmc_ios *ios = &host->ios; in mmc_ios_show() local
62 seq_printf(s, "clock:\t\t%u Hz\n", ios->clock); in mmc_ios_show()
65 seq_printf(s, "vdd:\t\t%u ", ios->vdd); in mmc_ios_show()
66 if ((1 << ios->vdd) & MMC_VDD_165_195) in mmc_ios_show()
68 else if (ios->vdd < (ARRAY_SIZE(vdd_str) - 1) in mmc_ios_show()
69 && vdd_str[ios->vdd] && vdd_str[ios->vdd + 1]) in mmc_ios_show()
70 seq_printf(s, "(%s ~ %s V)\n", vdd_str[ios->vdd], in mmc_ios_show()
71 vdd_str[ios->vdd + 1]); in mmc_ios_show()
75 switch (ios->bus_mode) { in mmc_ios_show()
86 seq_printf(s, "bus mode:\t%u (%s)\n", ios->bus_mode, str); in mmc_ios_show()
[all …]
Dhost.h68 return card->host->ios.timing == MMC_TIMING_MMC_HS200; in mmc_card_hs200()
73 return card->host->ios.timing == MMC_TIMING_MMC_DDR52; in mmc_card_ddr52()
78 return card->host->ios.timing == MMC_TIMING_MMC_HS400; in mmc_card_hs400()
83 return card->host->ios.enhanced_strobe; in mmc_card_hs400es()
88 return host->ios.timing == MMC_TIMING_SD_EXP || in mmc_card_sd_express()
89 host->ios.timing == MMC_TIMING_SD_EXP_1_2V; in mmc_card_sd_express()
Dregulator.c95 * mmc_regulator_set_ocr - set regulator to match host->ios voltage
98 * @vdd_bit: zero for power off, else a bit number (host->ios.vdd)
164 * mmc_regulator_set_vqmmc - Set VQMMC as per the ios
166 * @ios: io bus settings
182 int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios) in mmc_regulator_set_vqmmc() argument
191 switch (ios->signal_voltage) { in mmc_regulator_set_vqmmc()
199 ret = mmc_ocrbitnum_to_vdd(mmc->ios.vdd, &volt, &max_uV); in mmc_regulator_set_vqmmc()
230 * mmc_regulator_set_vqmmc2 - Set vqmmc2 as per the ios->vqmmc2_voltage
232 * @ios: The io bus settings
241 int mmc_regulator_set_vqmmc2(struct mmc_host *mmc, struct mmc_ios *ios) in mmc_regulator_set_vqmmc2() argument
[all …]
Dcore.c694 if (card->host->ios.clock) in mmc_set_data_timeout()
696 (card->host->ios.clock / 1000); in mmc_set_data_timeout()
891 * Internal function that does the actual ios call to the host driver,
896 struct mmc_ios *ios = &host->ios; in mmc_set_ios() local
900 mmc_hostname(host), ios->clock, ios->bus_mode, in mmc_set_ios()
901 ios->power_mode, ios->chip_select, ios->vdd, in mmc_set_ios()
902 1 << ios->bus_width, ios->timing); in mmc_set_ios()
904 host->ops->set_ios(host, ios); in mmc_set_ios()
912 host->ios.chip_select = mode; in mmc_set_chip_select()
927 host->ios.clock = hz; in mmc_set_clock()
[all …]
/linux-6.14.4/drivers/mmc/host/
Ddw_mmc-k3.c102 static void dw_mci_k3_set_ios(struct dw_mci *host, struct mmc_ios *ios) in dw_mci_k3_set_ios() argument
106 ret = clk_set_rate(host->ciu_clk, ios->clock); in dw_mci_k3_set_ios()
108 dev_warn(host->dev, "failed to set rate %uHz\n", ios->clock); in dw_mci_k3_set_ios()
141 static int dw_mci_hi6220_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios) in dw_mci_hi6220_switch_voltage() argument
155 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) { in dw_mci_hi6220_switch_voltage()
160 } else if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180) { in dw_mci_hi6220_switch_voltage()
188 static void dw_mci_hi6220_set_ios(struct dw_mci *host, struct mmc_ios *ios) in dw_mci_hi6220_set_ios() argument
193 clock = (ios->clock <= 25000000) ? 25000000 : ios->clock; in dw_mci_hi6220_set_ios()
297 static void dw_mci_hi3660_set_ios(struct dw_mci *host, struct mmc_ios *ios) in dw_mci_hi3660_set_ios() argument
304 if (!ios->clock || ios->clock == priv->cur_speed) in dw_mci_hi3660_set_ios()
[all …]
Ddw_mmc-starfive.c26 static void dw_mci_starfive_set_ios(struct dw_mci *host, struct mmc_ios *ios) in dw_mci_starfive_set_ios() argument
31 if (ios->timing == MMC_TIMING_MMC_DDR52 || ios->timing == MMC_TIMING_UHS_DDR50) { in dw_mci_starfive_set_ios()
32 clock = (ios->clock > 50000000 && ios->clock <= 52000000) ? 100000000 : ios->clock; in dw_mci_starfive_set_ios()
35 dev_dbg(host->dev, "Use an external frequency divider %uHz\n", ios->clock); in dw_mci_starfive_set_ios()
Ddw_mmc-hi3798cv200.c26 static void dw_mci_hi3798cv200_set_ios(struct dw_mci *host, struct mmc_ios *ios) in dw_mci_hi3798cv200_set_ios() argument
32 if (ios->timing == MMC_TIMING_MMC_DDR52 || in dw_mci_hi3798cv200_set_ios()
33 ios->timing == MMC_TIMING_UHS_DDR50) in dw_mci_hi3798cv200_set_ios()
40 if (ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_hi3798cv200_set_ios()
47 if (ios->timing == MMC_TIMING_MMC_HS400) in dw_mci_hi3798cv200_set_ios()
53 if (ios->timing == MMC_TIMING_MMC_HS || in dw_mci_hi3798cv200_set_ios()
54 ios->timing == MMC_TIMING_LEGACY) in dw_mci_hi3798cv200_set_ios()
56 else if (ios->timing == MMC_TIMING_MMC_HS200) in dw_mci_hi3798cv200_set_ios()
Ddw_mmc-hi3798mv200.c36 static void dw_mci_hi3798mv200_set_ios(struct dw_mci *host, struct mmc_ios *ios) in dw_mci_hi3798mv200_set_ios() argument
39 struct mmc_clk_phase phase = priv->phase_map.phase[ios->timing]; in dw_mci_hi3798mv200_set_ios()
43 if (ios->timing == MMC_TIMING_MMC_DDR52 in dw_mci_hi3798mv200_set_ios()
44 || ios->timing == MMC_TIMING_UHS_DDR50) in dw_mci_hi3798mv200_set_ios()
51 if (ios->timing == MMC_TIMING_MMC_HS400) in dw_mci_hi3798mv200_set_ios()
57 if (clk_set_rate(host->ciu_clk, ios->clock)) in dw_mci_hi3798mv200_set_ios()
58 dev_warn(host->dev, "Failed to set rate to %u\n", ios->clock); in dw_mci_hi3798mv200_set_ios()
73 ios->timing); in dw_mci_hi3798mv200_set_ios()
Dsdhci-uhs2.c144 mmc_regulator_set_vqmmc2(mmc, &mmc->ios); in sdhci_uhs2_set_power()
148 mmc_regulator_set_vqmmc2(mmc, &mmc->ios); in sdhci_uhs2_set_power()
256 static void __sdhci_uhs2_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in __sdhci_uhs2_set_ios() argument
279 if (ios->power_mode != MMC_POWER_OFF && in __sdhci_uhs2_set_ios()
280 (ios->timing == MMC_TIMING_UHS2_SPEED_A || in __sdhci_uhs2_set_ios()
281 ios->timing == MMC_TIMING_UHS2_SPEED_A_HD || in __sdhci_uhs2_set_ios()
282 ios->timing == MMC_TIMING_UHS2_SPEED_B || in __sdhci_uhs2_set_ios()
283 ios->timing == MMC_TIMING_UHS2_SPEED_B_HD)) in __sdhci_uhs2_set_ios()
288 host->timing = ios->timing; in __sdhci_uhs2_set_ios()
294 host->ops->set_power(host, ios->power_mode, ios->vdd); in __sdhci_uhs2_set_ios()
[all …]
Dmmci_stm32_sdmmc.c302 if (host->mmc->ios.timing == MMC_TIMING_MMC_DDR52 || in mmci_sdmmc_set_clkreg()
303 host->mmc->ios.timing == MMC_TIMING_UHS_DDR50) in mmci_sdmmc_set_clkreg()
331 if (host->mmc->ios.power_mode == MMC_POWER_ON) in mmci_sdmmc_set_clkreg()
336 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) in mmci_sdmmc_set_clkreg()
338 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) in mmci_sdmmc_set_clkreg()
345 if (host->mmc->ios.timing >= MMC_TIMING_UHS_SDR50) in mmci_sdmmc_set_clkreg()
362 struct mmc_ios ios = host->mmc->ios; in mmci_sdmmc_set_pwrreg() local
371 if (ios.power_mode == MMC_POWER_OFF) { in mmci_sdmmc_set_pwrreg()
384 } else if (ios.power_mode == MMC_POWER_ON) { in mmci_sdmmc_set_pwrreg()
417 if (host->mmc->ios.timing == MMC_TIMING_UHS_SDR104 || in sdmmc_get_dctrl_cfg()
[all …]
Dalcor.c692 static void alcor_set_timing(struct mmc_host *mmc, struct mmc_ios *ios) in alcor_set_timing() argument
696 if (ios->timing == MMC_TIMING_LEGACY) { in alcor_set_timing()
705 static void alcor_set_bus_width(struct mmc_host *mmc, struct mmc_ios *ios) in alcor_set_bus_width() argument
710 if (ios->bus_width == MMC_BUS_WIDTH_1) { in alcor_set_bus_width()
712 } else if (ios->bus_width == MMC_BUS_WIDTH_4) { in alcor_set_bus_width()
845 static void alcor_set_power_mode(struct mmc_host *mmc, struct mmc_ios *ios) in alcor_set_power_mode() argument
850 switch (ios->power_mode) { in alcor_set_power_mode()
852 alcor_set_clock(host, ios->clock); in alcor_set_power_mode()
880 alcor_set_clock(host, ios->clock); in alcor_set_power_mode()
887 alcor_set_clock(host, ios->clock); in alcor_set_power_mode()
[all …]
Dsdhci-pci-arasan.c250 if (arasan_host->chg_clk == host->mmc->ios.clock) in arasan_select_phy_clock()
253 arasan_host->chg_clk = host->mmc->ios.clock; in arasan_select_phy_clock()
254 if (host->mmc->ios.clock == 200000000) in arasan_select_phy_clock()
256 else if (host->mmc->ios.clock == 100000000) in arasan_select_phy_clock()
258 else if (host->mmc->ios.clock == 50000000) in arasan_select_phy_clock()
267 switch (host->mmc->ios.timing) { in arasan_select_phy_clock()
280 host->mmc->ios.drv_type, 0x0, in arasan_select_phy_clock()
290 host->mmc->ios.drv_type, 0xa, in arasan_select_phy_clock()
Dowl-mmc.c427 static void owl_mmc_set_clk(struct owl_mmc_host *owl_host, struct mmc_ios *ios) in owl_mmc_set_clk() argument
429 if (!ios->clock) in owl_mmc_set_clk()
432 owl_host->clock = ios->clock; in owl_mmc_set_clk()
433 owl_mmc_set_clk_rate(owl_host, ios->clock); in owl_mmc_set_clk()
437 struct mmc_ios *ios) in owl_mmc_set_bus_width() argument
443 switch (ios->bus_width) { in owl_mmc_set_bus_width()
485 static void owl_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in owl_mmc_set_ios() argument
489 switch (ios->power_mode) { in owl_mmc_set_ios()
518 if (ios->clock != owl_host->clock) in owl_mmc_set_ios()
519 owl_mmc_set_clk(owl_host, ios); in owl_mmc_set_ios()
[all …]
Dsunxi-mmc.c723 struct mmc_ios *ios, u32 rate) in sunxi_mmc_clk_set_phase() argument
741 if (ios->timing != MMC_TIMING_UHS_DDR50 && in sunxi_mmc_clk_set_phase()
742 ios->timing != MMC_TIMING_MMC_DDR52) { in sunxi_mmc_clk_set_phase()
744 } else if (ios->bus_width == MMC_BUS_WIDTH_8) { in sunxi_mmc_clk_set_phase()
761 struct mmc_ios *ios) in sunxi_mmc_clk_set_rate() argument
765 u32 rval, clock = ios->clock, div = 1; in sunxi_mmc_clk_set_rate()
775 if (!ios->clock) in sunxi_mmc_clk_set_rate()
787 if (ios->timing == MMC_TIMING_MMC_DDR52 && in sunxi_mmc_clk_set_rate()
789 ios->bus_width == MMC_BUS_WIDTH_8)) { in sunxi_mmc_clk_set_rate()
843 ret = sunxi_mmc_clk_set_phase(host, ios, rate); in sunxi_mmc_clk_set_rate()
[all …]
Ddw_mmc-rockchip.c174 static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) in dw_mci_rk3288_set_ios() argument
181 if (ios->clock == 0) in dw_mci_rk3288_set_ios()
188 * ios->clock = (div == 0) ? bus_hz : (bus_hz / (2 * div)) in dw_mci_rk3288_set_ios()
193 if (ios->bus_width == MMC_BUS_WIDTH_8 && in dw_mci_rk3288_set_ios()
194 ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_rk3288_set_ios()
195 cclkin = 2 * ios->clock * RK3288_CLKGEN_DIV; in dw_mci_rk3288_set_ios()
197 cclkin = ios->clock * RK3288_CLKGEN_DIV; in dw_mci_rk3288_set_ios()
211 if (!IS_ERR(priv->sample_clk) && ios->timing <= MMC_TIMING_SD_HS) in dw_mci_rk3288_set_ios()
251 switch (ios->timing) { in dw_mci_rk3288_set_ios()
258 if (ios->bus_width == MMC_BUS_WIDTH_8) in dw_mci_rk3288_set_ios()
Dsdhci-msm.c348 struct mmc_ios ios = host->mmc->ios; in msm_get_clock_mult_for_bus_mode() local
355 if (ios.timing == MMC_TIMING_UHS_DDR50 || in msm_get_clock_mult_for_bus_mode()
356 ios.timing == MMC_TIMING_MMC_DDR52 || in msm_get_clock_mult_for_bus_mode()
357 ios.timing == MMC_TIMING_MMC_HS400 || in msm_get_clock_mult_for_bus_mode()
368 struct mmc_ios curr_ios = host->mmc->ios; in msm_set_clock_rate_for_bus_mode()
832 struct mmc_ios ios = host->mmc->ios; in msm_hc_select_hs400() local
848 if ((msm_host->tuning_done || ios.enhanced_strobe) && in msm_hc_select_hs400()
901 struct mmc_ios ios = host->mmc->ios; in sdhci_msm_hc_select_mode() local
903 if (ios.timing == MMC_TIMING_MMC_HS400 || in sdhci_msm_hc_select_mode()
1038 if (mmc->ios.enhanced_strobe) { in sdhci_msm_cm_dll_sdc4_calibration()
[all …]
Dsdhci-sprd.c376 if (!mmc->ios.enhanced_strobe) in sdhci_sprd_set_uhs_signaling()
494 static int sdhci_sprd_voltage_switch(struct mmc_host *mmc, struct mmc_ios *ios) in sdhci_sprd_voltage_switch() argument
501 ret = mmc_regulator_set_vqmmc(mmc, ios); in sdhci_sprd_voltage_switch()
512 switch (ios->signal_voltage) { in sdhci_sprd_voltage_switch()
546 struct mmc_ios *ios) in sdhci_sprd_hs400_enhanced_strobe() argument
553 if (!ios->enhanced_strobe) in sdhci_sprd_hs400_enhanced_strobe()
649 dll_dly = p[mmc->ios.timing]; in sdhci_sprd_tuning()
676 p[mmc->ios.timing] &= ~SDHCI_SPRD_CMD_DLY_MASK; in sdhci_sprd_tuning()
677 p[mmc->ios.timing] |= ((best_clk_sample << 8) & SDHCI_SPRD_CMD_DLY_MASK); in sdhci_sprd_tuning()
679 p[mmc->ios.timing] &= ~(SDHCI_SPRD_POSRD_DLY_MASK); in sdhci_sprd_tuning()
[all …]
Dsdhci-xenon.h84 * record the current ios setting of Xenon SDHC.
86 * ios affects PHY timing.
104 int xenon_phy_adj(struct sdhci_host *host, struct mmc_ios *ios);
Domap_hsmmc.c220 struct mmc_ios *ios = &mmc->ios; in omap_hsmmc_enable_supply() local
223 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd); in omap_hsmmc_enable_supply()
520 static u16 calc_divisor(struct omap_hsmmc_host *host, struct mmc_ios *ios) in calc_divisor() argument
524 if (ios->clock) { in calc_divisor()
525 dsor = DIV_ROUND_UP(clk_get_rate(host->fclk), ios->clock); in calc_divisor()
535 struct mmc_ios *ios = &host->mmc->ios; in omap_hsmmc_set_clock() local
540 dev_vdbg(mmc_dev(host->mmc), "Set clock to %uHz\n", ios->clock); in omap_hsmmc_set_clock()
546 clkdiv = calc_divisor(host, ios); in omap_hsmmc_set_clock()
568 (ios->timing != MMC_TIMING_MMC_DDR52) && in omap_hsmmc_set_clock()
569 (ios->timing != MMC_TIMING_UHS_DDR50) && in omap_hsmmc_set_clock()
[all …]
/linux-6.14.4/drivers/scsi/elx/efct/
Defct_xport.h133 /* list of IOs waiting for HW resources
138 /* count of totals IOS allocated */
140 /* count of totals IOS free'd */
142 /* count of totals IOS that were pended */
144 /* count of active IOS */
146 /* count of pending IOS */
/linux-6.14.4/include/linux/mmc/
Dhost.h187 * ios->clock might be 0. For some controllers, setting 0Hz
192 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
219 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
228 int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
250 struct mmc_ios *ios);
266 int (*init_sd_express)(struct mmc_host *host, struct mmc_ios *ios);
483 struct mmc_ios ios; /* current io bus settings */ member
636 int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
637 int mmc_regulator_set_vqmmc2(struct mmc_host *mmc, struct mmc_ios *ios);
647 struct mmc_ios *ios) in mmc_regulator_set_vqmmc() argument
[all …]
/linux-6.14.4/Documentation/admin-guide/cgroup-v1/
Dblkio-controller.rst70 to the whole subtree while all statistics are local to the IOs
158 Number of IOs (bio) issued to the disk by the group. These
162 specifies the number of IOs.
166 for the IOs done by this cgroup. This is in nanoseconds to make it
171 of multiple IOs when served out of order which may result in total
179 Total amount of time the IOs for this cgroup spent waiting in the
181 elapsed since it is cumulative io_wait_time for all IOs. It is not a
183 the wait_time for its individual IOs. For devices with queue_depth > 1
284 Number of IOs (bio) issued to the disk by the group. These
288 specifies the number of IOs.
/linux-6.14.4/drivers/scsi/snic/
Dsnic_debugfs.c129 /* Skip variable is used to avoid descrepancies to Num IOs in snic_reset_stats_write()
131 * for pending active IOs after reset_stats in snic_reset_stats_write()
181 "Active IOs : %lld\n" in snic_stats_show()
182 "Max Active IOs : %lld\n" in snic_stats_show()
183 "Total IOs : %lld\n" in snic_stats_show()
184 "IOs Completed : %lld\n" in snic_stats_show()
185 "IOs Failed : %lld\n" in snic_stats_show()
186 "IOs Not Found : %lld\n" in snic_stats_show()
292 "IOs w/ Timeout Status : %lld\n" in snic_stats_show()
293 "IOs w/ Aborted Status : %lld\n" in snic_stats_show()
[all …]
/linux-6.14.4/drivers/net/wireless/rsi/
Drsi_91x_sdio.c186 host->ios.chip_select = MMC_CS_DONTCARE; in rsi_reset_card()
187 host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN; in rsi_reset_card()
188 host->ios.power_mode = MMC_POWER_UP; in rsi_reset_card()
189 host->ios.bus_width = MMC_BUS_WIDTH_1; in rsi_reset_card()
190 host->ios.timing = MMC_TIMING_LEGACY; in rsi_reset_card()
191 host->ops->set_ios(host, &host->ios); in rsi_reset_card()
199 host->ios.clock = host->f_min; in rsi_reset_card()
200 host->ios.power_mode = MMC_POWER_ON; in rsi_reset_card()
201 host->ops->set_ios(host, &host->ios); in rsi_reset_card()
210 host->ios.chip_select = MMC_CS_HIGH; in rsi_reset_card()
[all …]
/linux-6.14.4/drivers/staging/greybus/
Dsdio.c588 static void gb_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in gb_mmc_set_ios() argument
601 request.clock = cpu_to_le32(ios->clock); in gb_mmc_set_ios()
603 if (ios->vdd) in gb_mmc_set_ios()
604 vdd = 1 << (ios->vdd - GB_SDIO_VDD_SHIFT); in gb_mmc_set_ios()
607 request.bus_mode = ios->bus_mode == MMC_BUSMODE_OPENDRAIN ? in gb_mmc_set_ios()
611 switch (ios->power_mode) { in gb_mmc_set_ios()
628 switch (ios->bus_width) { in gb_mmc_set_ios()
642 switch (ios->timing) { in gb_mmc_set_ios()
680 switch (ios->signal_voltage) { in gb_mmc_set_ios()
694 switch (ios->drv_type) { in gb_mmc_set_ios()
[all …]

12345678910>>...12