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/linux-6.14.4/drivers/mmc/host/
Dsdhci-pci-o2micro.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/mmc/host.h>
18 #include "sdhci-pci.h"
84 static void sdhci_o2_wait_card_detect_stable(struct sdhci_host *host) in sdhci_o2_wait_card_detect_stable() argument
94 scratch32 = sdhci_readl(host, SDHCI_PRESENT_STATE); in sdhci_o2_wait_card_detect_stable()
101 mmc_hostname(host->mmc)); in sdhci_o2_wait_card_detect_stable()
102 sdhci_dumpregs(host); in sdhci_o2_wait_card_detect_stable()
109 static void sdhci_o2_enable_internal_clock(struct sdhci_host *host) in sdhci_o2_enable_internal_clock() argument
116 scratch32 = sdhci_readl(host, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock()
118 sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock()
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Dsdhci-pci-core.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
4 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
6 * Thanks to the following companies for their support:
8 * - JMicron (hardware and technical support)
17 #include <linux/dma-mapping.h>
31 #include <linux/mmc/host.h>
33 #include <linux/mmc/slot-gpio.h>
42 #include "sdhci-cqhci.h"
43 #include "sdhci-pci.h"
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Dsdhci-pci-gli.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Version: v0.9.0 (2019-08-08)
18 #include "sdhci-cqhci.h"
19 #include "sdhci-pci.h"
21 #include "sdhci-uhs2.h"
290 static inline void gl9750_wt_on(struct sdhci_host *host) in gl9750_wt_on() argument
295 wt_value = sdhci_readl(host, SDHCI_GLI_9750_WT); in gl9750_wt_on()
304 sdhci_writel(host, wt_value, SDHCI_GLI_9750_WT); in gl9750_wt_on()
307 static inline void gl9750_wt_off(struct sdhci_host *host) in gl9750_wt_off() argument
312 wt_value = sdhci_readl(host, SDHCI_GLI_9750_WT); in gl9750_wt_off()
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Dwbsd.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/drivers/mmc/host/wbsd.c - Winbond W83L51xD SD/MMC driver
5 * Copyright (C) 2004-2007 Pierre Ossman, All Rights Reserved.
9 * Changes to the FIFO system should be done with extreme care since
10 * the hardware is full of bugs related to the FIFO. Known issues are:
12 * - FIFO size field in FSR is always zero.
14 * - FIFO interrupts tend not to work as they should. Interrupts are
17 * - On APIC systems the FIFO empty interrupt is sometimes lost.
26 #include <linux/dma-mapping.h>
30 #include <linux/mmc/host.h>
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # MMC/SD host controller drivers
6 comment "MMC/SD/SDIO Host Controller Drivers"
9 bool "MMC host drivers debugging"
13 say N here. This enables MMC host driver debugging. And further
14 added host drivers please don't invent their private macro for
21 If you say yes here, you will get support for eMMC host interface
42 This option will enable the dma to work correctly, if you are using
43 Qcom SOCs and MMC, you would probably need this option to get DMA working.
52 This selects the STMicroelectronics STM32 SDMMC host controller.
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Dsdhci-acpi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Secure Digital Host Controller Interface ACPI driver.
13 #include <linux/pinctrl/pinconf-generic.h>
17 #include <linux/dma-mapping.h>
30 #include <linux/mmc/host.h>
32 #include <linux/mmc/slot-gpio.h>
57 const struct sdhci_acpi_chip *chip; member
72 struct sdhci_host *host; member
90 return (void *)c->private; in sdhci_acpi_priv()
95 return c->slot && (c->slot->flags & flag); in sdhci_acpi_flag()
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/linux-6.14.4/drivers/mtd/nand/raw/
Dlpc32xx_slc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
24 #include <linux/dma-mapping.h>
30 #define LPC32XX_MODNAME "lpc32xx-nand"
86 #define SLCTAC_CLOCKS(c, n, s) (min_t(u32, DIV_ROUND_UP(c, n) - 1, 0xF) << s)
90 /* Write pulse width in clock cycles, 1 to 16 clocks */
92 /* Write hold time of control and data signals, 1 to 16 clocks */
94 /* Write setup time of control and data signals, 1 to 16 clocks */
98 /* Read pulse width in clock cycles, 1 to 16 clocks */
100 /* Read hold time of control and data signals, 1 to 16 clocks */
102 /* Read setup time of control and data signals, 1 to 16 clocks */
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Dmxc_nand.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
28 #define NFC_V1_V2_BUF_SIZE (host->regs + 0x00)
29 #define NFC_V1_V2_BUF_ADDR (host->regs + 0x04)
30 #define NFC_V1_V2_FLASH_ADDR (host->regs + 0x06)
31 #define NFC_V1_V2_FLASH_CMD (host->regs + 0x08)
32 #define NFC_V1_V2_CONFIG (host->regs + 0x0a)
33 #define NFC_V1_V2_ECC_STATUS_RESULT (host->regs + 0x0c)
34 #define NFC_V1_V2_RSLTMAIN_AREA (host->regs + 0x0e)
35 #define NFC_V21_RSLTSPARE_AREA (host->regs + 0x10)
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Dqcom_nandc.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
18 #include <linux/mtd/nand-qpic-common.h>
57 * NAND chip structure
62 * @chip: base NAND chip structure
63 * @node: list node to add itself to host_list in
69 * @cs: chip select value for this chip
76 * chip
78 * @last_command: keeps track of last command on this chip. used
82 * ecc/non-ecc mode for the current nand flash
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Dfsmc_nand.c1 // SPDX-License-Identifier: GPL-2.0
20 #include <linux/dma-direction.h>
21 #include <linux/dma-mapping.h>
29 #include <linux/mtd/nand-ecc-sw-hamming.h>
37 #include <mtd/mtd-abi.h>
98 * According to SPEAr300 Reference Manual (RM0082)
99 * TOUDEL = 7ns (Output delay from the flip-flops to the board)
100 * TINDEL = 5ns (Input delay from the board to the flipflop)
120 * struct fsmc_nand_data - structure for FSMC NAND device state
124 * @nand: Chip related info for a NAND flash.
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Dlpc32xx_mlc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 * - Read: Auto Decode
12 * - Write: Auto Encode
13 * - Tested Page Sizes: 2048, 4096
32 #include <linux/dma-mapping.h>
134 if (section >= nand_chip->ecc.steps) in lpc32xx_ooblayout_ecc()
135 return -ERANGE; in lpc32xx_ooblayout_ecc()
137 oobregion->offset = ((section + 1) * 16) - nand_chip->ecc.bytes; in lpc32xx_ooblayout_ecc()
138 oobregion->length = nand_chip->ecc.bytes; in lpc32xx_ooblayout_ecc()
148 if (section >= nand_chip->ecc.steps) in lpc32xx_ooblayout_free()
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Dsocrates_nand.c1 // SPDX-License-Identifier: GPL-2.0-only
33 * socrates_nand_write_buf - write buffer to chip
34 * @this: NAND chip object
36 * @len: number of bytes to write
42 struct socrates_nand_host *host = nand_get_controller_data(this); in socrates_nand_write_buf() local
45 out_be32(host->io_base, FPGA_NAND_ENABLE | in socrates_nand_write_buf()
52 * socrates_nand_read_buf - read chip data into buffer
53 * @this: NAND chip object
54 * @buf: buffer to store date
55 * @len: number of bytes to read
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Dhisi504_nand.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright © 2012-2014 HiSilicon Technologies Co., Ltd.
21 #include <linux/dma-mapping.h>
126 struct nand_chip chip; member
144 static inline unsigned int hinfc_read(struct hinfc_host *host, unsigned int reg) in hinfc_read() argument
146 return readl(host->iobase + reg); in hinfc_read()
149 static inline void hinfc_write(struct hinfc_host *host, unsigned int value, in hinfc_write() argument
152 writel(value, host->iobase + reg); in hinfc_write()
155 static void wait_controller_finished(struct hinfc_host *host) in wait_controller_finished() argument
161 val = hinfc_read(host, HINFC504_STATUS); in wait_controller_finished()
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/linux-6.14.4/drivers/usb/host/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 # USB Host Controller Drivers
5 comment "USB Host Controller Drivers"
11 The Cypress C67x00 (EZ-Host/EZ-OTG) chips are dual-role
12 host/peripheral/OTG USB controllers.
14 Enable this option to support this chip in host controller mode.
17 To compile this driver as a module, choose M here: the
24 The eXtensible Host Controller Interface (xHCI) is standard for USB 3.0
25 "SuperSpeed" host controller hardware.
27 To compile this driver as a module, choose M here: the
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/linux-6.14.4/drivers/spi/
Dspi-hisi-kunpeng.c1 // SPDX-License-Identifier: GPL-2.0-only
8 // This code is based on spi-dw-core.c.
120 u8 div_post; /* value from 0 to 255 */
121 u8 div_pre; /* value from 2 to 254 (even only!) */
165 struct spi_controller *host; in hisi_spi_debugfs_init() local
167 host = container_of(hs->dev, struct spi_controller, dev); in hisi_spi_debugfs_init()
168 snprintf(name, 32, "hisi_spi%d", host->bus_num); in hisi_spi_debugfs_init()
169 hs->debugfs = debugfs_create_dir(name, NULL); in hisi_spi_debugfs_init()
170 if (IS_ERR(hs->debugfs)) in hisi_spi_debugfs_init()
171 return -ENOMEM; in hisi_spi_debugfs_init()
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Dspi-dw-core.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/dma-mapping.h>
18 #include <linux/spi/spi-mem.h>
23 #include "spi-dw.h"
66 snprintf(name, 32, "dw_spi%d", dws->host->bus_num); in dw_spi_debugfs_init()
67 dws->debugfs = debugfs_create_dir(name, NULL); in dw_spi_debugfs_init()
69 dws->regset.regs = dw_spi_dbgfs_regs; in dw_spi_debugfs_init()
70 dws->regset.nregs = ARRAY_SIZE(dw_spi_dbgfs_regs); in dw_spi_debugfs_init()
71 dws->regset.base = dws->regs; in dw_spi_debugfs_init()
72 debugfs_create_regset32("registers", 0400, dws->debugfs, &dws->regset); in dw_spi_debugfs_init()
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Dspi-pl022.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2008-2012 ST-Ericsson AB
11 * linux-2.6.17-rc3-mm1/drivers/spi/pxa2xx_spi.c
12 * Initial adoption to PL022 by:
31 #include <linux/dma-mapping.h>
38 * This macro is used to define some register default values.
40 * val shifted sb steps to the left.
46 * This macro is also used to define some default values.
47 * It will just shift val by sb steps to the left and mask
63 * Macros to access SSP Registers with their offsets
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Dspi-orion.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2007-2008 Marvell Ltd.
28 /* Some SoCs using this driver support up to 8 chip selects.
29 * It is up to the implementer to only use the chip selects
73 * have both is for managing the armada-370-spi case with old
93 struct spi_controller *host; member
110 return orion_spi->base + reg; in spi_reg()
144 orion_spi = spi_controller_get_devdata(spi->controller); in orion_spi_baudrate_set()
145 devdata = orion_spi->devdata; in orion_spi_baudrate_set()
147 tclk_hz = clk_get_rate(orion_spi->clk); in orion_spi_baudrate_set()
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/linux-6.14.4/drivers/mtd/nand/raw/brcmnand/
Dbrcmnand.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2010-2015 Broadcom Corporation
17 #include <linux/dma-mapping.h>
36 * This flag controls if WP stays on between erase/write commands to mitigate
37 * flash corruption due to power glitches. Values:
237 /* List of NAND hosts (one for each chip-select) */
240 /* EDU info, per-transaction */
258 int (*dma_trans)(struct brcmnand_host *host, u64 addr, u32 *buf,
261 /* in-memory cache of the FLASH_CACHE, used only for some commands */
267 const u8 *cs_offsets; /* within each chip-select */
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/linux-6.14.4/sound/pci/
Dcs4281.c1 // SPDX-License-Identifier: GPL-2.0-or-later
29 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
53 #define BA0_HISR 0x0000 /* Host Interrupt Status Register */
60 #define BA0_HISR_GPPI (1<<5) /* General Purpose Input (Primary chip) */
61 #define BA0_HISR_GPSI (1<<4) /* General Purpose Input (Secondary chip) */
67 #define BA0_HICR 0x0008 /* Host Interrupt Control Register */
72 #define BA0_HIMR 0x000c /* Host Interrupt Mask Register */
77 #define BA0_HDSR0 0x00f0 /* Host DMA Engine 0 Status Register */
78 #define BA0_HDSR1 0x00f4 /* Host DMA Engine 1 Status Register */
79 #define BA0_HDSR2 0x00f8 /* Host DMA Engine 2 Status Register */
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/linux-6.14.4/drivers/ufs/host/
DKconfig1 # SPDX-License-Identifier: GPL-2.0+
3 # Kernel configuration file for the UFS host controller drivers.
5 # Copyright (C) 2011-2013 Samsung India Software Operations
15 This selects the PCI UFS Host Controller Interface. Select this if
16 you have UFS Host Controller with PCI Interface.
23 tristate "DesignWare pci support using a G210 Test Chip"
26 Synopsys Test Chip is a PHY for prototyping purposes.
34 This selects the UFS host controller support. Select this if
45 This selects the Cadence-specific additions to UFSHCD platform driver.
50 tristate "DesignWare platform support using a G210 Test Chip"
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/linux-6.14.4/Documentation/scsi/
D53c700.rst1 .. SPDX-License-Identifier: GPL-2.0
10 This driver supports the 53c700 and 53c700-66 chips. It also supports
12 does sync (-66 and 710 only), disconnects and tag command queueing.
14 Since the 53c700 must be interfaced to a bus, you need to wrapper the
18 The comments in the 53c700.[ch] files tell you which parts you need to
19 fill in to get the driver working.
33 Using the Chip Core Driver
36 In order to plumb the 53c700 chip core driver into a working SCSI
37 driver, you need to know three things about the way the chip is wired
44 Optionally, you may also need to know other things, like how to read
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/linux-6.14.4/drivers/scsi/
Dmvme16x_scsi.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Rewritten to use 53c700.c by Kars de Jong <jongk@linux-m68k.org>
25 MODULE_AUTHOR("Kars de Jong <jongk@linux-m68k.org>");
40 struct Scsi_Host * host = NULL; in mvme16x_probe() local
47 printk(KERN_INFO "mvme16x-scsi: detection disabled, " in mvme16x_probe()
48 "SCSI chip not present\n"); in mvme16x_probe()
54 printk(KERN_ERR "mvme16x-scsi: " in mvme16x_probe()
55 "Failed to allocate host data\n"); in mvme16x_probe()
60 hostdata->base = (void __iomem *)0xfff47000UL; in mvme16x_probe()
61 hostdata->clock = 50; /* XXX - depends on the CPU clock! */ in mvme16x_probe()
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/linux-6.14.4/include/linux/
Dti_wilink_st.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * To be included by the protocol stack drivers for
5 * Texas Instruments BT,FM and GPS combo chip drivers
6 * and also serves the sub-modules of the shared transport driver.
8 * Copyright (C) 2009-2010 Texas Instruments
18 * enum proto-type - The protocol on WiLink chips which share a
29 * struct st_proto_s - Per Protocol structure from BT/FM/GPS to ST
32 * @recv: the receiver callback pointing to a function in the
35 * @match_packet: reserved for future use, to make ST more generic
36 * @reg_complete_cb: callback handler pointing to a function in protocol
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/linux-6.14.4/drivers/ata/
Dsata_sx4.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sata_sx4.c - Promise SATA
6 * Please ALWAYS copy linux-[email protected]
9 * Copyright 2003-2004 Red Hat, Inc.
12 * as Documentation/driver-api/libata.rst
19 -------------------
21 The SX4 (PDC20621) chip features a single Host DMA (HDMA) copy
23 Data is copied to/from DIMM memory by the HDMA engine, before
24 handing off to one (or more) of the ATA engines. The ATA
27 The SX4 behaves like a PATA chip, with no SATA controls or
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