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/linux-6.14.4/include/dt-bindings/clock/
Dqcom,gcc-sc7180.h78 #define GCC_QUPV3_WRAP0_S5_CLK 68 macro
Dqcom,qdu1000-gcc.h76 #define GCC_QUPV3_WRAP0_S5_CLK 66 macro
Dqcom,sdx75-gcc.h121 #define GCC_QUPV3_WRAP0_S5_CLK 111 macro
Dqcom,gcc-sm6350.h92 #define GCC_QUPV3_WRAP0_S5_CLK 81 macro
Dqcom,sm7150-gcc.h81 #define GCC_QUPV3_WRAP0_S5_CLK 69 macro
Dqcom,gcc-qcm2290.h124 #define GCC_QUPV3_WRAP0_S5_CLK 114 macro
Dqcom,sar2130p-gcc.h86 #define GCC_QUPV3_WRAP0_S5_CLK 76 macro
Dqcom,gcc-sm6115.h110 #define GCC_QUPV3_WRAP0_S5_CLK 102 macro
Dqcom,qcs615-gcc.h95 #define GCC_QUPV3_WRAP0_S5_CLK 85 macro
Dqcom,gcc-sc7280.h90 #define GCC_QUPV3_WRAP0_S5_CLK 80 macro
Dqcom,gcc-sm6125.h152 #define GCC_QUPV3_WRAP0_S5_CLK 143 macro
Dqcom,qcs8300-gcc.h115 #define GCC_QUPV3_WRAP0_S5_CLK 105 macro
Dqcom,sm6375-gcc.h135 #define GCC_QUPV3_WRAP0_S5_CLK 124 macro
Dqcom,gcc-sdm845.h88 #define GCC_QUPV3_WRAP0_S5_CLK 78 macro
Dqcom,gcc-sm8450.h108 #define GCC_QUPV3_WRAP0_S5_CLK 96 macro
Dqcom,gcc-sm8150.h101 #define GCC_QUPV3_WRAP0_S5_CLK 91 macro
Dqcom,gcc-sm8350.h99 #define GCC_QUPV3_WRAP0_S5_CLK 87 macro
Dqcom,gcc-sm8250.h107 #define GCC_QUPV3_WRAP0_S5_CLK 97 macro
Dqcom,gcc-sc8180x.h116 #define GCC_QUPV3_WRAP0_S5_CLK 106 macro
Dqcom,sa8775p-gcc.h132 #define GCC_QUPV3_WRAP0_S5_CLK 121 macro
Dqcom,x1e80100-gcc.h184 #define GCC_QUPV3_WRAP0_S5_CLK 174 macro
Dqcom,gcc-sc8280xp.h203 #define GCC_QUPV3_WRAP0_S5_CLK 192 macro
/linux-6.14.4/Documentation/devicetree/bindings/soc/qcom/
Dqcom,geni-se.yaml144 clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
/linux-6.14.4/drivers/clk/qcom/
Dgcc-sar2130p.c1620 static struct clk_branch gcc_qupv3_wrap0_s5_clk = { variable
1627 .name = "gcc_qupv3_wrap0_s5_clk",
2190 [GCC_QUPV3_WRAP0_S5_CLK] = &gcc_qupv3_wrap0_s5_clk.clkr,
Dgcc-sc7180.c1508 static struct clk_branch gcc_qupv3_wrap0_s5_clk = { variable
1515 .name = "gcc_qupv3_wrap0_s5_clk",
2302 [GCC_QUPV3_WRAP0_S5_CLK] = &gcc_qupv3_wrap0_s5_clk.clkr,

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