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/linux-6.14.4/include/dt-bindings/clock/
Dqcom,gcc-sc7180.h70 #define GCC_QUPV3_WRAP0_S1_CLK 60 macro
Dqcom,qdu1000-gcc.h68 #define GCC_QUPV3_WRAP0_S1_CLK 58 macro
Dqcom,sdx75-gcc.h113 #define GCC_QUPV3_WRAP0_S1_CLK 103 macro
Dqcom,gcc-sm6350.h84 #define GCC_QUPV3_WRAP0_S1_CLK 73 macro
Dqcom,sm7150-gcc.h73 #define GCC_QUPV3_WRAP0_S1_CLK 61 macro
Dqcom,gcc-qcm2290.h116 #define GCC_QUPV3_WRAP0_S1_CLK 106 macro
Dqcom,sar2130p-gcc.h78 #define GCC_QUPV3_WRAP0_S1_CLK 68 macro
Dqcom,sm4450-gcc.h82 #define GCC_QUPV3_WRAP0_S1_CLK 72 macro
Dqcom,gcc-sm6115.h102 #define GCC_QUPV3_WRAP0_S1_CLK 94 macro
Dqcom,qcs615-gcc.h87 #define GCC_QUPV3_WRAP0_S1_CLK 77 macro
Dqcom,gcc-sc7280.h82 #define GCC_QUPV3_WRAP0_S1_CLK 72 macro
Dqcom,gcc-sm6125.h144 #define GCC_QUPV3_WRAP0_S1_CLK 135 macro
Dqcom,qcs8300-gcc.h107 #define GCC_QUPV3_WRAP0_S1_CLK 97 macro
Dqcom,sm6375-gcc.h127 #define GCC_QUPV3_WRAP0_S1_CLK 116 macro
Dqcom,gcc-sdm845.h80 #define GCC_QUPV3_WRAP0_S1_CLK 70 macro
Dqcom,gcc-sm8450.h100 #define GCC_QUPV3_WRAP0_S1_CLK 88 macro
Dqcom,gcc-sm8150.h93 #define GCC_QUPV3_WRAP0_S1_CLK 83 macro
Dqcom,gcc-sm8350.h91 #define GCC_QUPV3_WRAP0_S1_CLK 79 macro
Dqcom,gcc-sm8250.h99 #define GCC_QUPV3_WRAP0_S1_CLK 89 macro
Dqcom,gcc-sc8180x.h108 #define GCC_QUPV3_WRAP0_S1_CLK 98 macro
Dqcom,sa8775p-gcc.h124 #define GCC_QUPV3_WRAP0_S1_CLK 113 macro
Dqcom,x1e80100-gcc.h174 #define GCC_QUPV3_WRAP0_S1_CLK 164 macro
Dqcom,gcc-sc8280xp.h194 #define GCC_QUPV3_WRAP0_S1_CLK 183 macro
/linux-6.14.4/Documentation/devicetree/bindings/spi/
Dqcom,spi-geni-qcom.yaml109 clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
/linux-6.14.4/drivers/clk/qcom/
Dgcc-sar2130p.c1548 static struct clk_branch gcc_qupv3_wrap0_s1_clk = { variable
1555 .name = "gcc_qupv3_wrap0_s1_clk",
2182 [GCC_QUPV3_WRAP0_S1_CLK] = &gcc_qupv3_wrap0_s1_clk.clkr,

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