Searched full:exclk (Results 1 – 10 of 10) sorted by relevance
43 exclk: ext { label63 clocks = <&exclk>, <&rtclk>;230 clocks = <&exclk>, <&cgu X1000_CLK_UART0>;243 clocks = <&exclk>, <&cgu X1000_CLK_UART1>;256 clocks = <&exclk>, <&cgu X1000_CLK_UART2>;
43 exclk: ext { label63 clocks = <&exclk>, <&rtclk>;225 clocks = <&exclk>, <&cgu X1830_CLK_UART0>;238 clocks = <&exclk>, <&cgu X1830_CLK_UART1>;
42 &exclk {
41 Clock source to CPG can be either from external clock input (EXCLK) or
16 /* clock can be either from exclk or crystal oscillator (XIN/XOUT) */
36 /* clock can be either from exclk or crystal oscillator (XIN/XOUT) */
37 /* clock can be either from exclk or crystal oscillator (XIN/XOUT) */
381 * Therefore, the divider is disabled when EXCLK is selected.