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/linux-6.14.4/Documentation/devicetree/bindings/perf/
Darm,dsu-pmu.yaml5 $id: http://devicetree.org/schemas/perf/arm,dsu-pmu.yaml#
8 title: ARM DynamIQ Shared Unit (DSU) Performance Monitor Unit (PMU)
15 ARM DynamIQ Shared Unit (DSU) integrates one or more CPU cores with a shared
18 DSU. The PMU provides independent 32-bit counters that can count any of the
25 - const: arm,dsu-pmu
27 - const: arm,dsu-110-pmu
28 - const: arm,dsu-pmu
37 description: List of phandles for the CPUs connected to this DSU instance.
/linux-6.14.4/Documentation/admin-guide/perf/
Darm_dsu_pmu.rst2 ARM DynamIQ Shared Unit (DSU) PMU
11 cores connected to the same DSU. Like most of the other uncore PMUs, DSU
14 The DSU provides a bitmap for a subset of implemented events via hardware
17 by the DSU, in "events" directory under::
24 The driver also exposes the CPUs connected to the DSU instance in "associated_cpus".
/linux-6.14.4/tools/perf/pmu-events/arch/arm64/arm/cortex-a65-e1/
Dcache.json231DSU L3 cache (if present). If the private L2 cache is not present but the DSU L3 cache is present,…
234DSU L3 cache (if present). If the private L2 cache is not present but the DSU L3 cache is present,…
/linux-6.14.4/drivers/perf/
Darm_dsu_pmu.c3 * ARM DynamIQ Shared Unit (DSU) PMU driver
99 * struct dsu_pmu - DSU PMU descriptor
101 * @pmu_lock : Protects accesses to DSU PMU register from normal vs
104 * @associated_cpus : CPUs attached to the DSU.
359 * All DSU PMU event counters, except the cycle counter are 32bit
551 "Requested cpu is not associated with the DSU\n"); in dsu_pmu_event_init()
557 * CPU. As long as the requested CPU is within the same DSU, we in dsu_pmu_event_init()
628 * A dsu pmu node is inside a cluster parent node along with cpu nodes. in dsu_pmu_acpi_get_cpus()
677 * dsu_pmu_init_pmu: Initialise the DSU PMU configurations if
769 { .compatible = "arm,dsu-pmu", },
[all …]
DKconfig157 tristate "ARM DynamIQ Shared Unit (DSU) PMU"
161 Unit (DSU). The DSU integrates one or more cores with an L3 memory
163 to DSU.
/linux-6.14.4/drivers/soc/mediatek/
Dmtk-infracfg.c82 * MT8192 has an experimental path to route GPU traffic to the DSU's in mtk_infracfg_init()
/linux-6.14.4/arch/arm64/include/asm/
Darm_dsu_pmu.h3 * ARM DynamIQ Shared Unit (DSU) PMU Low level register access routines.
/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dipq5424.dtsi119 pmu-dsu {
120 compatible = "arm,dsu-pmu";
/linux-6.14.4/tools/perf/pmu-events/arch/arm64/freescale/imx95/sys/
Dmetrics.json155 "BriefDescription": "bytes of Cortex-A DSU L3 evicted/ACP transactions read from ddr",
163 "BriefDescription": "bytes of Cortex-A DSU L3 evicted/ACP transactions write to ddr",
/linux-6.14.4/Documentation/networking/
Deql.rst255 connectivity gradually, without having to buy expensive DSU/CSU
/linux-6.14.4/drivers/net/wan/
Dn2.c9 * Note: integrated CSU/DSU/DDS are not supported by this driver
/linux-6.14.4/drivers/video/fbdev/mmp/hw/
Dmmp_ctrl.h1065 #define DSI_CPU_CMD_1 0x024 /* DSU CPU Packet Command Register 1 */
1066 #define DSI_CPU_CMD_3 0x02C /* DSU CPU Packet Command Register 3 */
/linux-6.14.4/arch/arm64/boot/dts/nvidia/
Dtegra234.dtsi5696 dsu-pmu0 {
5697 compatible = "arm,dsu-pmu";
5702 dsu-pmu1 {
5703 compatible = "arm,dsu-pmu";
5708 dsu-pmu2 {
5709 compatible = "arm,dsu-pmu";
/linux-6.14.4/drivers/perf/arm_cspmu/
Darm_cspmu.c10 * This code is based on other uncore PMUs like ARM DSU PMU. It provides a
/linux-6.14.4/arch/arm64/boot/dts/exynos/google/
Dgs101.dtsi215 compatible = "arm,dsu-pmu";
/linux-6.14.4/arch/arm64/boot/dts/mediatek/
Dmt8195.dtsi311 dsu-pmu {
312 compatible = "arm,dsu-pmu";
/linux-6.14.4/arch/arm64/boot/dts/rockchip/
Drk3588-base.dtsi343 * The L3 cache belongs to the DynamIQ Shared Unit (DSU),
/linux-6.14.4/drivers/clk/rockchip/
Dclk-rk3588.c819 /* dsu */
/linux-6.14.4/drivers/clk/meson/
Dg12a.c1740 /* This clock feeds the DSU, avoid disabling it */