Searched full:devdisr (Results 1 – 5 of 5) sorted by relevance
63 setbits32(&guts->devdisr, mask); in mpc85xx_freeze_time_base()65 clrbits32(&guts->devdisr, mask); in mpc85xx_freeze_time_base()67 in_be32(&guts->devdisr); in mpc85xx_freeze_time_base()
18 Compatibility does not include bit assignments in SCCR/PMCDR/DEVDISR; these27 is a 32-byte block beginning with DEVDISR.50 first of which will be ORed into DEVDISR (and the second into
38 DEVDISR[1] 1 054 DEVDISR, DCFG_DEVDISR2 and DCFG_CCSR_DEVDISR2 are located in
21 __be32 devdisr; member
60 u32 devdisr; /* 0x.0070 - Device Disable Control */ member