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/linux-6.14.4/drivers/gpu/drm/msm/dsi/phy/
Ddsi_phy.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
8 #include <dt-bindings/phy/phy.h>
12 #define S_DIV_ROUND_UP(n, d) \ argument
13 (((n) >= 0) ? (((n) + (d) - 1) / (d)) : (((n) - (d) + 1) / (d)))
20 v = (tmax - tmin) * percent; in linear_inter()
23 return max_t(s32, min_result, v - 1); in linear_inter()
35 temp = 300 * coeff - ((timing->clk_prepare >> 1) + 1) * 2 * ui; in dsi_dphy_timing_calc_clk_zero()
36 tmin = S_DIV_ROUND_UP(temp, ui) - 2; in dsi_dphy_timing_calc_clk_zero()
46 temp = (timing->hs_rqst + timing->clk_prepare + clk_z) & 0x7; in dsi_dphy_timing_calc_clk_zero()
[all …]
Ddsi_phy_10nm.c2 * SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
15 * DSI PLL 10nm - clock diagram (eg: DSI0):
20 * +---------+ | +----------+ | +----+
21 * dsi0vco_clk ---| out_div |--o--| divl_3_0 |--o--| /8 |-- dsi0_phy_pll_out_byteclk
22 * +---------+ | +----------+ | +----+
26 * | | +----+ | |\ dsi0_pclk_mux
27 * | |--| /2 |--o--| \ |
28 * | | +----+ | \ | +---------+
29 …* | --------------| |--o--| div_7_4 |-- dsi0_phy_pll_…
[all …]
Ddsi_phy_28nm.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
14 * DSI PLL 28nm - clock diagram (eg: DSI0):
19 * +------+ | +----+ | |\ dsi0byte_mux
20 * dsi0vco_clk --o--| DIV1 |--o--| /2 |--o--| \ |
21 * | +------+ +----+ | m| | +----+
22 * | | u|--o--| /4 |-- dsi0pllbyte
23 * | | x| +----+
24 * o--------------------------| /
26 * | +------+
[all …]
/linux-6.14.4/drivers/scsi/libsas/
Dsas_init.c1 // SPDX-License-Identifier: GPL-2.0-only
32 spin_lock_init(&task->task_state_lock); in sas_alloc_task()
33 task->task_state_flags = SAS_TASK_STATE_PENDING; in sas_alloc_task()
51 task->slow_task = slow; in sas_alloc_slow_task()
52 slow->task = task; in sas_alloc_slow_task()
53 timer_setup(&slow->timer, NULL, 0); in sas_alloc_slow_task()
54 init_completion(&slow->completion); in sas_alloc_slow_task()
62 kfree(task->slow_task); in sas_free_task()
67 /*------------ SAS addr hash -----------*/
77 for (b = (SAS_ADDR_SIZE - 1); b >= 0; b--) { in sas_hash_addr()
[all …]
/linux-6.14.4/drivers/scsi/aic94xx/
Daic94xx_scb.c1 // SPDX-License-Identifier: GPL-2.0-only
19 /* ---------- EMPTY SCB ---------- */
36 static void get_lrate_mode(struct asd_phy *phy, u8 oob_mode) in get_lrate_mode() argument
38 struct sas_phy *sas_phy = phy->sas_phy.phy; in get_lrate_mode()
43 phy->sas_phy.linkrate = SAS_LINK_RATE_6_0_GBPS; in get_lrate_mode()
44 phy->sas_phy.phy->negotiated_linkrate = SAS_LINK_RATE_6_0_GBPS; in get_lrate_mode()
47 phy->sas_phy.linkrate = SAS_LINK_RATE_3_0_GBPS; in get_lrate_mode()
48 phy->sas_phy.phy->negotiated_linkrate = SAS_LINK_RATE_3_0_GBPS; in get_lrate_mode()
51 phy->sas_phy.linkrate = SAS_LINK_RATE_1_5_GBPS; in get_lrate_mode()
52 phy->sas_phy.phy->negotiated_linkrate = SAS_LINK_RATE_1_5_GBPS; in get_lrate_mode()
[all …]
/linux-6.14.4/drivers/nfc/
Dmei_phy.c1 // SPDX-License-Identifier: GPL-2.0
74 16, 1, (skb)->data, (skb)->len, false); \
81 16, 1, (skb)->data, (skb)->len, false); \
87 pr_debug("cmd=%02d status=%d req_id=%d rsvd=%d size=%d\n", \
88 (_hdr)->cmd, (_hdr)->status, (_hdr)->req_id, \
89 (_hdr)->reserved, (_hdr)->data_size); \
92 static int mei_nfc_if_version(struct nfc_mei_phy *phy) in mei_nfc_if_version() argument
107 r = mei_cldev_send(phy->cldev, (u8 *)&cmd, sizeof(struct mei_nfc_cmd)); in mei_nfc_if_version()
119 return -ENOMEM; in mei_nfc_if_version()
121 bytes_recv = mei_cldev_recv(phy->cldev, (u8 *)reply, if_version_length); in mei_nfc_if_version()
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/linux-6.14.4/drivers/phy/freescale/
Dphy-fsl-imx8-mipi-dphy.c1 // SPDX-License-Identifier: GPL-2.0+
9 #include <linux/clk-provider.h>
19 #include <linux/phy/phy.h>
22 #include <dt-bindings/firmware/imx/rsrc.h>
63 ((x) < 32) ? 0xe0 | ((x) - 16) : \
64 ((x) < 64) ? 0xc0 | ((x) - 32) : \
65 ((x) < 128) ? 0x80 | ((x) - 64) : \
66 ((x) - 128))
67 #define CN(x) (((x) == 1) ? 0x1f : (((CN_BUF) >> ((x) - 1)) & 0x1f))
68 #define CO(x) ((CO_BUF) >> (8 - (x)) & 0x03)
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Dphy-fsl-imx8qm-lvds-phy.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2017-2020,2022 NXP
12 #include <linux/phy/phy.h>
38 /* PHY initialization value and mask */
54 struct phy *phy; member
66 static int mixel_lvds_phy_init(struct phy *phy) in mixel_lvds_phy_init() argument
68 struct mixel_lvds_phy_priv *priv = dev_get_drvdata(phy->dev.parent); in mixel_lvds_phy_init()
70 mutex_lock(&priv->lock); in mixel_lvds_phy_init()
71 regmap_update_bits(priv->regmap, in mixel_lvds_phy_init()
73 mutex_unlock(&priv->lock); in mixel_lvds_phy_init()
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/linux-6.14.4/drivers/net/wireless/broadcom/b43/
Dlo.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 G PHY LO (LocalOscillator) Measuring and Control routines
8 Copyright (c) 2005 Martin Langer <martin-[email protected]>,
10 Copyright (c) 2005-2007 Michael Buesch <[email protected]>
33 list_for_each_entry(c, &lo->calib_list, list) { in b43_find_lo_calib()
34 if (!b43_compare_bbatt(&c->bbatt, bbatt)) in b43_find_lo_calib()
36 if (!b43_compare_rfatt(&c->rfatt, rfatt)) in b43_find_lo_calib()
44 /* Write the LocalOscillator Control (adjust) value-pair. */
47 struct b43_phy *phy = &dev->phy; in b43_lo_write() local
51 if (unlikely(abs(control->i) > 16 || abs(control->q) > 16)) { in b43_lo_write()
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/linux-6.14.4/drivers/phy/mediatek/
Dphy-mtk-xsphy.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <dt-bindings/phy/phy.h>
16 #include <linux/phy/phy.h>
19 #include "phy-mtk-io.h"
21 /* u2 phy banks */
26 /* u3 phy shared banks */
30 /* u3 phy banks */
85 struct phy *phy; member
87 struct clk *ref_clk; /* reference clock of anolog phy */
112 void __iomem *pbase = inst->port_base; in u2_phy_slew_rate_calibrate()
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/linux-6.14.4/drivers/net/wireless/mediatek/mt76/mt7915/
Ddebugfs.c1 // SPDX-License-Identifier: ISC
29 dev->ibf = !!val; in mt7915_implicit_txbf_set()
39 *val = dev->ibf; in mt7915_implicit_txbf_get()
52 struct mt7915_phy *phy = file->private_data; in mt7915_sys_recovery_set() local
53 struct mt7915_dev *dev = phy->dev; in mt7915_sys_recovery_set()
54 bool band = phy->mt76->band_idx; in mt7915_sys_recovery_set()
60 return -EINVAL; in mt7915_sys_recovery_set()
63 return -EFAULT; in mt7915_sys_recovery_set()
65 if (count && buf[count - 1] == '\n') in mt7915_sys_recovery_set()
66 buf[count - 1] = '\0'; in mt7915_sys_recovery_set()
[all …]
/linux-6.14.4/drivers/phy/intel/
Dphy-intel-keembay-emmc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Intel Keem Bay eMMC PHY driver
14 #include <linux/phy/phy.h>
18 /* eMMC/SD/SDIO core/phy configuration registers */
53 static int keembay_emmc_phy_power(struct phy *phy, bool on_off) in keembay_emmc_phy_power() argument
55 struct keembay_emmc_phy *priv = phy_get_drvdata(phy); in keembay_emmc_phy_power()
66 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, PWR_DOWN_MASK, in keembay_emmc_phy_power()
69 dev_err(&phy->dev, "CALIO power down bar failed: %d\n", ret); in keembay_emmc_phy_power()
73 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, DLL_EN_MASK, in keembay_emmc_phy_power()
76 dev_err(&phy->dev, "turn off the dll failed: %d\n", ret); in keembay_emmc_phy_power()
[all …]
Dphy-intel-lgm-emmc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Intel eMMC PHY driver
14 #include <linux/phy/phy.h>
18 /* eMMC phy register definitions */
51 static int intel_emmc_phy_power(struct phy *phy, bool on_off) in intel_emmc_phy_power() argument
53 struct intel_emmc_phy *priv = phy_get_drvdata(phy); in intel_emmc_phy_power()
64 ret = regmap_update_bits(priv->syscfg, EMMC_PHYCTRL1_REG, PDB_MASK, in intel_emmc_phy_power()
67 dev_err(&phy->dev, "CALIO power down bar failed: %d\n", ret); in intel_emmc_phy_power()
75 rate = clk_get_rate(priv->emmcclk); in intel_emmc_phy_power()
78 dev_warn(&phy->dev, "Unsupported rate: %lu\n", rate); in intel_emmc_phy_power()
[all …]
/linux-6.14.4/drivers/dma/
Dk3dma.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013 - 2015 Linaro Ltd.
8 #include <linux/dma-mapping.h>
22 #include "virt-dma.h"
24 #define DRIVER_NAME "k3-dma"
82 struct k3_dma_phy *phy; member
104 struct k3_dma_phy *phy; member
133 static void k3_dma_pause_dma(struct k3_dma_phy *phy, bool on) in k3_dma_pause_dma() argument
138 val = readl_relaxed(phy->base + CX_CFG); in k3_dma_pause_dma()
140 writel_relaxed(val, phy->base + CX_CFG); in k3_dma_pause_dma()
[all …]
Dpxa_dma.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/dma-mapping.h>
21 #include <linux/dma/pxa-dma.h>
24 #include "virt-dma.h"
35 #define PXA_DCSR_NODESC BIT(30) /* No-Descriptor Fetch (read / write) */
37 #define PXA_DCSR_REQPEND BIT(8) /* Request Pending (read-only) */
38 #define PXA_DCSR_STOPSTATE BIT(3) /* Stop State (read-only) */
63 #define PXA_DCMD_ENDIAN BIT(18) /* Device Endian-ness. */
70 #define PXA_DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */
73 #define PDMA_MAX_DESC_BYTES (PXA_DCMD_LENGTH & ~((1 << PDMA_ALIGNMENT) - 1))
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/linux-6.14.4/drivers/scsi/mpi3mr/
Dmpi3mr_transport.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2017-2023 Broadcom Inc.
6 * (mailto: mpi3mr-[email protected])
15 * mpi3mr_post_transport_req - Issue transport requests and wait
33 * Return: 0 on success, non-zero on failure.
41 mutex_lock(&mrioc->transport_cmds.mutex); in mpi3mr_post_transport_req()
42 if (mrioc->transport_cmds.state & MPI3MR_CMD_PENDING) { in mpi3mr_post_transport_req()
43 retval = -1; in mpi3mr_post_transport_req()
45 mutex_unlock(&mrioc->transport_cmds.mutex); in mpi3mr_post_transport_req()
48 mrioc->transport_cmds.state = MPI3MR_CMD_PENDING; in mpi3mr_post_transport_req()
[all …]
/linux-6.14.4/drivers/scsi/mpt3sas/
Dmpt3sas_transport.c5 * Copyright (C) 2012-2014 LSI Corporation
6 * Copyright (C) 2013-2014 Avago Technologies
7 * (mailto: MPT-[email protected])
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
64 * _transport_get_port_id_by_sas_phy - get zone's port id that Phy belong to
65 * @phy: sas_phy object
70 _transport_get_port_id_by_sas_phy(struct sas_phy *phy) in _transport_get_port_id_by_sas_phy() argument
73 struct hba_port *port = phy->hostdata; in _transport_get_port_id_by_sas_phy()
76 port_id = port->port_id; in _transport_get_port_id_by_sas_phy()
[all …]
/linux-6.14.4/drivers/net/wireless/mediatek/mt76/mt7996/
Ddebugfs.c1 // SPDX-License-Identifier: ISC
31 dev->ibf = !!val; in mt7996_implicit_txbf_set()
41 *val = dev->ibf; in mt7996_implicit_txbf_get()
54 struct mt7996_dev *dev = file->private_data; in mt7996_sys_recovery_set()
60 return -EINVAL; in mt7996_sys_recovery_set()
63 return -EFAULT; in mt7996_sys_recovery_set()
65 if (count && buf[count - 1] == '\n') in mt7996_sys_recovery_set()
66 buf[count - 1] = '\0'; in mt7996_sys_recovery_set()
72 return -EINVAL; in mt7996_sys_recovery_set()
76 return -EINVAL; in mt7996_sys_recovery_set()
[all …]
/linux-6.14.4/drivers/phy/cadence/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for Cadence PHYs
7 tristate "Cadence Torrent PHY driver"
13 Support for Cadence Torrent PHY.
16 tristate "Cadence D-PHY Support"
21 Choose this option if you have a Cadence D-PHY in your
23 cdns-dphy.
26 tristate "Cadence D-PHY Rx Support"
31 Support for Cadence D-PHY in Rx configuration.
34 tristate "Cadence Sierra PHY Driver"
[all …]
/linux-6.14.4/drivers/net/ethernet/chelsio/cxgb3/
Daq100x.c2 * Copyright (c) 2005-2008 Chelsio, Inc. All rights reserved.
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
65 static int aq100x_reset(struct cphy *phy, int wait) in aq100x_reset() argument
71 int err = t3_phy_reset(phy, MDIO_MMD_VEND1, 3000); in aq100x_reset()
74 CH_WARN(phy->adapter, "PHY%d: reset failed (0x%x).\n", in aq100x_reset()
75 phy->mdio.prtad, err); in aq100x_reset()
80 static int aq100x_intr_enable(struct cphy *phy) in aq100x_intr_enable() argument
82 int err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AQ_IMASK_PMA, IMASK_PMA); in aq100x_intr_enable()
86 err = t3_mdio_write(phy, MDIO_MMD_VEND1, AQ_IMASK_GLOBAL, IMASK_GLOBAL); in aq100x_intr_enable()
[all …]
/linux-6.14.4/drivers/phy/starfive/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for StarFive platforms
9 tristate "StarFive JH7110 D-PHY RX support"
14 Choose this option if you have a StarFive D-PHY in your
16 phy-jh7110-dphy-rx.ko.
19 tristate "StarFive JH7110 D-PHY TX Support"
24 Choose this option if you have a StarFive D-PHY TX in your
26 phy-jh7110-dphy-tx.ko.
29 tristate "Starfive JH7110 PCIE 2.0/USB 3.0 PHY support"
33 Enable this to support the StarFive PCIe 2.0 PHY,
[all …]
/linux-6.14.4/drivers/phy/samsung/
Dphy-samsung-ufs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * UFS PHY driver for Samsung EXYNOS SoC
13 #include <linux/phy/phy.h>
22 #define PHY_COMN_REG_CFG(o, v, d) { \ argument
26 .desc = (d), \
30 #define PHY_TRSV_REG_CFG_OFFSET(o, v, d, c) { \ argument
34 .desc = (d), \
38 #define PHY_TRSV_REG_CFG(o, v, d) \ argument
39 PHY_TRSV_REG_CFG_OFFSET(o, v, d, PHY_TRSV_CH_OFFSET)
41 /* UFS PHY registers */
[all …]
/linux-6.14.4/drivers/nfc/pn533/
Dusb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for NXP PN533 NFC Chip - USB transport layer
6 * Copyright (C) 2012-2013 Tieto Poland
61 struct pn533_usb_phy *phy = urb->context; in pn533_recv_response() local
64 if (!urb->status) { in pn533_recv_response()
65 skb = alloc_skb(urb->actual_length, GFP_ATOMIC); in pn533_recv_response()
67 nfc_err(&phy->udev->dev, "failed to alloc memory\n"); in pn533_recv_response()
69 skb_put_data(skb, urb->transfer_buffer, in pn533_recv_response()
70 urb->actual_length); in pn533_recv_response()
74 pn533_recv_frame(phy->priv, skb, urb->status); in pn533_recv_response()
[all …]
/linux-6.14.4/drivers/gpu/drm/hisilicon/kirin/
Ddw_drm_dsi.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2014-2016 HiSilicon Limited.
89 struct mipi_phy_params phy; member
122 static u32 dsi_calc_phy_rate(u32 req_kHz, struct mipi_phy_params *phy) in dsi_calc_phy_rate() argument
152 phy->pll_vco_750M = dphy_range_info[i].pll_vco_750M; in dsi_calc_phy_rate()
153 phy->hstx_ckg_sel = dphy_range_info[i].hstx_ckg_sel; in dsi_calc_phy_rate()
155 if (phy->hstx_ckg_sel <= 7 && in dsi_calc_phy_rate()
156 phy->hstx_ckg_sel >= 4) in dsi_calc_phy_rate()
157 q_pll = 0x10 >> (7 - phy->hstx_ckg_sel); in dsi_calc_phy_rate()
191 phy->pll_fbd_p = 0; in dsi_calc_phy_rate()
[all …]
/linux-6.14.4/arch/powerpc/boot/dts/fsl/
Dt2081qds.dts4 * Copyright 2013 - 2015 Freescale Semiconductor Inc.
35 /include/ "t208xsi-pre.dtsi"
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
58 phy-handle = <&phy_sgmii_s7_1c>;
59 phy-connection-type = "sgmii";
63 phy-handle = <&phy_sgmii_s7_1d>;
64 phy-connection-type = "sgmii";
68 phy-handle = <&rgmii_phy1>;
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