Searched full:clk_top_aud_mux1_sel (Results 1 – 5 of 5) sorted by relevance
| /linux-6.14.4/Documentation/devicetree/bindings/arm/mediatek/ |
| D | mediatek,audsys.yaml | 75 <&topckgen CLK_TOP_AUD_MUX1_SEL>,
144 assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
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| /linux-6.14.4/include/dt-bindings/clock/ |
| D | mt2701-clk.h | 131 #define CLK_TOP_AUD_MUX1_SEL 120 macro
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| /linux-6.14.4/arch/arm/boot/dts/mediatek/ |
| D | mt2701.dtsi | 435 <&topckgen CLK_TOP_AUD_MUX1_SEL>,
504 assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
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| D | mt7623.dtsi | 636 <&topckgen CLK_TOP_AUD_MUX1_SEL>,
705 assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
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| /linux-6.14.4/drivers/clk/mediatek/ |
| D | clk-mt2701.c | 590 MUX(CLK_TOP_AUD_MUX1_SEL, "aud_mux1_sel", aud_mux_parents,
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