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Searched full:clk_top_aud_k3_src_sel (Results 1 – 5 of 5) sorted by relevance

/linux-6.14.4/Documentation/devicetree/bindings/arm/mediatek/
Dmediatek,audsys.yaml81 <&topckgen CLK_TOP_AUD_K3_SRC_SEL>,
/linux-6.14.4/include/dt-bindings/clock/
Dmt2701-clk.h136 #define CLK_TOP_AUD_K3_SRC_SEL 125 macro
/linux-6.14.4/arch/arm/boot/dts/mediatek/
Dmt2701.dtsi441 <&topckgen CLK_TOP_AUD_K3_SRC_SEL>,
Dmt7623.dtsi642 <&topckgen CLK_TOP_AUD_K3_SRC_SEL>,
/linux-6.14.4/drivers/clk/mediatek/
Dclk-mt2701.c600 MUX_GATE(CLK_TOP_AUD_K3_SRC_SEL, "aud_k3_src_sel", aud_src_parents,