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/linux-6.14.4/Documentation/devicetree/bindings/arm/mediatek/
Dmediatek,audsys.yaml148 assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
/linux-6.14.4/include/dt-bindings/clock/
Dmt2701-clk.h74 #define CLK_TOP_AUD1PLL_98M 64 macro
/linux-6.14.4/arch/arm/boot/dts/mediatek/
Dmt2701.dtsi508 assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
Dmt7623.dtsi709 assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
/linux-6.14.4/drivers/clk/mediatek/
Dclk-mt2701.c132 FACTOR(CLK_TOP_AUD1PLL_98M, "aud1pll_98m_ck", "aud1pll", 1, 3),