Home
last modified time | relevance | path

Searched full:c6 (Results 1 – 25 of 229) sorted by relevance

12345678910

/linux-6.14.4/drivers/gpu/drm/nouveau/nvkm/engine/sec/fuc/
Dg98.fuc0s520 cxsout $c6
541 cxor $c6 $c0
542 cenc $c6 $c6
543 cxsout $c6
549 cmov $c2 $c6
550 cxsin $c6
551 cdec $c0 $c6
559 cxor $c6 $c0
560 cenc $c6 $c6
561 cxsout $c6
[all …]
/linux-6.14.4/arch/arm/mm/
Dproc-arm940.S57 mcr p15, 0, ip, c7, c6, 0 @ flush D cache
115 mcr p15, 0, ip, c7, c6, 0 @ flush D cache
197 2: mcr p15, 0, r3, c7, c6, 2 @ flush D entry
247 mcr p15, 0, r3, c7, c6, 2 @ invalidate D entry
285 mcr p15, 0, r0, c7, c6, 0 @ invalidate D cache
288 mcr p15, 0, r0, c6, c3, 0 @ disable data area 3~7
289 mcr p15, 0, r0, c6, c4, 0
290 mcr p15, 0, r0, c6, c5, 0
291 mcr p15, 0, r0, c6, c6, 0
292 mcr p15, 0, r0, c6, c7, 0
[all …]
Dproc-arm946.S64 mcr p15, 0, ip, c7, c6, 0 @ flush D cache
109 mcr p15, 0, ip, c7, c6, 0 @ flush D cache
144 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
147 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
246 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
290 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
338 mcr p15, 0, r0, c7, c6, 0 @ invalidate D cache
341 mcr p15, 0, r0, c6, c3, 0 @ disable memory region 3~7
342 mcr p15, 0, r0, c6, c4, 0
343 mcr p15, 0, r0, c6, c5, 0
[all …]
Dproc-arm740.S76 mcr p15, 0, r0, c6, c3 @ disable area 3~7
77 mcr p15, 0, r0, c6, c4
78 mcr p15, 0, r0, c6, c5
79 mcr p15, 0, r0, c6, c6
80 mcr p15, 0, r0, c6, c7
83 mcr p15, 0, r0, c6, c0 @ set area 0, default
93 mcr p15, 0, r0, c6, c1 @ set area 1, RAM
106 2: mcr p15, 0, r0, c6, c2 @ set area 2, ROM/FLASH
Dcopypage-v4wb.c29 1: mcr p15, 0, %0, c7, c6, 1 @ 1 invalidate D line\n\ in v4wb_copy_user_page()
34 mcr p15, 0, %0, c7, c6, 1 @ 1 invalidate D line\n\ in v4wb_copy_user_page()
74 1: mcr p15, 0, %0, c7, c6, 1 @ 1 invalidate D line\n\ in v4wb_clear_user_highpage()
77 mcr p15, 0, %0, c7, c6, 1 @ 1 invalidate D line\n\ in v4wb_clear_user_highpage()
Dcopypage-v4mc.c47 1: mcr p15, 0, %1, c7, c6, 1 @ 1 invalidate D line\n\ in mc_copy_user_page()
52 mcr p15, 0, %1, c7, c6, 1 @ 1 invalidate D line\n\ in mc_copy_user_page()
96 1: mcr p15, 0, %0, c7, c6, 1 @ 1 invalidate D line\n\ in v4_mc_clear_user_highpage()
99 mcr p15, 0, %0, c7, c6, 1 @ 1 invalidate D line\n\ in v4_mc_clear_user_highpage()
Dpmsa-v7.c38 #define DRBAR __ACCESS_CP15(c6, 0, c1, 0)
39 #define IRBAR __ACCESS_CP15(c6, 0, c1, 1)
40 #define DRSR __ACCESS_CP15(c6, 0, c1, 2)
41 #define IRSR __ACCESS_CP15(c6, 0, c1, 3)
42 #define DRACR __ACCESS_CP15(c6, 0, c1, 4)
43 #define IRACR __ACCESS_CP15(c6, 0, c1, 5)
44 #define RNGNR __ACCESS_CP15(c6, 0, c2, 0)
Dcopypage-xsc3.c40 mcr p15, 0, %0, c7, c6, 1 @ invalidate\n\ in xsc3_mc_copy_user_page()
49 mcr p15, 0, %0, c7, c6, 1 @ invalidate\n\ in xsc3_mc_copy_user_page()
88 1: mcr p15, 0, %0, c7, c6, 1 @ invalidate line\n\ in xsc3_mc_clear_user_highpage()
Dcopypage-xscale.c65 mcr p15, 0, ip, c7, c6, 1 @ invalidate D line\n\ in mc_copy_user_page()
76 mcr p15, 0, ip, c7, c6, 1 @ invalidate D line\n\ in mc_copy_user_page()
123 mcr p15, 0, ip, c7, c6, 1 @ invalidate D line\n\ in xscale_mc_clear_user_highpage()
Dcache-v4wt.S72 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
91 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
165 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
Dproc-arm925.S169 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
200 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
203 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
301 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
343 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
401 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
Dproc-arm926.S135 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
163 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
166 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
264 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
306 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
365 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
/linux-6.14.4/arch/arm/kernel/
Dhead-nommu.S219 mcr p15, 0, \tmp, c6, c2, 0 @ Write RGNR
224 mcr p15, 0, \bar, c6, c1, (0 + \side) @ I/DRBAR
225 mcr p15, 0, \acr, c6, c1, (4 + \side) @ I/DRACR
226 mcr p15, 0, \sr, c6, c1, (2 + \side) @ I/DRSR
337 AR_CLASS(mcr p15, 0, r0, c6, c2, 1) @ PRSEL
350 AR_CLASS(mcr p15, 0, r5, c6, c8, 0) @ PRBAR0
351 AR_CLASS(mcr p15, 0, r6, c6, c8, 1) @ PRLAR0
364 AR_CLASS(mcr p15, 0, r5, c6, c8, 4) @ PRBAR1
365 AR_CLASS(mcr p15, 0, r6, c6, c8, 5) @ PRLAR1
388 AR_CLASS(mcr p15, 0, r5, c6, c9, 0) @ PRBAR2
[all …]
/linux-6.14.4/arch/arm/include/asm/hardware/
Dcp14.h48 #define RCP14_DBGWFAR() MRC14(0, c0, c6, 0)
63 #define RCP14_DBGBVR6() MRC14(0, c0, c6, 4)
79 #define RCP14_DBGBCR6() MRC14(0, c0, c6, 5)
95 #define RCP14_DBGWVR6() MRC14(0, c0, c6, 6)
111 #define RCP14_DBGWCR6() MRC14(0, c0, c6, 7)
128 #define RCP14_DBGBXVR6() MRC14(0, c1, c6, 1)
153 #define WCP14_DBGWFAR(val) MCR14(val, 0, c0, c6, 0)
168 #define WCP14_DBGBVR6(val) MCR14(val, 0, c0, c6, 4)
184 #define WCP14_DBGBCR6(val) MCR14(val, 0, c0, c6, 5)
200 #define WCP14_DBGWVR6(val) MCR14(val, 0, c0, c6, 6)
[all …]
/linux-6.14.4/tools/power/cpupower/utils/idle_monitor/
Dnhm_idle.c27 enum intel_nhm_id { C3 = 0, C6, PC3, PC6, TSC = 0xFFFF }; enumerator
41 .name = "C6",
42 .desc = N_("Processor Core C6"),
43 .id = C6,
57 .desc = N_("Processor Package C6"),
80 case C6: in nhm_get_count()
/linux-6.14.4/tools/perf/pmu-events/arch/x86/emeraldrapids/
Duncore-power.json158 "BriefDescription": "Package C State Residency - C6",
164 …Residency - C6 : Counts the number of cycles when the package was in C6. This event can be used i…
197 "BriefDescription": "Number of cores in C6",
203 …"PublicDescription": "Number of cores in C6 : This is an occupancy event that tracks the number of…
/linux-6.14.4/tools/perf/pmu-events/arch/x86/sapphirerapids/
Duncore-power.json158 "BriefDescription": "Package C State Residency - C6",
164 …Residency - C6 : Counts the number of cycles when the package was in C6. This event can be used i…
197 "BriefDescription": "Number of cores in C6",
203 …"PublicDescription": "Number of cores in C6 : This is an occupancy event that tracks the number of…
/linux-6.14.4/drivers/idle/
Dintel_idle.c121 * Initialize large xstate for the C6-state entrance.
263 .name = "C6",
300 .name = "C6",
435 .name = "C6",
480 .name = "C6",
517 .name = "C6",
554 .name = "C6",
591 .name = "C6",
659 .name = "C6",
728 .name = "C6",
[all …]
/linux-6.14.4/tools/perf/pmu-events/arch/x86/snowridgex/
Duncore-power.json166 "BriefDescription": "Package C State Residency - C6",
172 …Residency - C6 : Counts the number of cycles when the package was in C6. This event can be used i…
207 "BriefDescription": "Number of cores in C-State : C6 and C7",
213 …"PublicDescription": "Number of cores in C-State : C6 and C7 : This is an occupancy event that tra…
/linux-6.14.4/tools/perf/pmu-events/arch/x86/icelakex/
Duncore-power.json167 "BriefDescription": "Package C State Residency - C6",
173 …Residency - C6 : Counts the number of cycles when the package was in C6. This event can be used i…
208 "BriefDescription": "Number of cores in C-State : C6 and C7",
214 …"PublicDescription": "Number of cores in C-State : C6 and C7 : This is an occupancy event that tra…
/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dipq9574-rdp449.dts14 model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C6";
15 compatible = "qcom,ipq9574-ap-al02-c6", "qcom,ipq9574";
/linux-6.14.4/arch/x86/kernel/cpu/mce/
Dwinchip.c19 /* Machine check handler for WinChip C6: */
28 /* Set up machine check reporting on the Winchip C6 series */
/linux-6.14.4/arch/x86/events/intel/
Dcstate.c51 * MSR_CORE_C6_RESIDENCY: CORE C6 Residency Counter
75 * MSR_PKG_C6_RESIDENCY: Package C6 Residency Counter.
101 * MSR_MODULE_C6_RES_MS: Module C6 Residency Counter.
158 PMU_EVENT_ATTR_STRING(c6-residency, attr_cstate_core_c6, "event=0x02");
229 PMU_EVENT_ATTR_STRING(c6-residency, attr_cstate_pkg_c6, "event=0x02");
265 PMU_EVENT_ATTR_STRING(c6-residency, attr_cstate_module_c6, "event=0x00");
660 /* SLM has different MSR for PKG C6 */ in cstate_probe()
664 /* KNL has different MSR for CORE C6 */ in cstate_probe()
/linux-6.14.4/arch/arm/include/asm/
Dtlbflush.h322 tlb_op(TLB_V4_D_FULL | TLB_V6_D_FULL, "c8, c6, 0", zero); in __local_flush_tlb_all()
369 tlb_op(TLB_V4_D_FULL, "c8, c6, 0", zero); in __local_flush_tlb_mm()
375 tlb_op(TLB_V6_D_ASID, "c8, c6, 2", asid); in __local_flush_tlb_mm()
423 tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", uaddr); in __local_flush_tlb_page()
430 tlb_op(TLB_V6_D_PAGE, "c8, c6, 1", uaddr); in __local_flush_tlb_page()
478 tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", kaddr); in __local_flush_tlb_kernel_page()
484 tlb_op(TLB_V6_D_PAGE, "c8, c6, 1", kaddr); in __local_flush_tlb_kernel_page()
/linux-6.14.4/crypto/
Dwp512.c587 static const u64 C6[256] = { variable
810 C6[(int)(K[2] >> 8) & 0xff] ^ in wp512_process_buffer()
820 C6[(int)(K[3] >> 8) & 0xff] ^ in wp512_process_buffer()
829 C6[(int)(K[4] >> 8) & 0xff] ^ in wp512_process_buffer()
838 C6[(int)(K[5] >> 8) & 0xff] ^ in wp512_process_buffer()
847 C6[(int)(K[6] >> 8) & 0xff] ^ in wp512_process_buffer()
856 C6[(int)(K[7] >> 8) & 0xff] ^ in wp512_process_buffer()
865 C6[(int)(K[0] >> 8) & 0xff] ^ in wp512_process_buffer()
874 C6[(int)(K[1] >> 8) & 0xff] ^ in wp512_process_buffer()
892 C6[(int)(state[2] >> 8) & 0xff] ^ in wp512_process_buffer()
[all …]

12345678910