| /linux-6.14.4/drivers/staging/greybus/ |
| D | bootrom.c | 3 * BOOTROM Greybus driver.
40 struct mutex mutex; /* Protects bootrom->fw */
43 static void free_firmware(struct gb_bootrom *bootrom) in free_firmware() argument
45 if (!bootrom->fw) in free_firmware()
48 release_firmware(bootrom->fw); in free_firmware()
49 bootrom->fw = NULL; in free_firmware()
55 struct gb_bootrom *bootrom = container_of(dwork, in gb_bootrom_timedout() local
57 struct device *dev = &bootrom->connection->bundle->dev; in gb_bootrom_timedout()
60 switch (bootrom->next_request) { in gb_bootrom_timedout()
75 dev_err(dev, "Invalid next-request: %u", bootrom->next_request); in gb_bootrom_timedout()
[all …]
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| D | Makefile | 6 gb-bootrom-y := bootrom.o
18 obj-$(CONFIG_GREYBUS_BOOTROM) += gb-bootrom.o
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| D | Kconfig | 27 tristate "Greybus Bootrom Class driver"
30 Greybus Bootrom Class specification.
33 will be called gb-bootrom.ko
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| /linux-6.14.4/arch/arm/mach-mvebu/ |
| D | platsmp.c | 131 * the bootROM is mapped at the correct address. in armada_xp_smp_prepare_cpus()
133 node = of_find_compatible_node(NULL, NULL, "marvell,bootrom"); in armada_xp_smp_prepare_cpus()
135 panic("Cannot find 'marvell,bootrom' compatible node"); in armada_xp_smp_prepare_cpus()
140 panic("Cannot get 'bootrom' node address"); in armada_xp_smp_prepare_cpus()
144 panic("The address for the BootROM is incorrect"); in armada_xp_smp_prepare_cpus()
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| D | pmsu.c | 122 * BootROM Mbus window, and instead remaps a crypto SRAM into which a
123 * custom piece of code is copied to replace the problematic BootROM.
404 * performed by the BootROM software". To avoid this, we in armada_370_cpuidle_init()
405 * replace the restart code of the bootrom by a a simple jump in armada_370_cpuidle_init()
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| D | pmsu_ll.S | 31 * Disable the MMU that might have been enabled in BootROM if
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| /linux-6.14.4/Documentation/devicetree/bindings/bus/ |
| D | mvebu-mbus.txt | 118 bootrom {
119 compatible = "marvell,bootrom";
160 bootrom {
161 compatible = "marvell,bootrom";
224 bootrom {
225 compatible = "marvell,bootrom";
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| /linux-6.14.4/arch/mips/ralink/ |
| D | bootrom.c | 21 DEFINE_SHOW_ATTRIBUTE(bootrom);
25 debugfs_create_file("bootrom", 0444, NULL, NULL, &bootrom_fops); in bootrom_setup()
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| D | Makefile | 26 obj-$(CONFIG_DEBUG_FS) += bootrom.o
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| /linux-6.14.4/arch/powerpc/include/asm/ |
| D | uninorth.h | 97 * the bootrom, I'm not sure about their exact meaning yet
135 * the bootROM decides whether to boot or to sleep/spinloop depending
140 /* This register appear to be read by the bootROM to decide what
146 /* This last bit appear to be used by the bootROM to know the second
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| /linux-6.14.4/drivers/gpu/drm/i915/gt/uc/ |
| D | intel_guc_fw.c | 205 u32 bootrom = REG_FIELD_GET(GS_BOOTROM_MASK, status); in guc_wait_ucode() local
209 …guc_info(guc, "load failed: status: Reset = %d, BootROM = 0x%02X, UKernel = 0x%02X, MIA = 0x%02X, … in guc_wait_ucode()
211 bootrom, ukernel, in guc_wait_ucode()
215 switch (bootrom) { in guc_wait_ucode()
300 * HW is fixed for each platform and hard-coded in the bootrom. in intel_guc_fw_upload()
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| /linux-6.14.4/include/linux/greybus/ |
| D | greybus_protocols.h | 363 /* Bootrom Protocol */
365 /* Version of the Greybus bootrom protocol we support */
369 /* Greybus bootrom request types */
377 /* Greybus bootrom boot stages */
379 #define GB_BOOTROM_BOOT_STAGE_TWO 0x02 /* Bootrom package to be loaded by the boot ROM */
382 /* Greybus bootrom ready to boot status */
387 /* Max bootrom data fetch size in bytes */
400 /* Bootrom protocol firmware size request/response */
409 /* Bootrom protocol get firmware request/response */
417 /* Bootrom protocol Ready to boot request */
[all …]
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| /linux-6.14.4/arch/arm/mach-shmobile/ |
| D | headsmp.S | 65 ldr r0, bootrom
77 bootrom: label
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| /linux-6.14.4/Documentation/devicetree/bindings/mtd/ |
| D | gpmi-nand.yaml | 79 WARNING: on i.MX28 blockmark swapping cannot be disabled for the BootROM
81 on may not be accessible by the BootROM code.
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| /linux-6.14.4/arch/arm/boot/dts/amlogic/ |
| D | meson.dtsi | 296 bootrom: bootrom@d9040000 { label
297 compatible = "amlogic,meson-mx-bootrom", "syscon";
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| /linux-6.14.4/arch/arm64/boot/dts/ti/ |
| D | k3-am62-lp-sk-nand.dtso | 57 ti,nand-ecc-opt = "bch8"; /* BCH8: Bootrom limitation */
96 reg = <0x00400000 0x00200000>; /* BootROM looks at 4M */
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| D | k3-am642-evm-nand.dtso | 82 ti,nand-ecc-opt = "bch8"; /* BCH8: Bootrom limitation */
124 reg = <0x00400000 0x00200000>; /* BootROM looks at 4M */
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| /linux-6.14.4/arch/arm/boot/dts/nspire/ |
| D | nspire.dtsi | 22 bootrom: bootrom@0 { label
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| /linux-6.14.4/arch/arm/boot/dts/marvell/ |
| D | armada-370.dtsi | 33 bootrom {
34 compatible = "marvell,bootrom";
273 * on the BootROM code to enter/exit idle state).
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| D | armada-xp.dtsi | 33 bootrom {
34 compatible = "marvell,bootrom";
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| /linux-6.14.4/Documentation/devicetree/bindings/mfd/ |
| D | syscon.yaml | 39 - amlogic,meson-mx-bootrom
138 - amlogic,meson-mx-bootrom
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| /linux-6.14.4/drivers/nfc/nfcmrvl/ |
| D | fw_dnld.h | 55 struct nfcmrvl_fw_binary_config bootrom; member
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| D | fw_dnld.c | 137 nfc_info(priv->dev, "BootROM reset, start fw download\n"); in process_state_reset()
534 /* Ronfigure HI to be sure that it is the bootrom values */ in nfcmrvl_fw_dnld_start()
536 &fw_dnld->header->bootrom.config); in nfcmrvl_fw_dnld_start()
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| /linux-6.14.4/arch/arm/mach-sti/ |
| D | platsmp.c | 35 * Secondary CPU is initialised and started by a U-BOOTROM firmware. in sti_boot_secondary()
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| /linux-6.14.4/arch/arm/mach-rockchip/ |
| D | platsmp.c | 138 * We communicate with the bootrom to active the cpus other in rockchip_boot_secondary()
146 * (e.g: cpu frequency, bootrom frequency, sram frequency, ...) in rockchip_boot_secondary()
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