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/linux-6.14.4/Documentation/devicetree/bindings/phy/
Dmicrochip,sparx5-serdes.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/microchip,sparx5-serdes.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steen Hegelund <[email protected]>
11 - Daniel Machon <[email protected]>
22 * Rx built-in fault detector (loss-of-lock/loss-of-signal)
23 * Adjustable tx de-emphasis (FFE)
32 The SERDES6G is a high-speed SERDES interface, which can operate at
35 * 100 Mbps (100BASE-FX)
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Dmediatek,mt7988-xfi-tphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/mediatek,mt7988-xfi-tphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek MT7988 XFI T-PHY
10 - Daniel Golle <[email protected]>
13 The MediaTek XFI SerDes T-PHY provides the physical SerDes lanes
14 used by the (10G/5G) USXGMII PCS and (1G/2.5G) LynxI PCS found in
15 MediaTek's 10G-capabale MT7988 SoC.
20 const: mediatek,mt7988-xfi-tphy
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/linux-6.14.4/include/uapi/linux/
Dmdio.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * Copyright 2006-2009 Solarflare Communications Inc.
23 #define MDIO_MMD_DTEXS 5 /* DTE Extender Sublayer */
25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */
37 #define MDIO_DEVS1 5 /* Devices in package */
39 #define MDIO_CTRL2 7 /* 10G control 2 */
40 #define MDIO_STAT2 8 /* 10G status 2 */
41 #define MDIO_PMA_TXDIS 9 /* 10G PMA/PMD transmit disable */
42 #define MDIO_PMA_RXDET 10 /* 10G PMA/PMD receive signal detect */
43 #define MDIO_PMA_EXTABLE 11 /* 10G PMA/PMD extended ability */
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/linux-6.14.4/drivers/phy/mediatek/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 tristate "MediaTek PCIe-PHY Driver"
17 tristate "MediaTek 10GE SerDes XFI T-PHY driver"
22 Say 'Y' here to add support for MediaTek XFI T-PHY driver.
23 The driver provides access to the Ethernet SerDes T-PHY supporting
24 1GE and 2.5GE modes via the LynxI PCS, and 5GE and 10GE modes
25 via the USXGMII PCS found in MediaTek SoCs with 10G Ethernet.
28 tristate "MediaTek T-PHY Driver"
34 Say 'Y' here to add support for MediaTek T-PHY driver,
36 SATA, and meanwhile supports two version T-PHY which have
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Dphy-mtk-xfi-tphy.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MediaTek 10GE SerDes XFI T-PHY driver
6 * Bc-bocun Chen <bc-[email protected]>
7 * based on mtk_usxgmii.c and mtk_sgmii.c found in MediaTek's SDK (GPL-2.0)
22 #include "phy-mtk-io.h"
44 #define XFI_DPHY_AD_SGDT_FRC_EN BIT(5)
51 #define XTP_LN_FRC_TX_MACCK_EN BIT(5)
60 * struct mtk_xfi_tphy - run-time data of the XFI phy instance
65 * @da_war: Enables work-around for 10GBase-R mode.
76 * mtk_xfi_tphy_setup() - Setup phy for specified interface mode.
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/linux-6.14.4/Documentation/devicetree/bindings/net/pcs/
Dsnps,dw-xpcs.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/pcs/snps,dw-xpcs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Serge Semin <[email protected]>
15 the Media Independent Interface (XGMII, USXGMII, XLGMII, GMII, etc)
17 optionally synthesized with a vendor-specific interface connected to
28 - description: Synopsys DesignWare XPCS with none or unknown PMA
29 const: snps,dw-xpcs
30 - description: Synopsys DesignWare XPCS with Consumer Gen1 3G PMA
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/linux-6.14.4/Documentation/networking/
Dphy.rst26 #. Increase code-reuse
27 #. Increase overall code-maintainability
67 for one of the users. (e.g. "git grep fsl,.*-mdio arch/powerpc/boot/dts/")
72 The Reduced Gigabit Medium Independent Interface (RGMII) is a 12-pin
84 or the PCB traces insert the correct 1.5-2ns delay
97 * PHY devices may offer sub-nanosecond granularity in how they allow a
98 receiver/transmitter side delay (e.g: 0.5, 1.0, 1.5ns) to be specified. Such
115 PHY_INTERFACE_MODE_RGMII, it should make sure that the MAC-level delays are
126 * Modifying the PCB design to include a fixed delay (e.g: using a specifically
130 -----------------------------------------
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/linux-6.14.4/Documentation/devicetree/bindings/net/
Dethernet-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <[email protected]>
19 local-mac-address:
22 $ref: /schemas/types.yaml#/definitions/uint8-array
26 mac-address:
31 local-mac-address property.
32 $ref: /schemas/types.yaml#/definitions/uint8-array
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/linux-6.14.4/drivers/net/phy/
Dphylink.c1 // SPDX-License-Identifier: GPL-2.0
4 * technologies such as SFP cages where the PHY is hot-pluggable.
44 * struct phylink - internal data type for phylink
61 u8 link_port; /* The current non-phy ethtool port */
103 if ((pl)->config->type == PHYLINK_NETDEV) \
104 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
105 else if ((pl)->config->type == PHYLINK_DEV) \
106 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
118 if ((pl)->config->type == PHYLINK_NETDEV) \
119 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \
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Dmarvell10g.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Marvell 10G 88x3310 PHY driver
10 * via observation and experimentation for a setup using single-lane Serdes:
12 * SGMII PHYXS -- BASE-T PCS -- 10G PMA -- AN -- Copper (for <= 1G)
13 * 10GBASE-KR PHYXS -- BASE-T PCS -- 10G PMA -- AN -- Copper (for 10G)
14 * 10GBASE-KR PHYXS -- BASE-R PCS -- Fiber
18 * XAUI PHYXS -- <appropriate PCS as above>
104 /* These registers appear at 0x800X and 0xa00X - the 0xa00X control
108 MV_AN_CTRL1000 = 0x8000, /* 1000base-T control register */
109 MV_AN_STAT1000 = 0x8001, /* 1000base-T status register */
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Dmxl-gpy.c1 // SPDX-License-Identifier: GPL-2.0+
53 #define PHY_IMASK_WOL BIT(15) /* Wake-on-LAN */
54 #define PHY_IMASK_ANC BIT(10) /* Auto-Neg complete */
55 #define PHY_IMASK_ADSC BIT(5) /* Link auto-downspeed detect */
136 * it can safely re-enter loopback mode. Record the time when
156 * T = -2.5761e-11*(N^4) + 9.7332e-8*(N^3) + -1.9165e-4*(N^2) +
157 * 3.0762e-1*(N^1) + -5.2156e1
159 * where [-52.156, 137.961]C and N = [0, 1023].
168 * T = -25761e-12*(N^4) + 97332e-9*(N^3) + -191650e-6*(N^2) +
169 * 307620e-3*(N^1) + -52156
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/linux-6.14.4/drivers/net/phy/aquantia/
Daquantia_main.c1 // SPDX-License-Identifier: GPL-2.0
70 #define MDIO_AN_TX_VEND_STATUS1_5000BASET 5
104 /* Sleep and timeout for checking if the Processor-Intensive
127 int len_l = min(stat->size, 16); in aqr107_get_stat()
128 int len_h = stat->size - len_l; in aqr107_get_stat()
132 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg); in aqr107_get_stat()
136 ret = val & GENMASK(len_l - 1, 0); in aqr107_get_stat()
138 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg + 1); in aqr107_get_stat()
142 ret += (val & GENMASK(len_h - 1, 0)) << 16; in aqr107_get_stat()
151 struct aqr107_priv *priv = phydev->priv; in aqr107_get_stats()
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/linux-6.14.4/drivers/net/dsa/mv88e6xxx/
Dpcs-639x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
36 err = mdiodev_c45_read(&mpcs->mdio, MDIO_MMD_PHYXS, regnum); in mv88e639x_read()
47 return mdiodev_c45_write(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, val); in mv88e639x_write()
53 return mdiodev_c45_modify(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, mask, in mv88e639x_modify()
60 return mdiodev_c45_modify_changed(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, in mv88e639x_modify_changed()
74 mpcs->mdio.dev.parent = dev; in mv88e639x_pcs_alloc()
75 mpcs->mdio.bus = bus; in mv88e639x_pcs_alloc()
76 mpcs->mdio.addr = addr; in mv88e639x_pcs_alloc()
78 snprintf(mpcs->name, sizeof(mpcs->name), in mv88e639x_pcs_alloc()
79 "mv88e6xxx-%s-serdes-%d", dev_name(dev), port); in mv88e639x_pcs_alloc()
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/linux-6.14.4/drivers/phy/cadence/
Dphy-cadence-torrent.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/phy/phy-cadence.h>
12 #include <linux/clk-provider.h>
239 [CDNS_TORRENT_REFCLK_DRIVER] = "refclk-driver",
240 [CDNS_TORRENT_DERIVED_REFCLK] = "refclk-der",
241 [CDNS_TORRENT_RECEIVED_REFCLK] = "refclk-rec",
279 [CMN_CDIAG_REFCLK_DRV0_CTRL_5] = REG_FIELD(CMN_CDIAG_REFCLK_DRV0_CTRL, 5, 5),
325 #define LINK1_MASK GENMASK(5, 3)
468 for (i = 0; i < tbl->num_entries; i++) { in cdns_torrent_get_tbl_vals()
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/linux-6.14.4/include/linux/
Dphy.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
64 * Set phydev->irq to PHY_POLL if interrupts are not supported,
68 #define PHY_POLL -1
69 #define PHY_MAC_INTERRUPT -2
78 * enum phy_interface_t - Interface Mode definitions
80 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
82 * @PHY_INTERFACE_MODE_MII: Media-independent interface
83 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface
84 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
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/linux-6.14.4/drivers/net/pcs/
Dpcs-xpcs.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/pcs/pcs-xpcs.h>
17 #include "pcs-xpcs.h"
128 for (compat = xpcs->desc->compat; compat->supported; compat++) in xpcs_find_compat()
129 if (compat->interface == interface) in xpcs_find_compat()
137 return &xpcs->pcs; in xpcs_to_phylink_pcs()
147 return -ENODEV; in xpcs_get_an_mode()
149 return compat->an_mode; in xpcs_get_an_mode()
158 for (i = 0; compat->supported[i] != __ETHTOOL_LINK_MODE_MASK_NBITS; i++) in __xpcs_linkmode_supported()
159 if (compat->supported[i] == linkmode) in __xpcs_linkmode_supported()
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