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/linux-6.14.4/arch/m68k/include/uapi/asm/
Dbootinfo-hp300.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 ** asm/bootinfo-hp300.h -- HP9000/300-specific boot information definitions
11 * HP9000/300-specific tags
25 #define HP_320 0 /* 16MHz 68020+HP MMU+16K external cache */
26 #define HP_330 1 /* 16MHz 68020+68851 MMU */
27 #define HP_340 2 /* 16MHz 68030 */
28 #define HP_345 3 /* 50MHz 68030+32K external cache */
29 #define HP_350 4 /* 25MHz 68020+HP MMU+32K external cache */
30 #define HP_360 5 /* 25MHz 68030 */
31 #define HP_370 6 /* 33MHz 68030+64K external cache */
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/clock/
Darmada3700-periph-clock.txt14 -----------------------------------
35 -----------------------------------
36 0 gbe-50 50 MHz parent clock for Gigabit Ethernet
37 1 gbe-core parent clock for Gigabit Ethernet core
38 2 gbe-125 125 MHz parent clock for Gigabit Ethernet
39 3 gbe1-50 50 MHz clock for Gigabit Ethernet port 1
40 4 gbe0-50 50 MHz clock for Gigabit Ethernet port 0
41 5 gbe1-125 125 MHz clock for Gigabit Ethernet port 1
42 6 gbe0-125 125 MHz clock for Gigabit Ethernet port 0
43 7 gbe1-core Gigabit Ethernet core port 1
[all …]
Dstarfive,jh7100-clkgen.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/starfive,jh7100-clkgen.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert@linux-m68k.org>
11 - Emil Renner Berthing <[email protected]>
15 const: starfive,jh7100-clkgen
22 - description: Main clock source (25 MHz)
23 - description: Application-specific clock source (12-27 MHz)
24 - description: RMII reference clock (50 MHz)
[all …]
/linux-6.14.4/Documentation/scsi/
Daic7xxx.rst1 .. SPDX-License-Identifier: GPL-2.0
5 Adaptec Aic7xxx Fast -> Ultra160 Family Manager Set v7.0
26 aic7770 10 EISA/VL 10MHz 16Bit 4 1
27 aic7850 10 PCI/32 10MHz 8Bit 3
28 aic7855 10 PCI/32 10MHz 8Bit 3
29 aic7856 10 PCI/32 10MHz 8Bit 3
30 aic7859 10 PCI/32 20MHz 8Bit 3
31 aic7860 10 PCI/32 20MHz 8Bit 3
32 aic7870 10 PCI/32 10MHz 16Bit 16
33 aic7880 10 PCI/32 20MHz 16Bit 16
[all …]
/linux-6.14.4/net/wireless/tests/
Dchan.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2023-2024 Intel Corporation
35 .desc = "identical non-HT",
44 .desc = "identical 20 MHz",
53 .desc = "identical 40 MHz",
62 .desc = "identical 80 MHz",
71 .desc = "identical 160 MHz",
80 .desc = "identical 320 MHz",
89 .desc = "20 MHz in 320 MHz\n",
103 .desc = "different 20 MHz",
[all …]
/linux-6.14.4/drivers/clk/qcom/
Dipq-cmn-pll.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * CMN PLL block expects the reference clock from on-board Wi-Fi block,
13 * On the IPQ9574 SoC, there are three clocks with 50 MHZ and one clock
14 * with 25 MHZ which are output from the CMN PLL to Ethernet PHY (or switch),
15 * and one clock with 353 MHZ to PPE. The other fixed rate output clocks
16 * are supplied to GCC (24 MHZ as XO and 32 KHZ as sleep clock), and to PCS
17 * with 31.25 MHZ.
19 * +---------+
21 * +--+---+--+
24 * +-------+---+------+
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/net/
Dti,dp83822.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Andrew Davis <[email protected]>
14 The DP83822 is a low-power, single-port, 10/100 Mbps Ethernet PHY. It
16 data over standard, twisted-pair cables or to connect to an external,
17 fiber-optic transceiver. Additionally, the DP83822 provides flexibility to
24 - $ref: ethernet-phy.yaml#
30 ti,link-loss-low:
39 ti,fiber-mode:
[all …]
Dnxp,tja11xx.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <[email protected]>
11 - Florian Fainelli <[email protected]>
12 - Heiner Kallweit <[email protected]>
20 - ethernet-phy-id0180.dc40
21 - ethernet-phy-id0180.dc41
22 - ethernet-phy-id0180.dc48
23 - ethernet-phy-id0180.dd00
[all …]
Dmicrel.txt7 - micrel,led-mode : LED mode value to set for PHYs with configurable LEDs.
23 - micrel,rmii-reference-clock-select-25-mhz: RMII Reference Clock Select
24 bit selects 25 MHz mode
26 Setting the RMII Reference Clock Select bit enables 25 MHz rather
27 than 50 MHz clock mode.
30 non-standard, inverted function of this configuration bit.
31 Specifically, a clock reference ("rmii-ref" below) is always needed to
34 - clocks, clock-names: contains clocks according to the common clock bindings.
37 - KSZ8021, KSZ8031, KSZ8081, KSZ8091: "rmii-ref": The RMII reference
40 - micrel,fiber-mode: If present the PHY is configured to operate in fiber mode
[all …]
/linux-6.14.4/drivers/phy/intel/
Dphy-intel-keembay-emmc.c1 // SPDX-License-Identifier: GPL-2.0-only
59 unsigned int mhz; in keembay_emmc_phy_power() local
66 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, PWR_DOWN_MASK, in keembay_emmc_phy_power()
69 dev_err(&phy->dev, "CALIO power down bar failed: %d\n", ret); in keembay_emmc_phy_power()
73 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, DLL_EN_MASK, in keembay_emmc_phy_power()
76 dev_err(&phy->dev, "turn off the dll failed: %d\n", ret); in keembay_emmc_phy_power()
84 mhz = DIV_ROUND_CLOSEST(clk_get_rate(priv->emmcclk), 1000000); in keembay_emmc_phy_power()
85 if (mhz <= 200 && mhz >= 170) in keembay_emmc_phy_power()
87 else if (mhz <= 170 && mhz >= 140) in keembay_emmc_phy_power()
89 else if (mhz <= 140 && mhz >= 110) in keembay_emmc_phy_power()
[all …]
/linux-6.14.4/arch/arm/mach-omap2/
Dopp2xxx.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * opp2xxx.h - macros for old-style OMAP2xxx "OPP" definitions
5 * Copyright (C) 2005-2009 Texas Instruments, Inc.
6 * Copyright (C) 2004-2009 Nokia Corporation
8 * Richard Woodruff <r-[email protected]>
34 * struct prcm_config - define clock rates on a per-OPP basis (24xx)
45 unsigned long dpll_speed; /* dpll: out*xtal*M/(N-1)table_recalc */
64 /*-------------------------------------------------------------------------
66 *-------------------------------------------------------------------------*/
68 /* 2430 Ratio's, 2430-Ratio Config 1 */
[all …]
/linux-6.14.4/drivers/clk/uniphier/
Dclk-uniphier-sys.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include "clk-uniphier.h"
12 UNIPHIER_CLK_FACTOR("sd-200m", -1, "spll", 1, 8), \
13 UNIPHIER_CLK_FACTOR("sd-133m", -1, "vpll27a", 1, 2)
16 UNIPHIER_CLK_FACTOR("sd-200m", -1, "spll", 1, 12), \
17 UNIPHIER_CLK_FACTOR("sd-133m", -1, "spll", 1, 18)
20 UNIPHIER_CLK_FACTOR("sd-200m", -1, "spll", 1, 10), \
21 UNIPHIER_CLK_FACTOR("sd-133m", -1, "spll", 1, 15)
24 UNIPHIER_CLK_FACTOR("sd-200m", -1, "spll", 1, 4), \
25 UNIPHIER_CLK_FACTOR("sd-133m", -1, "spll", 1, 6)
[all …]
/linux-6.14.4/Documentation/fb/
Dviafb.modes10 # 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock)
28 mode "640x480-60"
29 # D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz
31 timings 39722 48 16 33 10 96 2 endmode mode "480x640-60"
32 # D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz
35 # 640x480, 75 Hz, Non-Interlaced (31.50 MHz dotclock)
52 mode "640x480-75"
53 # D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz
56 # 640x480, 85 Hz, Non-Interlaced (36.000 MHz dotclock)
73 mode "640x480-85"
[all …]
/linux-6.14.4/drivers/net/wireless/intel/iwlwifi/mvm/
Drfi.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2020 - 2022 Intel Corporation
8 #include "fw/api/phy-ctxt.h"
11 * DDR needs frequency in units of 16.666MHz, so provide FW with the
15 /* frequency 2667MHz */
16 {cpu_to_le16(160), {50, 58, 60, 62, 64, 52, 54, 56},
20 /* frequency 2933MHz */
27 /* frequency 3200MHz */
32 /* frequency 3733MHz */
37 /* frequency 4000MHz */
[all …]
/linux-6.14.4/drivers/ata/
Dpata_ftide010.c1 // SPDX-License-Identifier: GPL-2.0-only
24 * struct ftide010 - state container for the Faraday FTIDE010
48 /* Gemini-specific properties */
79 /* 0 = 50 MHz, 1 = 66 MHz */
94 * reference clock which is 30 nanoseconds per unit at 66MHz and 20
95 * nanoseconds per unit at 50 MHz. The PIO timings assume 33MHz speed for
103 * word DMA, Mode 0, 1, and 2 at 50 MHz. Range 0..15.
105 * multi word DMA, Mode 0, 1 and 2 at 50 MHz. Range 0..15.
107 * word DMA, Mode 0, 1 and 2 at 66 MHz. Range 0..15.
109 * multi word DMA, Mode 0, 1 and 2 at 66 MHz. Range 0..15.
[all …]
Dpata_hpt37x.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org>
12 * Portions Copyright (C) 2005-2010 MontaVista Software, Inc.
200 * hpt37x_find_mode - reset the hpt37x bus
210 struct hpt_clock *clocks = ap->host->private_data; in hpt37x_find_mode()
212 while (clocks->xfer_speed) { in hpt37x_find_mode()
213 if (clocks->xfer_speed == speed) in hpt37x_find_mode()
214 return clocks->timing; in hpt37x_find_mode()
227 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num)); in hpt_dma_broken()
229 i = match_string(list, -1, model_num); in hpt_dma_broken()
[all …]
/linux-6.14.4/drivers/video/fbdev/
Dmacmodes.c2 * linux/drivers/video/macmodes.c -- Standard MacOS video modes
6 * 2000 - Removal of OpenFirmware dependencies by:
7 * - Ani Joshi
8 * - Brad Douglas <[email protected]>
10 * 2001 - Documented with DocBook
11 * - Brad Douglas <[email protected]>
36 /* 512x384, 60Hz, Non-Interlaced (15.67 MHz dot clock) */
40 /* 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) */
44 /* 640x480, 67Hz, Non-Interlaced (30.0 MHz dotclock) */
48 /* 640x870, 75Hz (portrait), Non-Interlaced (57.28 MHz dot clock) */
[all …]
/linux-6.14.4/drivers/net/wireless/intel/iwlwifi/mvm/tests/
Dlinks.c1 // SPDX-License-Identifier: GPL-2.0-only
80 .signal = -100,
89 .signal = -84,
98 .signal = -50,
107 .signal = -66,
117 .signal = -61,
123 ….desc = "UHB, BSS Load IE (40 percent), active link, chan_load_by_us=50 (invalid) percent. No punc…
128 .signal = -66,
130 .chan_load_by_us = 50,
133 { .desc = "HB, 80 MHz, no channel load factor, punctured percentage 0",
[all …]
/linux-6.14.4/drivers/gpu/drm/xe/
Dxe_vram_freq.c1 // SPDX-License-Identifier: MIT
20 * device/tile#/memory/freq0/max_freq - This is maximum frequency. This value is read-only as it
23 * device/tile#/memory/freq0/min_freq - This is minimum frequency. This value is read-only as it
30 return kobj_to_tile(dev->kobj.parent); in dev_to_tile()
48 /* data_out - Fused P0 for domain ID in units of 50 MHz */ in max_freq_show()
49 val *= 50; in max_freq_show()
70 /* data_out - Fused Pn for domain ID in units of 50 MHz */ in min_freq_show()
71 val *= 50; in min_freq_show()
97 * xe_vram_freq_sysfs_init - Initialize vram frequency sysfs component
110 if (xe->info.platform != XE_PVC) in xe_vram_freq_sysfs_init()
[all …]
/linux-6.14.4/arch/arm/mach-pxa/
Dsleep.S2 * Low-level PXA250/210 sleep/wakeUp support
17 #include "pxa2xx-regs.h"
28 * pxa3xx_finish_suspend() - forces CPU into sleep state (S2D3C4)
59 @ enable SDRAM self-refresh mode
62 @ set SDCLKx divide-by-2 bits (this is part of a workaround for Errata 50)
67 @ with core operating above 91 MHz
68 @ (see Errata 50, ...processor does not exit from sleep...)
100 @ enable SDRAM self-refresh mode
104 @ about suspending with PXBus operating above 133MHz
107 @ We keep the change-down close to the actual suspend on SDRAM
[all …]
/linux-6.14.4/drivers/cpufreq/
Ds5pv210-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
87 /* APLL M,P,S values for 1G/800Mhz */
91 /* Use 800MHz when entering sleep mode */
238 ret = -EINVAL; in s5pv210_target()
242 old_freq = policy->cur; in s5pv210_target()
275 * expected clock is 83Mhz : 7.8usec/(1/83Mhz) = 0x287 in s5pv210_target()
287 * APLL -> MPLL(for stable transition) -> APLL in s5pv210_target()
294 * SCLKA2M(200/1=200)->(200/4=50)Mhz in s5pv210_target()
308 * 2. Change SCLKA2M(200Mhz)to SCLKMPLL in MFC_MUX, G3D MUX in s5pv210_target()
309 * (200/4=50)->(667/4=166)Mhz in s5pv210_target()
[all …]
Dpxa2xx-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * 31-Jul-2002 : Initial version [FB]
7 * 29-Jan-2003 : added PXA255 support [FB]
8 * 20-Apr-2003 : ported to v2.5 (Dustin McIntire, Sensoria Corp.)
42 MODULE_PARM_DESC(pxa27x_maxfreq, "Set the pxa27x maxfreq in MHz"
62 { 99500, -1, -1}, /* 99, 99, 50, 50 */
63 {132700, -1, -1}, /* 133, 133, 66, 66 */
64 {199100, -1, -1}, /* 199, 199, 99, 99 */
65 {265400, -1, -1}, /* 265, 265, 133, 66 */
66 {331800, -1, -1}, /* 331, 331, 166, 83 */
[all …]
/linux-6.14.4/Documentation/admin-guide/media/
Dvivid.rst1 .. SPDX-License-Identifier: GPL-2.0
13 Each input can be a webcam, TV capture device, S-Video capture device or an HDMI
14 capture device. Each output can be an S-Video output device or an HDMI output
23 - Support for read()/write(), MMAP, USERPTR and DMABUF streaming I/O.
24 - A large list of test patterns and variations thereof
25 - Working brightness, contrast, saturation and hue controls
26 - Support for the alpha color component
27 - Full colorspace support, including limited/full RGB range
28 - All possible control types are present
29 - Support for various pixel aspect ratios and video aspect ratios
[all …]
/linux-6.14.4/drivers/media/pci/mantis/
Dmantis_vp3030.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 Mantis VP-3030 driver
31 .name = "ENV57H12D5 (ET-50DT)",
33 .frequency_min = 47 * MHz,
34 .frequency_max = 862 * MHz,
36 .ref_multiplier = 6, /* 1/6 MHz */
37 .ref_divider = 100000, /* 1/6 MHz */
40 #define MANTIS_MODEL_NAME "VP-3030"
41 #define MANTIS_DEV_TYPE "DVB-T"
46 struct i2c_adapter *adapter = &mantis->adapter; in vp3030_frontend_init()
[all …]
/linux-6.14.4/drivers/media/tuners/
Dtea5767.c1 // SPDX-License-Identifier: GPL-2.0
16 #include "tuner-i2c.h"
40 /* Bits 0-5 for divider MSB */
43 /* Bits 0-7 for divider LSB */
59 /* if on, div=4*(Frf+Fif)/Fref otherwise, div=4*(Frf-Fif)/Freq) */
78 /* Japan freq (76-108 MHz. If disabled, 87.5-108 MHz */
81 /* Unselected means 32.768 KHz freq as reference. Otherwise Xtal at 13 MHz */
98 /* By activating, it will use Xtal at 13 MHz as reference for divider */
101 /* By activating, deemphasis=50, or else, deemphasis of 50us */
111 /* Bits 0-5 for divider MSB after search or preset */
[all …]

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