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/linux-6.14.4/arch/arm/boot/dts/arm/
Dvexpress-v2p-ca15-tc1.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Cortex-A15 MPCore (V2P-CA15)
8 * HBI-0237A
11 /dts-v1/;
12 #include "vexpress-v2m-rs1.dtsi"
15 model = "V2P-CA15";
18 compatible = "arm,vexpress,v2p-ca15,tc1", "arm,vexpress,v2p-ca15", "arm,vexpress";
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
[all …]
/linux-6.14.4/drivers/phy/broadcom/
Dphy-bcm-sr-pcie.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016-2018 Broadcom
18 #define SR_PAXC_PHY_IDX (SR_NR_PCIE_PHYS - 1)
40 * struct sr_pcie_phy - Stingray PCIe PHY
53 * struct sr_pcie_phy_core - Stingray PCIe PHY core control
83 /* PIPEMUX = 2, EP 4x4 */
85 /* PIPEMUX = 3, RC 2x8, cores 0, 7 */
87 /* PIPEMUX = 4, RC 4x4, cores 0, 1, 6, 7 */
89 /* PIPEMUX = 5, RC 8x2, all 8 cores */
91 /* PIPEMUX = 6, RC 3x4 + 2x2, cores 0, 2, 3, 6, 7 */
[all …]
/linux-6.14.4/tools/perf/pmu-events/arch/x86/jaketown/
Duncore-power.json88 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
97 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
106 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
115 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
124 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
133 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
142 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
151 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
160 …can use all four counters with this event, so it is possible to track up to 4 configurable bands. …
169 …can use all four counters with this event, so it is possible to track up to 4 configurable bands. …
[all …]
/linux-6.14.4/tools/perf/pmu-events/arch/x86/ivytown/
Duncore-power.json92 "BriefDescription": "Core 4 C State Transition Cycles",
146 "BriefDescription": "Deep C State Rejection - Core 0",
155 "BriefDescription": "Deep C State Rejection - Core 1",
164 "BriefDescription": "Deep C State Rejection - Core 10",
173 "BriefDescription": "Deep C State Rejection - Core 11",
182 "BriefDescription": "Deep C State Rejection - Core 12",
191 "BriefDescription": "Deep C State Rejection - Core 13",
200 "BriefDescription": "Deep C State Rejection - Core 14",
209 "BriefDescription": "Deep C State Rejection - Core 2",
218 "BriefDescription": "Deep C State Rejection - Core 3",
[all …]
/linux-6.14.4/tools/perf/pmu-events/arch/x86/haswellx/
Duncore-power.json178 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
187 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
196 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
205 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
214 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
223 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
232 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
241 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
250 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
259 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
[all …]
/linux-6.14.4/drivers/crypto/cavium/cpt/
Dcptpf_main.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #define DRV_NAME "thunder-cpt"
19 static u32 num_vfs = 4; /* Default 4 VF enabled */
21 MODULE_PARM_DESC(num_vfs, "Number of VFs to enable(1-16)");
24 * Disable cores specified by coremask
32 struct device *dev = &cpt->pdev->dev; in cpt_disable_cores()
35 coremask = (coremask << cpt->max_se_cores); in cpt_disable_cores()
37 /* Disengage the cores from groups */ in cpt_disable_cores()
38 grpmask = cpt_read_csr64(cpt->reg_base, CPTX_PF_GX_EN(0, grp)); in cpt_disable_cores()
39 cpt_write_csr64(cpt->reg_base, CPTX_PF_GX_EN(0, grp), in cpt_disable_cores()
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/arm/
Darm,vexpress-juno.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,vexpress-juno.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sudeep Holla <[email protected]>
11 - Linus Walleij <[email protected]>
15 multicore Cortex-A class systems. The Versatile Express family contains both
37 further subvariants are released of the core tile, even more fine-granular
45 - description: CoreTile Express A9x4 (V2P-CA9) has 4 Cortex A9 CPU cores
49 - const: arm,vexpress,v2p-ca9
[all …]
/linux-6.14.4/tools/power/cpupower/man/
Dcpupower-set.11 .TH CPUPOWER\-SET "1" "22/02/2011" "" "cpupower Manual"
3 cpupower\-set \- Set processor power related kernel or hardware configurations
6 .B cpupower set [ \-b VAL | \-e POLICY | \-m MODE | \-t BOOL ]
13 Some options are platform wide, some affect single cores. By default values
14 are applied on all cores. How to modify single core configurations is
15 described in the cpupower(1) manpage in the \-\-cpu option section. Whether an
16 option affects the whole system or can be applied to individual cores is
24 \-\-perf-bias, \-b
25 .RS 4
30 The range of valid numbers is 0-15, where 0 is maximum
[all …]
Dcpupower.13 cpupower \- Shows and sets processor power related values
6 .B cpupower [ \-c cpulist ] <command> [ARGS]
8 .B cpupower \-v|\-\-version
10 .B cpupower \-h|\-\-help
16 The manpages of the commands (cpupower\-<command>(1)) provide detailed
22 \-\-help, \-h
23 .RS 4
27 \-\-cpu cpulist, \-c cpulist
28 .RS 4
29 Only show or set values for specific cores.
[all …]
Dcpupower-idle-set.11 .TH "CPUPOWER-IDLE-SET" "1" "0.1" "" "cpupower Manual"
4 cpupower\-idle\-set \- Utility to set cpu idle state specific kernel options
7 cpupower [ \-c cpulist ] idle\-set [\fIoptions\fP]
10 The cpupower idle\-set subcommand allows to set cpu idle, also called cpu
16 \fB\-d\fR \fB\-\-disable\fR <STATE_NO>
19 \fB\-e\fR \fB\-\-enable\fR <STATE_NO>
22 \fB\-D\fR \fB\-\-disable-by-latency\fR <LATENCY>
27 \fB\-E\fR \fB\-\-enable-all\fR
34 .RS 4
52 .RS 4
[all …]
Dcpupower-monitor.11 .TH CPUPOWER\-MONITOR "1" "22/02/2011" "" "cpupower Manual"
3 cpupower\-monitor \- Report processor frequency and idle statistics
7 .RB "\-l"
10 .RB [ -c ] [ "\-m <mon1>," [ "<mon2>,..." ] ]
11 .RB [ "\-i seconds" ]
14 .RB [ -c ][ "\-m <mon1>," [ "<mon2>,..." ] ]
18 \fBcpupower-monitor \fP reports processor topology, frequency and idle power
22 \fBcpupower-monitor \fP implements independent processor sleep state and
24 directly reading out hardware registers. Use \-l to get an overview which are
29 \-l
[all …]
/linux-6.14.4/arch/arc/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
90 source "arch/arc/plat-tb10x/Kconfig"
91 source "arch/arc/plat-axs10x/Kconfig"
92 source "arch/arc/plat-hsdk/Kconfig"
104 The original ARC ISA of ARC600/700 cores
110 ISA for the Next Generation ARC-HS cores
128 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
130 -Caches: New Prog Model, Region Flush
131 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
[all …]
/linux-6.14.4/drivers/net/can/esd/
Desd_402_pci-core.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (C) 2015 - 2016 Thomas Körper, esd electronic system design gmbh
3 * Copyright (C) 2017 - 2023 Stefan Mätje, esd electronics gmbh
10 #include <linux/dma-mapping.h>
50 struct acc_core *cores; member
59 /* Used if the esdACC FPGA is built as CAN-Classic version. */
66 .sjw_max = 4,
72 /* Used if the esdACC FPGA is built as CAN-FD version. */
103 irq_status = acc_card_interrupt(&card->ov, card->cores); in pci402_interrupt()
118 /* The FPGA hard IP PCIe core implements a 64-bit MSI Capability in pci402_set_msiconfig()
[all …]
/linux-6.14.4/tools/perf/pmu-events/arch/x86/icelakex/
Duncore-cache.json135 "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 4",
141 …"PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgress 4 : Number of CMS Agent 0 AD…
256 "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 4",
262 …"PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 4 : Number of CMS Agent 0 A…
377 "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 4",
383 …"PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgress 4 : Number of CMS Agent 0 BL…
498 "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 4",
504 …"PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 4 : Number of CMS Agent 0 B…
619 "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 4",
625 …"PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgress 4 : Number of CMS Agent 1 AD…
[all …]
/linux-6.14.4/drivers/net/wireless/intel/iwlwifi/tests/
Ddevinfo.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
5 * Copyright (C) 2023-2024 Intel Corporation
9 #include "iwl-drv.h"
10 #include "iwl-config.h"
16 …printk(KERN_DEBUG "%sdev=%.4x,subdev=%.4x,mac_type=%.4x,mac_step=%.4x,rf_type=%.4x,cdb=%d,jacket=%… in iwl_pci_print_dev_info()
17 pfx, di->device, di->subdevice, di->mac_type, di->mac_step, in iwl_pci_print_dev_info()
18 di->rf_type, di->cdb, di->jacket, di->rf_id, di->no_160, in iwl_pci_print_dev_info()
19 di->cores); in iwl_pci_print_dev_info()
30 ret = iwl_pci_find_dev_info(di->device, di->subdevice, in devinfo_table_order()
31 di->mac_type, di->mac_step, in devinfo_table_order()
[all …]
/linux-6.14.4/drivers/soc/tegra/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
4 # 32-bit ARM SoCs
63 # 64-bit ARM SoCs
75 Tegra124's "4+1" Cortex-A15 CPU complex.
85 the Tegra210 has four Cortex-A57 cores paired with four Cortex-A53
86 cores in a switched configuration. It features a GPU of the Maxwell
88 and providing 256 CUDA cores. It supports hardware-accelerated en-
90 VP8 at 4K resolution and up to 60 fps.
106 combination of Denver and Cortex-A57 CPU cores and a GPU based on
107 the Pascal architecture. It contains an ADSP with a Cortex-A9 CPU
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/bus/
Dbrcm,bus-axi.txt5 - compatible : brcm,bus-axi
7 - reg : iomem address range of chipcommon core
9 The cores on the AXI bus are automatically detected by bcma with the
12 BCM47xx/BCM53xx ARM SoCs. To assign IRQ numbers to the cores, provide
13 them manually through device tree. Use an interrupt-map to specify the
17 The top-level axi bus may contain children representing attached cores
19 detected (e.g. IRQ numbers). Also some of the cores may be responsible
25 compatible = "brcm,bus-axi";
28 #address-cells = <1>;
29 #size-cells = <1>;
[all …]
/linux-6.14.4/Documentation/arch/x86/
Dtopology.rst1 .. SPDX-License-Identifier: GPL-2.0
11 The architecture-agnostic topology definitions are in
12 Documentation/admin-guide/cputopology.rst. This file holds x86-specific
17 Needless to say, code should use the generic functions - this file is *only*
24 threads, cores, packages, etc.
35 - packages
36 - cores
37 - threads
41 Packages contain a number of cores plus shared resources, e.g. DRAM
48 Package-related topology information in the kernel:
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/linux-6.14.4/Documentation/admin-guide/device-mapper/
Dunstriped.rst2 Device-mapper "unstriped" target
8 The device-mapper "unstriped" target provides a transparent mechanism to
9 unstripe a device-mapper "striped" target to access the underlying disks
10 without having to touch the true backing block-device. It can also be
11 used to unstripe a hardware RAID-0 to access backing disks.
33 An example of undoing an existing dm-stripe
34 -------------------------------------------
36 This small bash script will setup 4 loop devices and use the existing
37 striped target to combine the 4 devices into one. It then will use
46 NUM=4
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/remoteproc/
Dti,pru-consumer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,pru-consumer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-[email protected]>
25 $ref: /schemas/types.yaml#/definitions/phandle-array
32 firmware-name:
33 $ref: /schemas/types.yaml#/definitions/string-array
37 firmwares for the PRU cores, the default firmware for the core from
39 correspond to the PRU cores listed in the 'ti,prus' property
[all …]
/linux-6.14.4/arch/x86/kernel/cpu/
Dtopology_common.c1 // SPDX-License-Identifier: GPL-2.0
6 #include <asm/intel-family.h>
26 tscan->dom_shifts[dom] = tscan->dom_shifts[dom - 1]; in topology_set_dom()
27 tscan->dom_ncpus[dom] = tscan->dom_ncpus[dom - 1]; in topology_set_dom()
33 if (c->x86_vendor == X86_VENDOR_INTEL) { in get_topology_cpu_type()
34 switch (c->topo.intel_type) { in get_topology_cpu_type()
39 if (c->x86_vendor == X86_VENDOR_AMD) { in get_topology_cpu_type()
40 switch (c->topo.amd_type) { in get_topology_cpu_type()
69 if (c->cpuid_level < 4) in parse_num_cores_legacy()
72 cpuid_subleaf_reg(4, 0, CPUID_EAX, &eax); in parse_num_cores_legacy()
[all …]
/linux-6.14.4/Documentation/admin-guide/pm/
Dintel-speed-select.rst1 .. SPDX-License-Identifier: GPL-2.0
14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic…
15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha…
19 dynamically without pre-configuring via BIOS setup options. This dynamic
29 intel-speed-select configuration tool
32 Most Linux distribution packages may include the "intel-speed-select" tool. If not,
38 # cd tools/power/x86/intel-speed-select/
43 ------------
47 # intel-speed-select --help
49 The top-level help describes arguments and features. Notice that there is a
[all …]
/linux-6.14.4/tools/perf/pmu-events/arch/x86/snowridgex/
Duncore-cache.json47 "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 4",
53 …"PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgress 4 : Number of CMS Agent 0 AD…
168 "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 4",
174 …"PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 4 : Number of CMS Agent 0 A…
289 "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 4",
295 …"PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgress 4 : Number of CMS Agent 0 BL…
410 "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 4",
416 …"PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 4 : Number of CMS Agent 0 B…
531 "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 4",
537 …"PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgress 4 : Number of CMS Agent 1 AD…
[all …]
/linux-6.14.4/arch/s390/kernel/
Dhiperdispatch.c1 // SPDX-License-Identifier: GPL-2.0
11 * Dynamically calculates the optimum number of high capacity COREs
14 * During topology updates the CPU capacities are always re-adjusted.
18 * -> hiperdispatch's reoccuring work function reads CPU capacities to
20 * -> during a topology update hiperdispatch's adjustment function
37 * - single CORE, with N threads, running N tasks
38 * - N separate COREs running N tasks,
39 * using individual COREs for individual tasks yield better
43 * Hiperdispatch tries to hint scheduler to use individual COREs for
44 * each task, as long as steal time on those COREs are less than 30%,
[all …]
/linux-6.14.4/drivers/gpu/drm/imagination/
Dpvr_rogue_defs.h1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
84 * the number of clusters by 4 and round up
86 #define ROGUE_REQ_NUM_PHANTOMS(CLUSTERS) (((CLUSTERS) + 3U) / 4U)
87 #define ROGUE_REQ_NUM_BERNADOS(CLUSTERS) (((CLUSTERS) + 3U) / 4U)
88 #define ROGUE_REQ_NUM_BLACKPEARLS(CLUSTERS) (((CLUSTERS) + 3U) / 4U)
101 (n) * (ROGUE_CR_BIF_CAT_BASE1 - ROGUE_CR_BIF_CAT_BASE0))
105 (n) * (ROGUE_CR_FWCORE_MEM_CAT_BASE1 - \
120 #define ROGUE_CSRM_LINE_SIZE_IN_DWORDS (64 * 4 * 4)
127 * (in dwords/32-bit registers).
143 /* for nohw multicore return max cores possible to client */
[all …]

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