/linux-6.14.4/scripts/gdb/linux/ |
D | pgtable.py | 1 # SPDX-License-Identifier: GPL-2.0-only 44 return (bit_start, bit_end), data >> bit_start & ((1 << (1 + bit_end - bit_start)) - 1) 53 return 30 80 {'cr3 binary data': <30} {hex(self.cr3)} 81 {'next entry physical address': <30} {hex(self.next_entry_physical_address)} 82 --- 83 …{'bit' : <4} {self.page_level_write_through[0]: <10} {'page level write through': <30} {self.page_… 84 …{'bit' : <4} {self.page_level_cache_disabled[0]: <10} {'page level cache disabled': <30} {self.pag… 140 next_level = self.page_hierarchy_level - 1 148 {'entry address': <30} {hex(self.address)} [all …]
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/linux-6.14.4/arch/alpha/lib/ |
D | divide.S | 1 /* SPDX-License-Identifier: GPL-2.0 */ 14 * __divqu: 64-bit unsigned long divide 15 * __remqu: 64-bit unsigned long remainder 16 * __divqs/__remqs: signed 64-bit 17 * __divlu/__remlu: unsigned 32-bit 18 * __divls/__remls: signed 32-bit 27 * This is a rather simple bit-at-a-time algorithm: it's very good 28 * at dividing random 64-bit numbers, but the more usual case where 37 * $0 - current bit 38 * $1 - shifted divisor [all …]
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D | ev6-divide.S | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * arch/alpha/lib/ev6-divide.S 5 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com> 14 * __divqu: 64-bit unsigned long divide 15 * __remqu: 64-bit unsigned long remainder 16 * __divqs/__remqs: signed 64-bit 17 * __divlu/__remlu: unsigned 32-bit 18 * __divls/__remls: signed 32-bit 27 * This is a rather simple bit-at-a-time algorithm: it's very good 28 * at dividing random 64-bit numbers, but the more usual case where [all …]
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/linux-6.14.4/drivers/net/wireless/mediatek/mt76/ |
D | mt76_connac2_mac.h | 1 /* SPDX-License-Identifier: ISC */ 45 #define MT_TX_FREE_MSDU_ID GENMASK(30, 16) 46 #define MT_TX_FREE_PAIR BIT(31) 55 #define MT_TXD1_LONG_FORMAT BIT(31) 56 #define MT_TXD1_TGID BIT(30) 58 #define MT_TXD1_AMSDU BIT(23) 63 #define MT_TXD1_ETH_802_3 BIT(15) 64 #define MT_TXD1_VTA BIT(10) 67 #define MT_TXD2_FIX_RATE BIT(31) 68 #define MT_TXD2_FIXED_RATE BIT(30) [all …]
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D | mt76_connac3_mac.h | 1 /* SPDX-License-Identifier: ISC */ 28 #define MT_RXD0_MESH BIT(18) 29 #define MT_RXD0_MHCP BIT(19) 38 #define MT_RXD1_NORMAL_GROUP_1 BIT(16) 39 #define MT_RXD1_NORMAL_GROUP_2 BIT(17) 40 #define MT_RXD1_NORMAL_GROUP_3 BIT(18) 41 #define MT_RXD1_NORMAL_GROUP_4 BIT(19) 42 #define MT_RXD1_NORMAL_GROUP_5 BIT(20) 44 #define MT_RXD1_NORMAL_CM BIT(23) 45 #define MT_RXD1_NORMAL_CLM BIT(24) [all …]
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D | mt76x02_dma.h | 1 /* SPDX-License-Identifier: ISC */ 13 #define MT_TXD_INFO_NEXT_VLD BIT(16) 14 #define MT_TXD_INFO_TX_BURST BIT(17) 15 #define MT_TXD_INFO_80211 BIT(19) 16 #define MT_TXD_INFO_TSO BIT(20) 17 #define MT_TXD_INFO_CSO BIT(21) 18 #define MT_TXD_INFO_WIV BIT(24) 21 #define MT_TXD_INFO_TYPE GENMASK(31, 30) 24 #define MT_RX_FCE_INFO_SELF_GEN BIT(15) 27 #define MT_RX_FCE_INFO_PCIE_INTR BIT(24) [all …]
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/linux-6.14.4/drivers/net/ethernet/intel/ice/ |
D | ice_hw_autogen.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018-2023, Intel Corporation. */ 4 /* Machine-generated file */ 27 #define PF_FW_ARQLEN_ARQVFE_M BIT(28) 28 #define PF_FW_ARQLEN_ARQOVFL_M BIT(29) 29 #define PF_FW_ARQLEN_ARQCRIT_M BIT(30) 30 #define PF_FW_ARQLEN_ARQENABLE_M BIT(31) 38 #define PF_FW_ATQLEN_ATQVFE_M BIT(28) 39 #define PF_FW_ATQLEN_ATQOVFL_M BIT(29) 40 #define PF_FW_ATQLEN_ATQCRIT_M BIT(30) [all …]
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/linux-6.14.4/drivers/net/wireless/realtek/rtw88/ |
D | rtw8821a_table.c | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 1380 { 0, 0, 0, 1, 1, 30, }, 1381 { 2, 0, 0, 1, 1, 30, }, 1383 { 0, 0, 0, 1, 2, 30, }, 1404 { 0, 0, 0, 1, 9, 30, }, 1407 { 0, 0, 0, 1, 10, 30, }, 1410 { 0, 0, 0, 1, 11, 30, }, 1417 { 2, 0, 0, 1, 13, 30, }, 1464 { 0, 0, 0, 3, 1, 30, }, 1494 { 0, 0, 0, 3, 11, 30, }, [all …]
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/linux-6.14.4/drivers/hid/intel-thc-hid/intel-thc/ |
D | intel-thc-hw.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 240 #define TXN_ERR_INT_STS_BIT BIT(28) 241 #define TXN_FATAL_INT_STS_BIT BIT(30) 243 #define NONDMA_INT_STS_BIT BIT(4) 244 #define EOF_INT_STS_BIT BIT(5) 249 #define THC_CFG_STS_CMD_IOSE BIT(0) 250 #define THC_CFG_STS_CMD_MSE BIT(1) 251 #define THC_CFG_STS_CMD_BME BIT(2) 252 #define THC_CFG_STS_CMD_SPCYC BIT(3) 253 #define THC_CFG_STS_CMD_MWRIEN BIT(4) [all …]
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/linux-6.14.4/drivers/net/wireless/mediatek/mt76/mt7615/ |
D | mac.h | 1 /* SPDX-License-Identifier: ISC */ 15 #define MT_RXD0_NORMAL_IP_SUM BIT(23) 16 #define MT_RXD0_NORMAL_UDP_TCP_SUM BIT(24) 17 #define MT_RXD0_NORMAL_GROUP_1 BIT(25) 18 #define MT_RXD0_NORMAL_GROUP_2 BIT(26) 19 #define MT_RXD0_NORMAL_GROUP_3 BIT(27) 20 #define MT_RXD0_NORMAL_GROUP_4 BIT(28) 25 #define MT_RXD1_MID_AMSDU_FRAME BIT(1) 26 #define MT_RXD1_LAST_AMSDU_FRAME BIT(0) 27 #define MT_RXD1_NORMAL_HDR_TRANS BIT(23) [all …]
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/linux-6.14.4/drivers/net/wireless/realtek/rtw89/ |
D | txrx.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 28 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_rate_mode() 41 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_ht_mcs() 49 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_mcs() 62 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_nss() 71 #define RTW89_TXWD_BODY0_MORE_DATA BIT(23) 72 #define RTW89_TXWD_BODY0_WD_INFO_EN BIT(22) 73 #define RTW89_TXWD_BODY0_FW_DL BIT(20) 76 #define RTW89_TXWD_BODY0_WD_PAGE BIT(7) 77 #define RTW89_TXWD_BODY0_HW_AMSDU BIT(5) [all …]
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/linux-6.14.4/drivers/net/ethernet/stmicro/stmmac/ |
D | dwmac4_descs.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 26 #define TDES3_IVLTV BIT(17) 27 #define TDES2_TIMESTAMP_ENABLE BIT(30) 30 #define TDES2_INTERRUPT_ON_COMPLETION BIT(31) 35 #define TDES3_VLTV BIT(16) 39 #define TDES3_TCP_SEGMENTATION_ENABLE BIT(18) 47 #define TDES3_IP_HDR_ERROR BIT(0) 48 #define TDES3_DEFERRED BIT(1) 49 #define TDES3_UNDERFLOW_ERROR BIT(2) 50 #define TDES3_EXCESSIVE_DEFERRAL BIT(3) [all …]
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/linux-6.14.4/drivers/net/wireless/mediatek/mt76/mt7603/ |
D | mac.h | 1 /* SPDX-License-Identifier: ISC */ 10 #define MT_RXD0_NORMAL_IP_SUM BIT(23) 11 #define MT_RXD0_NORMAL_UDP_TCP_SUM BIT(24) 12 #define MT_RXD0_NORMAL_GROUP_1 BIT(25) 13 #define MT_RXD0_NORMAL_GROUP_2 BIT(26) 14 #define MT_RXD0_NORMAL_GROUP_3 BIT(27) 15 #define MT_RXD0_NORMAL_GROUP_4 BIT(28) 29 #define MT_RXD1_NORMAL_HDR_TRANS BIT(23) 30 #define MT_RXD1_NORMAL_HDR_OFFSET BIT(22) 34 #define MT_RXD1_NORMAL_BEACON_UC BIT(5) [all …]
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D | regs.h | 1 /* SPDX-License-Identifier: ISC */ 28 #define MT_INT_RX_DONE(_n) BIT(_n) 31 #define MT_INT_TX_DONE(_n) BIT((_n) + 4) 33 #define MT_INT_RX_COHERENT BIT(20) 34 #define MT_INT_TX_COHERENT BIT(21) 35 #define MT_INT_MAC_IRQ3 BIT(27) 37 #define MT_INT_MCU_CMD BIT(30) 40 #define MT_WPDMA_GLO_CFG_TX_DMA_EN BIT(0) 41 #define MT_WPDMA_GLO_CFG_TX_DMA_BUSY BIT(1) 42 #define MT_WPDMA_GLO_CFG_RX_DMA_EN BIT(2) [all …]
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/linux-6.14.4/drivers/media/platform/samsung/s3c-camif/ |
D | camif-regs.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 14 #include "camif-core.h" 15 #include <media/drv-intf/s3c_camif.h> 19 * id = 0 - codec (FIMC C), 1 - preview (FIMC P). 24 #define CISRCFMT_ITU601_8BIT BIT(31) 35 #define CIWDOFST_WINOFSEN BIT(31) 36 #define CIWDOFST_CLROVCOFIY BIT(30) 37 #define CIWDOFST_CLROVRLB_PR BIT(28) 38 /* #define CIWDOFST_CLROVPRFIY BIT(27) */ 39 #define CIWDOFST_CLROVCOFICB BIT(15) [all …]
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/linux-6.14.4/arch/parisc/math-emu/ |
D | fcnvxf.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Linux/PA-RISC Project (http://www.parisc-linux.org/) 5 * Floating-point emulation code 6 * Copyright (C) 2001 Hewlett-Packard (Paul Bame) <[email protected]> 15 * Single Fixed-point to Single Floating-point 16 * Single Fixed-point to Double Floating-point 17 * Double Fixed-point to Single Floating-point 18 * Double Fixed-point to Double Floating-point 41 * Convert single fixed-point to single floating-point format 56 * set sign bit of result and get magnitude of source in sgl_to_sgl_fcnvxf() [all …]
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D | fcnvuf.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Linux/PA-RISC Project (http://www.parisc-linux.org/) 5 * Floating-point emulation code 6 * Copyright (C) 2001 Hewlett-Packard (Paul Bame) <[email protected]> 15 * Fixed point to Floating-point Converts 38 * Fixed point to Floating-point Converts * 42 * Convert Single Unsigned Fixed to Single Floating-point format 68 * Check word for most significant bit set. Returns in sgl_to_sgl_fcnvuf() 69 * a value in dst_exponent indicating the bit position, in sgl_to_sgl_fcnvuf() 70 * between -1 and 30. in sgl_to_sgl_fcnvuf() [all …]
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/linux-6.14.4/drivers/net/ethernet/amazon/ena/ |
D | ena_eth_io_defs.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ 3 * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved. 24 /* 15:0 : length - Buffer length in bytes, must 26 * to update like End-to-End CRC, Authentication GMAC 29 * the 4-byte added in the end for 802.3 Ethernet FCS 30 * 21:16 : req_id_hi - Request ID[15:10] 31 * 22 : reserved22 - MBZ 32 * 23 : meta_desc - MBZ 34 * 25 : reserved1 - MBZ 35 * 26 : first - Indicates first descriptor in [all …]
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/linux-6.14.4/Documentation/ABI/stable/ |
D | sysfs-hypervisor-xen | 3 KernelVersion: 2.6.30 4 Contact: xen-[email protected] 12 KernelVersion: 2.6.30 13 Contact: xen-[email protected] 21 KernelVersion: 2.6.30 22 Contact: xen-[email protected] 30 KernelVersion: 2.6.30 31 Contact: xen-[email protected] 34 is in the format: <class>-<major>.<minor>-<arch> 38 <class>: "xen" -- x86: paravirtualized, arm: standard [all …]
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/linux-6.14.4/drivers/net/ipa/reg/ |
D | ipa_reg-v5.0.c | 1 // SPDX-License-Identifier: GPL-2.0 3 /* Copyright (C) 2023-2024 Linaro Ltd. */ 22 [RAM_ARB_PRI_CLIENT_SAMP_FIX_DIS] = BIT(0), 23 [GSI_SNOC_BYPASS_DIS] = BIT(1), 24 [GEN_QMB_0_SNOC_BYPASS_DIS] = BIT(2), 25 [GEN_QMB_1_SNOC_BYPASS_DIS] = BIT(3), 26 /* Bit 4 reserved */ 27 [IPA_QMB_SELECT_CONS_EN] = BIT(5), 28 [IPA_QMB_SELECT_PROD_EN] = BIT(6), 29 [GSI_MULTI_INORDER_RD_DIS] = BIT(7), [all …]
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D | ipa_reg-v5.5.c | 1 // SPDX-License-Identifier: GPL-2.0 3 /* Copyright (C) 2023-2024 Linaro Ltd. */ 22 [RAM_ARB_PRI_CLIENT_SAMP_FIX_DIS] = BIT(0), 23 [GSI_SNOC_BYPASS_DIS] = BIT(1), 24 [GEN_QMB_0_SNOC_BYPASS_DIS] = BIT(2), 25 [GEN_QMB_1_SNOC_BYPASS_DIS] = BIT(3), 26 /* Bit 4 reserved */ 27 [IPA_QMB_SELECT_CONS_EN] = BIT(5), 28 [IPA_QMB_SELECT_PROD_EN] = BIT(6), 29 [GSI_MULTI_INORDER_RD_DIS] = BIT(7), [all …]
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/linux-6.14.4/drivers/media/pci/zoran/ |
D | zr36057.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * zr36057.h - zr36057 register offsets 14 #define ZR36057_VFEHCR_HS_POL BIT(30) 20 #define ZR36057_VFEVCR_VS_POL BIT(30) 26 #define ZR36057_VFESPFR_EXT_FL BIT(26) 27 #define ZR36057_VFESPFR_TOP_FIELD BIT(25) 28 #define ZR36057_VFESPFR_VCLK_POL BIT(24) 37 #define ZR36057_VFESPFR_ERR_DIF BIT(2) 38 #define ZR36057_VFESPFR_PACK24 BIT(1) 39 #define ZR36057_VFESPFR_LITTLE_ENDIAN BIT(0) [all …]
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/linux-6.14.4/arch/parisc/kernel/ |
D | syscall.S | 2 * Linux/PA-RISC Project (http://www.parisc-linux.org/) 12 How does the Linux gateway page on PA-RISC work? 13 ------------------------------------------------ 14 The Linux gateway page on PA-RISC is "special". 27 executed atomically (because the kernel can't be pre-empted) and they may 33 #include <asm/asm-offsets.h> 66 ldo -1(\reg1), \reg1 102 /* Light-weight-syscall entry must always be located at 0xb0 */ 138 /* Store W bit on entry to the syscall in case it's a wide userland 142 /* sp must be aligned on 4, so deposit the W bit setting into [all …]
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/linux-6.14.4/drivers/gpu/drm/vc4/ |
D | vc4_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Copyright © 2014-2015 Broadcom 24 WARN_ON(!FIELD_FIT(hvs->vc4->gen == VC4_GEN_6_C ? \ 27 FIELD_PREP(hvs->vc4->gen == VC4_GEN_6_C ? \ 32 #define VC6_GET_FIELD(word, field) FIELD_GET(hvs->vc4->gen == VC4_GEN_6_C ? \ 61 # define V3D_L2CACTL_L2CCLR BIT(2) 62 # define V3D_L2CACTL_L2CDIS BIT(1) 63 # define V3D_L2CACTL_L2CENA BIT(0) 78 # define V3D_INT_SPILLUSE BIT(3) 79 # define V3D_INT_OUTOMEM BIT(2) [all …]
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/linux-6.14.4/sound/soc/mediatek/mt8186/ |
D | mt8186-reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 3 * mt8186-reg.h -- Mediatek 8186 audio driver reg definition 12 /* reg bit enum */ 26 #define RESERVED_MASK_SFT BIT(31) 27 #define AHB_IDLE_EN_INT_SFT 30 28 #define AHB_IDLE_EN_INT_MASK_SFT BIT(30) 30 #define AHB_IDLE_EN_EXT_MASK_SFT BIT(29) 32 #define PDN_NLE_MASK_SFT BIT(28) 34 #define PDN_TML_MASK_SFT BIT(27) 36 #define PDN_DAC_PREDIS_MASK_SFT BIT(26) [all …]
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