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/linux-6.14.4/Documentation/devicetree/bindings/pwm/
Dpwm-sifive.yaml2 # Copyright (C) 2020 SiFive, Inc.
30 - sifive,fu540-c000-pwm
31 - sifive,fu740-c000-pwm
35 compatible strings are "sifive,fu540-c000-pwm" and
36 "sifive,fu740-c000-pwm" for the SiFive PWM v0 as integrated onto the
53 Each PWM instance in FU540-C000 has 4 comparators. One interrupt per comparator.
66 compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
Dpwm-bcm2835.yaml37 pwm@2020c000 {
/linux-6.14.4/Documentation/devicetree/bindings/cache/
Dsifive,ccache0.yaml2 # Copyright (C) 2020 SiFive, Inc.
25 - sifive,fu540-c000-ccache
26 - sifive,fu740-c000-ccache
37 - sifive,fu540-c000-ccache
38 - sifive,fu740-c000-ccache
48 - const: sifive,fu540-c000-ccache
92 - sifive,fu740-c000-ccache
116 - sifive,fu740-c000-ccache
161 compatible = "sifive,fu540-c000-ccache", "cache";
/linux-6.14.4/Documentation/devicetree/bindings/clock/sifive/
Dfu540-prci.yaml2 # Copyright (C) 2020 SiFive, Inc.
26 const: sifive,fu540-c000-prci
55 compatible = "sifive,fu540-c000-prci";
Dfu740-prci.yaml2 # Copyright (C) 2020 SiFive, Inc.
27 const: sifive,fu740-c000-prci
59 compatible = "sifive,fu740-c000-prci";
/linux-6.14.4/drivers/clk/sifive/
Dfu540-prci.h6 * Copyright (C) 2020-2021 Zong Li
9 * FU540-C000 chip. This driver assumes that it has sole control
16 * - SiFive FU540-C000 manual v1p0, Chapter 7 "Clocking and Reset"
Dsifive-prci.c3 * Copyright (C) 2020 SiFive, Inc.
4 * Copyright (C) 2020 Zong Li
602 {.compatible = "sifive,fu540-c000-prci", .data = &prci_clk_fu540},
603 {.compatible = "sifive,fu740-c000-prci", .data = &prci_clk_fu740},
/linux-6.14.4/arch/riscv/boot/dts/sifive/
Dfu740-c000.dtsi2 /* Copyright (c) 2020 SiFive, Inc */
11 compatible = "sifive,fu740-c000", "sifive,fu740";
185 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
197 compatible = "sifive,fu740-c000-prci";
204 compatible = "sifive,fu740-c000-uart", "sifive,uart0";
212 compatible = "sifive,fu740-c000-uart", "sifive,uart0";
220 compatible = "sifive,fu740-c000-i2c", "sifive,i2c0";
232 compatible = "sifive,fu740-c000-i2c", "sifive,i2c0";
244 compatible = "sifive,fu740-c000-spi", "sifive,spi0";
255 compatible = "sifive,fu740-c000-spi", "sifive,spi0";
[all …]
Dhifive-unmatched-a00.dts2 /* Copyright (c) 2020 SiFive, Inc */
4 #include "fu740-c000.dtsi"
15 compatible = "sifive,hifive-unmatched-a00", "sifive,fu740-c000",
/linux-6.14.4/arch/arm/boot/dts/qcom/
Dpmx55.dtsi4 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
5 * Copyright (c) 2020, Linaro Limited
68 pmx55_gpios: gpio@c000 {
Dqcom-sdx55.dtsi6 * Copyright (c) 2020, Linaro Ltd.
267 system_noc: interconnect@162c000 {
/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dpm8009.dtsi4 * Copyright (c) 2020, Linaro Limited
21 pm8009_gpios: gpio@c000 {
Dpm660l.dtsi3 * Copyright (c) 2020, Konrad Dybcio
50 pm660l_gpios: gpio@c000 {
Dpm660.dtsi3 * Copyright (c) 2020, Konrad Dybcio
208 pm660_gpios: gpio@c000 {
Dsm8350.dtsi3 * Copyright (c) 2020, Linaro Limited
838 i2c17: i2c@88c000 {
854 spi17: spi@88c000 {
1064 uart2: serial@98c000 {
1079 spi3: spi@98c000 {
1204 i2c7: i2c@99c000 {
1220 spi7: spi@99c000 {
Dsc8180x.dtsi4 * Copyright (c) 2020-2023, Linaro Limited
932 i2c3: i2c@88c000 {
947 spi3: spi@88c000 {
961 uart3: serial@88c000 {
1096 i2c7: i2c@89c000 {
1111 spi7: spi@89c000 {
1125 uart7: serial@89c000 {
Dsm8250.dtsi3 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
1156 i2c17: i2c@88c000 {
1179 spi17: spi@88c000 {
1201 uart17: serial@88c000 {
1513 i2c3: i2c@98c000 {
1536 spi3: spi@98c000 {
1710 i2c7: i2c@99c000 {
1733 spi7: spi@99c000 {
3354 tpdm@684c000 {
Dmsm8939.dtsi4 * Copyright (c) 2020-2023, Linaro Limited
484 qfprom: qfprom@5c000 {
1693 lpass_codec: audio-codec@771c000 {
Dipq9574.dtsi5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
265 pcie2_phy: phy@8c000 {
/linux-6.14.4/Documentation/devicetree/bindings/interrupt-controller/
Dsifive,plic-1.0.0.yaml2 # Copyright (C) 2020 SiFive, Inc.
61 - sifive,fu540-c000-plic
167 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
/linux-6.14.4/arch/arm/boot/dts/hisilicon/
Dsd5203.dts3 * Copyright (c) 2020 HiSilicon Limited.
86 uart1: serial@1600c000 {
/linux-6.14.4/arch/arm/boot/dts/mediatek/
Dmt7623n.dtsi3 * Copyright © 2017-2020 MediaTek Inc.
128 smi_common: smi@1000c000 {
185 dsi: dsi@1400c000 {
/linux-6.14.4/arch/riscv/boot/dts/microchip/
Dmpfs.dtsi2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
210 compatible = "microchip,mpfs-ccache", "sifive,fu540-c000-ccache", "cache";
222 compatible = "sifive,fu540-c000-clint", "sifive,clint0";
232 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
422 can0: can@2010c000 {
/linux-6.14.4/arch/arm64/boot/dts/ti/
Dk3-am64-main.dtsi5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
1300 icssg0_pa_stats: pa-stats@2c000 {
1381 tx_pru0_1: txpru@c000 {
1479 icssg1_pa_stats: pa-stats@2c000 {
1560 tx_pru1_1: txpru@c000 {
Dk3-j7200-mcu-wakeup.dtsi5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
229 wkup_pmx0: pinctrl@4301c000 {

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