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/linux-6.14.4/drivers/staging/media/sunxi/sun6i-isp/
Dsun6i_isp_reg.h21 #define SUN6I_ISP_FE_CFG_SRC0_MODE(v) (((v) << 8) & GENMASK(9, 8)) argument
22 #define SUN6I_ISP_FE_CFG_SRC1_MODE(v) (((v) << 16) & GENMASK(17, 16)) argument
33 #define SUN6I_ISP_FE_CTRL_OUTPUT_SPEED_CTRL(v) (((v) << 16) & GENMASK(17, 16)) argument
92 #define SUN6I_ISP_MODULE_EN_AFS BIT(16)
104 #define SUN6I_ISP_MODE_INPUT_FMT(v) ((v) & GENMASK(2, 0)) argument
105 #define SUN6I_ISP_MODE_INPUT_YUV_SEQ(v) (((v) << 3) & GENMASK(4, 3)) argument
106 #define SUN6I_ISP_MODE_OTF_DPC(v) (((v) << 16) & BIT(16)) argument
107 #define SUN6I_ISP_MODE_SHARP(v) (((v) << 17) & BIT(17)) argument
108 #define SUN6I_ISP_MODE_HIST(v) (((v) << 20) & GENMASK(21, 20)) argument
123 #define SUN6I_ISP_IN_CFG_STRIDE_DIV16(v) ((v) & GENMASK(10, 0)) argument
[all …]
/linux-6.14.4/drivers/mtd/nand/raw/
Dnand_ids.c29 {"TC58NVG0S3E 1G 3.3V 8-bit",
32 {"TC58NVG2S0F 4G 3.3V 8-bit",
35 {"TC58NVG2S0H 4G 3.3V 8-bit",
38 {"TC58NVG3S0F 8G 3.3V 8-bit",
41 {"TC58NVG5D2 32G 3.3V 8-bit",
44 {"TC58NVG6D2 64G 3.3V 8-bit",
47 {"SDTNQGAMA 64G 3.3V 8-bit",
50 {"SDTNRGAMA 64G 3.3V 8-bit",
53 {"H27UCG8T2ATR-BC 64G 3.3V 8-bit",
57 {"H27UCG8T2ETR-BC 64G 3.3V 8-bit",
[all …]
/linux-6.14.4/arch/microblaze/lib/
Dfastcopy.S88 lwi r9, r6, 16 /* t1 = *(s + 16) */
92 swi r9, r5, 16 /* *(d + 16) = t1 */
115 lwi r12, r8, 4 /* v = *(as + 4) */
116 bsrli r9, r12, 8 /* t1 = v >> 8 */
119 bslli r11, r12, 24 /* h = v << 24 */
120 lwi r12, r8, 8 /* v = *(as + 8) */
121 bsrli r9, r12, 8 /* t1 = v >> 8 */
124 bslli r11, r12, 24 /* h = v << 24 */
125 lwi r12, r8, 12 /* v = *(as + 12) */
126 bsrli r9, r12, 8 /* t1 = v >> 8 */
[all …]
/linux-6.14.4/drivers/media/platform/nxp/
Dimx-pxp.h19 #define BF_PXP_CTRL_SFTRST(v) \ argument
20 (((v) << 31) & BM_PXP_CTRL_SFTRST)
22 #define BF_PXP_CTRL_CLKGATE(v) \ argument
23 (((v) << 30) & BM_PXP_CTRL_CLKGATE)
25 #define BF_PXP_CTRL_RSVD4(v) \ argument
26 (((v) << 29) & BM_PXP_CTRL_RSVD4)
28 #define BF_PXP_CTRL_EN_REPEAT(v) \ argument
29 (((v) << 28) & BM_PXP_CTRL_EN_REPEAT)
31 #define BF_PXP_CTRL_ENABLE_ROTATE1(v) \ argument
32 (((v) << 27) & BM_PXP_CTRL_ENABLE_ROTATE1)
[all …]
/linux-6.14.4/drivers/gpu/drm/exynos/
Dregs-scaler.h57 * 2 80 84 88 8c 160 164 168 16c
140 #define SCALER_CFG_BLEND_EN (1 << 16)
157 #define SCALER_INT_EN_ILLEGAL_DST_CR_BASE (1 << 16)
185 #define SCALER_INT_STATUS_ILLEGAL_DST_CR_BASE (1 << 16)
206 #define SCALER_SRC_CFG_SET_BYTE_SWAP(v) SCALER_SET(v, 6, 5) argument
208 #define SCALER_SRC_CFG_SET_COLOR_FORMAT(v) SCALER_SET(v, 4, 0) argument
223 #define SCALER_YUV420_2P_VU 16
231 #define SCALER_SRC_SPAN_GET_C_SPAN(r) SCALER_GET(r, 29, 16)
232 #define SCALER_SRC_SPAN_SET_C_SPAN(v) SCALER_SET(v, 29, 16) argument
234 #define SCALER_SRC_SPAN_SET_Y_SPAN(v) SCALER_SET(v, 13, 0) argument
[all …]
/linux-6.14.4/drivers/media/platform/sunxi/sun6i-csi/
Dsun6i_csi_reg.h18 #define SUN6I_CSI_EN_PTN_CYCLE(v) (((v) << 16) & GENMASK(23, 16)) argument
29 #define SUN6I_CSI_IF_CFG_FIELD_DT_PCLK_SHIFT(v) (((v) << 24) & GENMASK(27, 24)) argument
39 #define SUN6I_CSI_IF_CFG_CLK_POL_FALLING (0 << 16)
40 #define SUN6I_CSI_IF_CFG_CLK_POL_RISING (1 << 16)
57 #define SUN6I_CSI_CAP_MASK(v) (((v) << 2) & GENMASK(5, 2)) argument
70 #define SUN6I_CSI_CH_CFG_PAD_VAL(v) (((v) << 24) & GENMASK(31, 24)) argument
71 #define SUN6I_CSI_CH_CFG_INPUT_FMT(v) (((v) << 20) & GENMASK(23, 20)) argument
72 #define SUN6I_CSI_CH_CFG_OUTPUT_FMT(v) (((v) << 16) & GENMASK(19, 16)) argument
78 #define SUN6I_CSI_CH_CFG_INPUT_YUV_SEQ(v) (((v) << 8) & GENMASK(9, 8)) argument
160 #define SUN6I_CSI_CH_FLD1_VSIZE_VER_LEN(v) (((v) << 16) & GENMASK(28, 16)) argument
[all …]
/linux-6.14.4/drivers/media/platform/verisilicon/
Drockchip_vpu2_hw_h264_dec.c28 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
30 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
31 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
32 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
33 #define VDPU_REG_PIC_FIXED_QUANT(v) ((v) ? BIT(7) : 0) argument
34 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
36 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
37 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
39 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
40 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument
[all …]
/linux-6.14.4/drivers/media/platform/sunxi/sun8i-di/
Dsun8i-di.h27 #define DEINTERLACE_FRM_CTRL_START BIT(16)
43 #define DEINTERLACE_FIELD_CTRL_FIELD_CNT(v) ((v) & 0xff) argument
55 #define DEINTERLACE_IN_FMT_PS(v) ((v) & 3) argument
56 #define DEINTERLACE_IN_FMT_FMT(v) (((v) & 7) << 4) argument
57 #define DEINTERLACE_IN_FMT_MOD(v) (((v) & 7) << 8) argument
64 #define DEINTERLACE_OUT_FMT_FMT(v) ((v) & 0xf) argument
65 #define DEINTERLACE_OUT_FMT_PS(v) (((v) & 3) << 5) argument
82 #define DEINTERLACE_CTRL_MODE_PASSTROUGH (0 << 16)
83 #define DEINTERLACE_CTRL_MODE_WEAVE (1 << 16)
84 #define DEINTERLACE_CTRL_MODE_BOB (2 << 16)
[all …]
/linux-6.14.4/crypto/
Daegis128-neon-inner.c16 #define AEGIS_BLOCK_SIZE 16
26 uint8x16_t v[5]; member
35 vld1q_u8(state + 16), in aegis128_load_state_neon()
44 vst1q_u8(state, st.v[0]); in aegis128_save_state_neon()
45 vst1q_u8(state + 16, st.v[1]); in aegis128_save_state_neon()
46 vst1q_u8(state + 32, st.v[2]); in aegis128_save_state_neon()
47 vst1q_u8(state + 48, st.v[3]); in aegis128_save_state_neon()
48 vst1q_u8(state + 64, st.v[4]); in aegis128_save_state_neon()
66 uint8x16_t v; in aegis_aes_round() local
73 v = vqtbl4q_u8(vld1q_u8_x4(crypto_aes_sbox), w); in aegis_aes_round()
[all …]
/linux-6.14.4/arch/riscv/crypto/
Dsha256-riscv64-zvknha_or_zvknhb-zvkb.S40 // The generated code of this file depends on the following RISC-V extensions:
42 // - RISC-V Vector ('V') with VLEN >= 128
43 // - RISC-V Vector SHA-2 Secure Hash extension ('Zvknha' or 'Zvknhb')
44 // - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb')
116 vle32.v K0, (t0)
117 addi t0, t0, 16
118 vle32.v K1, (t0)
119 addi t0, t0, 16
120 vle32.v K2, (t0)
121 addi t0, t0, 16
[all …]
Daes-riscv64-zvkned.S41 // The generated code of this file depends on the following RISC-V extensions:
43 // - RISC-V Vector ('V') with VLEN >= 128
44 // - RISC-V Vector AES block cipher extension ('Zvkned')
60 vle32.v v16, (INP)
62 vse32.v v16, (OUTP)
76 // const u8 in[16], u8 out[16]);
93 vle32.v v16, (INP)
95 vse32.v v16, (OUTP)
115 // |len| must be nonzero and a multiple of 16 (AES_BLOCK_SIZE).
126 vle32.v v16, (IVP) // Load IV
[all …]
Daes-macros.S42 // generated code of these macros depends on the following RISC-V extensions:
44 // - RISC-V Vector ('V') with VLEN >= 128
45 // - RISC-V Vector AES block cipher extension ('Zvkned')
58 vle32.v v1, (\keyp)
59 addi \keyp, \keyp, 16
60 vle32.v v2, (\keyp)
61 addi \keyp, \keyp, 16
62 vle32.v v3, (\keyp)
63 addi \keyp, \keyp, 16
64 vle32.v v4, (\keyp)
[all …]
Daes-riscv64-zvkned-zvbb-zvkg.S39 // The generated code of this file depends on the following RISC-V extensions:
41 // - RISC-V Vector ('V') with VLEN >= 128 && VLEN < 2048
42 // - RISC-V Vector AES block cipher extension ('Zvkned')
43 // - RISC-V Vector Bit-manipulation extension ('Zvbb')
44 // - RISC-V Vector GCM/GMAC extension ('Zvkg')
93 vle32.v TWEAKS, (TWEAKP)
97 li t0, 16
101 vbrev8.v v12, TWEAKS
114 vmv.v.i v0, 1
115 vid.v v1
[all …]
/linux-6.14.4/drivers/staging/media/sunxi/cedrus/
Dcedrus_regs.h13 #define SHIFT_AND_MASK_BITS(v, h, l) \ argument
14 (((unsigned long)(v) << (l)) & GENMASK(h, l))
42 #define VE_MODE_DDR_MODE_BW_128 (0x03 << 16)
43 #define VE_MODE_DDR_MODE_BW_256 (0x02 << 16)
63 #define VE_PRIMARY_FB_LINE_STRIDE_CHROMA(s) SHIFT_AND_MASK_BITS(s, 31, 16)
91 #define VE_VERSION_SHIFT 16
104 #define VE_DEC_MPEG_MP12HDR_TOP_FIELD_FIRST(v) \ argument
105 ((v) ? BIT(7) : 0)
106 #define VE_DEC_MPEG_MP12HDR_FRAME_PRED_FRAME_DCT(v) \ argument
107 ((v) ? BIT(6) : 0)
[all …]
/linux-6.14.4/sound/ppc/
Dsnd_ps3_reg.h72 31 24 23 16 15 8 7 0
95 31 24 23 16 15 8 7 0
105 31 24 23 16 15 8 7 0
124 31 24 23 16 15 8 7 0
154 31 24 23 16 15 8 7 0
176 #define PS3_AUDIO_AX_ISBP_SPO1BWN_MASK (0x7 << 16) /* R-IUF */
184 31 24 23 16 15 8 7 0
208 #define PS3_AUDIO_AX_AOBP_ASO3BWN_MASK (0x7 << 16) /* R-IUF */
224 31 24 23 16 15 8 7 0
235 #define PS3_AUDIO_AX_IC_AASOIMD_EVERY1 (0x0 << 12) /* RWI-V */
[all …]
/linux-6.14.4/arch/arm64/crypto/
Dsha512-ce-core.S15 .irp b,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19
21 .inst 0xce608000 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
25 .inst 0xce608400 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
33 .inst 0xce608800 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
85 ld1 {v\rc1\().2d}, [x4], #16
87 add v5.2d, v\rc0\().2d, v\in0\().2d
88 ext v6.16b, v\i2\().16b, v\i3\().16b, #8
89 ext v5.16b, v5.16b, v5.16b, #8
90 ext v7.16b, v\i1\().16b, v\i2\().16b, #8
91 add v\i3\().2d, v\i3\().2d, v5.2d
[all …]
/linux-6.14.4/arch/alpha/kernel/
Dentry.S27 .cfi_rel_offset $gp, 16
28 .cfi_rel_offset $16, 24
42 * regs 16-18 saved by PAL-code
44 * JRP - Save regs 16-18 in a special area of the stack, so that
53 stq $2, 16($sp)
59 .cfi_rel_offset $2, 16
79 stq $16, 160($sp)
101 ldq $2, 16($sp)
153 .cfi_rel_offset $11, 16
201 stq $11, 16($sp)
[all …]
/linux-6.14.4/sound/soc/mxs/
Dmxs-saif.h20 #define BF_SAIF_CTRL_BITCLK_MULT_RATE(v) \ argument
21 (((v) << 27) & BM_SAIF_CTRL_BITCLK_MULT_RATE)
28 #define BP_SAIF_CTRL_DMAWAIT_COUNT 16
30 #define BF_SAIF_CTRL_DMAWAIT_COUNT(v) \ argument
31 (((v) << 16) & BM_SAIF_CTRL_DMAWAIT_COUNT)
34 #define BF_SAIF_CTRL_CHANNEL_NUM_SELECT(v) \ argument
35 (((v) << 14) & BM_SAIF_CTRL_CHANNEL_NUM_SELECT)
44 #define BF_SAIF_CTRL_WORD_LENGTH(v) \ argument
45 (((v) << 4) & BM_SAIF_CTRL_WORD_LENGTH)
55 #define BF_SAIF_STAT_RSRVD2(v) \ argument
[all …]
/linux-6.14.4/drivers/scsi/arm/
Dcumana_1.c41 #define L(v) (((v)<<16)|((v) & 0x0000ffff)) argument
42 #define H(v) (((v)>>16)|((v) & 0xffff0000)) argument
58 unsigned long v; in cumanascsi_pwrite() local
64 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
65 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
66 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
67 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
68 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
69 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
70 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
[all …]
/linux-6.14.4/lib/
Dbitfield_kunit.c11 #define CHECK_ENC_GET_U(tp, v, field, res) do { \ argument
15 _res = u##tp##_encode_bits(v, field); \
17 "u" #tp "_encode_bits(" #v ", " #field ") is 0x%llx != " #res "\n", \
20 u##tp##_get_bits(_res, field) != v); \
24 #define CHECK_ENC_GET_LE(tp, v, field, res) do { \ argument
28 _res = le##tp##_encode_bits(v, field); \
31 "le" #tp "_encode_bits(" #v ", " #field ") is 0x%llx != 0x%llx",\
35 le##tp##_get_bits(_res, field) != v);\
39 #define CHECK_ENC_GET_BE(tp, v, field, res) do { \ argument
43 _res = be##tp##_encode_bits(v, field); \
[all …]
/linux-6.14.4/tools/testing/selftests/bpf/progs/
Diters.c14 int small_arr[16] SEC(".data.small_arr");
34 int *v, i = zero; /* obscure initial value of i */ in iter_err_unsafe_c_loop() local
39 while ((v = bpf_iter_num_next(&it))) { in iter_err_unsafe_c_loop()
96 int *v; in iter_while_loop() local
101 while ((v = bpf_iter_num_next(&it))) { in iter_while_loop()
102 bpf_printk("ITER_BASIC: E1 VAL: v=%d", *v); in iter_while_loop()
114 int *v; in iter_while_loop_auto_cleanup() local
119 while ((v = bpf_iter_num_next(&it))) { in iter_while_loop_auto_cleanup()
120 bpf_printk("ITER_BASIC: E1 VAL: v=%d", *v); in iter_while_loop_auto_cleanup()
132 int *v; in iter_for_loop() local
[all …]
/linux-6.14.4/drivers/net/ethernet/altera/
Daltera_msgdmahw.h18 * bit 23:16 read burst
21 u32 stride; /* bit 31:16 write stride
40 #define MSGDMA_DESC_CTL_TR_ERR_IRQ (0xff << 16)
80 u32 rw_fill_level; /* bit 31:16 - write fill level
84 u32 rw_seq_num; /* bit 31:16 - write sequence number
105 #define MSGDMA_CSR_STAT_BUSY_GET(v) GET_BIT_VALUE(v, 0) argument
106 #define MSGDMA_CSR_STAT_DESC_BUF_EMPTY_GET(v) GET_BIT_VALUE(v, 1) argument
107 #define MSGDMA_CSR_STAT_DESC_BUF_FULL_GET(v) GET_BIT_VALUE(v, 2) argument
108 #define MSGDMA_CSR_STAT_RESP_BUF_EMPTY_GET(v) GET_BIT_VALUE(v, 3) argument
109 #define MSGDMA_CSR_STAT_RESP_BUF_FULL_GET(v) GET_BIT_VALUE(v, 4) argument
[all …]
/linux-6.14.4/drivers/video/fbdev/
Dhitfb.c86 hitfb_writew(saddr >> 16, HD64461_BBTDSARH); in hitfb_accel_set_dest()
129 hitfb_writew(saddr >> 16, HD64461_BBTSSARH); in hitfb_accel_bitblt()
131 hitfb_writew(daddr >> 16, HD64461_BBTDSARH); in hitfb_accel_bitblt()
135 hitfb_writew(maddr >> 16, HD64461_BBTMARH); in hitfb_accel_bitblt()
147 hitfb_writew(16, HD64461_BBTMDR); in hitfb_fillrect()
149 if (p->var.bits_per_pixel == 16) { in hitfb_fillrect()
167 hitfb_accel_bitblt(p->var.bits_per_pixel == 16, area->sx, area->sy, in hitfb_copyarea()
188 unsigned short v; in hitfb_blank() local
191 v = hitfb_readw(HD64461_LDR1); in hitfb_blank()
192 v &= ~HD64461_LDR1_DON; in hitfb_blank()
[all …]
/linux-6.14.4/drivers/gpu/drm/msm/disp/dpu1/
Dmsm_media_info.h21 * by an interleaved U/V plane containing 8 bit 2x2 subsampled
33 * Y Y Y Y Y Y Y Y Y Y Y Y . . . . V |
37 * . . . . . . . . . . . . . . . . V
38 * U V U V U V U V U V U V . . . . ^
39 * U V U V U V U V U V U V . . . . |
40 * U V U V U V U V U V U V . . . . |
41 * U V U V U V U V U V U V . . . . UV_Scanlines
43 * . . . . . . . . . . . . . . . . V
49 * UV_Scanlines: Height/2 aligned to 16
59 * by an interleaved V/U plane containing 8 bit 2x2 subsampled
[all …]
/linux-6.14.4/arch/arm/crypto/
Dblake2s-core.S79 // d = ror32(d ^ a, 16);
84 add \c0, \c0, \d0, ror #16
85 add \c1, \c1, \d1, ror #16
101 eor \d0, \a0, \d0, ror#16
102 eor \d1, \a1, \d1, ror#16
113 // Execute one round of BLAKE2s by updating the state matrix v[0..15]. v[0..9]
115 // spilling v[8..9], then to v[9..15], then to the message block. r10-r12 and
132 // (v[0], v[4], v[8], v[12]) and (v[1], v[5], v[9], v[13]).
133 __ldrd r10, r11, sp, 16 // load v[12] and v[13]
137 __strd r10, r11, sp, 16
[all …]

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