/linux-6.14.4/drivers/scsi/mvsas/ |
D | mv_94xx.h | 133 PHY_MAX_SPP_PHYS_LINK_RATE_MASK = (0x7 << 12), 153 MVS_IRQ_PCIF_DRBL0 = (1 << 12), 180 * bit 2: 6Gbps support 181 * bit 1: 3Gbps support 182 * bit 0: 1.5Gbps support 188 * bit 5: G1 (1.5Gbps) Without SSC 189 * bit 4: G1 (1.5Gbps) with SSC 190 * bit 3: G2 (3.0Gbps) Without SSC 191 * bit 2: G2 (3.0Gbps) with SSC 192 * bit 1: G3 (6.0Gbps) without SSC [all …]
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D | mv_94xx.c | 177 /* support 1.5 Gbps */ in set_phy_rate() 185 /* support 1.5, 3.0 Gbps */ in set_phy_rate() 192 /* support 1.5, 3.0, 6.0 Gbps */ in set_phy_rate() 233 /*set default phy_rate = 6Gbps*/ in mvs_94xx_config_reg_from_hba() 348 (12 - 1) << MVS_SGPIO_CFG0_AUT_BITLEN_SHIFT in mvs_94xx_sgpio_init() 901 lrmax = (rates->maximum_linkrate - SAS_LINK_RATE_1_5_GBPS) << 12; in mvs_94xx_phy_set_link_rate() 904 tmp &= ~(0x3 << 12); in mvs_94xx_phy_set_link_rate()
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/linux-6.14.4/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/ |
D | smu11_driver_if_arcturus.h | 69 #define FEATURE_GFX_ULV_BIT 12 199 #define THROTTLER_PPT3_BIT 12 429 XGMI_LINK_RATE_2 = 2, // 2Gbps 430 XGMI_LINK_RATE_4 = 4, // 4Gbps 431 XGMI_LINK_RATE_8 = 8, // 8Gbps 432 XGMI_LINK_RATE_12 = 12, // 12Gbps 433 XGMI_LINK_RATE_16 = 16, // 16Gbps 434 XGMI_LINK_RATE_17 = 17, // 17Gbps 435 XGMI_LINK_RATE_18 = 18, // 18Gbps 436 XGMI_LINK_RATE_19 = 19, // 19Gbps [all …]
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D | smu11_driver_if_sienna_cichlid.h | 90 #define FEATURE_DS_GFXCLK_BIT 12 207 #define THROTTLER_TDC_SOC_BIT 12 231 #define FW_DSTATE_HSR_NON_STROBE_BIT 12 524 XGMI_LINK_RATE_2 = 2, // 2Gbps 525 XGMI_LINK_RATE_4 = 4, // 4Gbps 526 XGMI_LINK_RATE_8 = 8, // 8Gbps 527 XGMI_LINK_RATE_12 = 12, // 12Gbps 528 XGMI_LINK_RATE_16 = 16, // 16Gbps 529 XGMI_LINK_RATE_17 = 17, // 17Gbps 530 XGMI_LINK_RATE_18 = 18, // 18Gbps [all …]
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D | smu13_driver_if_aldebaran.h | 50 #define FEATURE_GFX_SS_BIT 12 123 #define THROTTLER_TEMP_VR_SOC_BIT 12 358 uint8_t XgmiLinkSpeed[NUM_XGMI_DPM_LEVELS]; //Gbps [EX: 32 = 32Gbps]
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/linux-6.14.4/drivers/net/ethernet/ezchip/ |
D | nps_enet.h | 59 /* Gbps Eth MAC Configuration 0 register masks and shifts */ 81 #define CFG_0_RX_IFG_SHIFT 12 93 /* Gbps Eth MAC Configuration 1 register masks and shifts */ 103 /* Gbps Eth MAC Configuration 2 register masks and shifts */ 119 /* Gbps Eth MAC Configuration 3 register masks and shifts */
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/linux-6.14.4/drivers/gpu/drm/amd/display/dc/ |
D | dc_dp_types.h | 50 LINK_RATE_LOW = 0x06, // Rate_1 (RBR) - 1.62 Gbps/Lane 51 LINK_RATE_RATE_2 = 0x08, // Rate_2 - 2.16 Gbps/Lane 52 LINK_RATE_RATE_3 = 0x09, // Rate_3 - 2.43 Gbps/Lane 53 LINK_RATE_HIGH = 0x0A, // Rate_4 (HBR) - 2.70 Gbps/Lane 54 LINK_RATE_RBR2 = 0x0C, // Rate_5 (RBR2) - 3.24 Gbps/Lane 55 LINK_RATE_RATE_6 = 0x10, // Rate_6 - 4.32 Gbps/Lane 56 LINK_RATE_HIGH2 = 0x14, // Rate_7 (HBR2) - 5.40 Gbps/Lane 57 LINK_RATE_RATE_8 = 0x19, // Rate_8 - 6.75 Gbps/Lane 58 LINK_RATE_HIGH3 = 0x1E, // Rate_9 (HBR3) - 8.10 Gbps/Lane 62 LINK_RATE_UHBR10 = 1000, // UHBR10 - 10.0 Gbps/Lane [all …]
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/linux-6.14.4/drivers/gpu/drm/i915/display/ |
D | intel_cx0_phy.c | 540 .pll[12] = 0xC0, 566 .pll[12] = 0, 592 .pll[12] = 0x20, 618 .pll[12] = 0xA0, 644 .pll[12] = 0xC0, 670 .pll[12] = 0, 696 .pll[12] = 0xA0, 722 .pll[12] = 0xC8, 748 .pll[12] = 0xF0, 882 .clock = 1000000, /* 10 Gbps */ [all …]
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/linux-6.14.4/drivers/gpu/drm/meson/ |
D | meson_dw_hdmi.c | 291 /* 5.94Gbps, 3.7125Gbps */ in meson_hdmi_phy_setup_mode() 295 /* 2.97Gbps */ in meson_hdmi_phy_setup_mode() 299 /* 1.485Gbps */ in meson_hdmi_phy_setup_mode() 310 /* 5.94Gbps, 3.7125Gbps */ in meson_hdmi_phy_setup_mode() 314 /* 2.97Gbps */ in meson_hdmi_phy_setup_mode() 318 /* 1.485Gbps, and below */ in meson_hdmi_phy_setup_mode() 325 /* 5.94Gbps, 3.7125Gbps */ in meson_hdmi_phy_setup_mode() 330 /* 2.97Gbps */ in meson_hdmi_phy_setup_mode() 335 /* 1.485Gbps, and below */ in meson_hdmi_phy_setup_mode() 472 (0xa << 12) | 0xa0); in dw_hdmi_setup_hpd() [all …]
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/linux-6.14.4/include/rdma/ |
D | opa_port_info.h | 24 #define OPA_PORT_LTP_CRC_MODE_PER_LANE 8 /* 12/16-bit per lane LTP CRC mode */ 39 #define OPA_LINKDOWN_REASON_PREEMPT_ERROR 12 96 #define OPA_LINK_SPEED_NOP 0x0000 /* Reserved (1-5 Gbps) */ 97 #define OPA_LINK_SPEED_12_5G 0x0001 /* 12.5 Gbps */ 98 #define OPA_LINK_SPEED_25G 0x0002 /* 25.78125? Gbps (EDR) */ 179 OPA_PI_MASK_INTERLEAVE_DIST_SUP = (0x0003 << 12), 332 __be32 buffer_units; /* 9 res, 12, 5, 3, 3 */
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/linux-6.14.4/drivers/net/phy/realtek/ |
D | realtek_main.c | 51 #define RTL8211F_ALDPS_XTAL_OFF BIT(12) 54 #define RTL8211E_TX_DELAY BIT(12) 86 #define RTL8366RB_POWER_SAVE_ON BIT(12) 205 val = BIT(13) | BIT(12) | BIT(11); in rtl8201_config_intr() 621 * 12 = RX Delay, 11 = TX Delay in rtl8211e_config_init() 1431 .name = "RTL8226 2.5Gbps PHY", 1442 .name = "RTL8226B_RTL8221B 2.5Gbps PHY", 1454 .name = "RTL8226-CG 2.5Gbps PHY", 1464 .name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY", 1476 .name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)", [all …]
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/linux-6.14.4/fs/smb/client/ |
D | cifs_debug.c | 180 return "1Gbps"; in smb_speed_to_str() 182 return "2.5Gbps"; in smb_speed_to_str() 184 return "5Gbps"; in smb_speed_to_str() 186 return "10Gbps"; in smb_speed_to_str() 188 return "14Gbps"; in smb_speed_to_str() 190 return "20Gbps"; in smb_speed_to_str() 192 return "25Gbps"; in smb_speed_to_str() 194 return "40Gbps"; in smb_speed_to_str() 196 return "50Gbps"; in smb_speed_to_str() 198 return "56Gbps"; in smb_speed_to_str() [all …]
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/linux-6.14.4/Documentation/networking/device_drivers/ethernet/pensando/ |
D | ionic.rst | 36 ionic 0000:b5:00.0 enp181s0: Link up - 100 Gbps 39 ionic 0000:b6:00.0 enp182s0: Link up - 100 Gbps 136 tx_packets: 12 142 tx_csum_none: 12
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/linux-6.14.4/tools/testing/selftests/drivers/net/mlxsw/ |
D | qos_mc_aware.sh | 39 # | >1Gbps | | >1Gbps | 48 # | | 1Gbps bottleneck | 182 devlink_port_pool_th_set $swp3 4 12 260 # degradation on 1Gbps link.
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/linux-6.14.4/tools/testing/selftests/net/forwarding/ |
D | sch_ets_core.sh | 22 # | + $h1.10 + $h1.11 + $h1.12 | 33 # | | >1Gbps | 37 # | | + $swp1.10 | | + $swp1.11 | | + $swp1.12 | | 43 # | | + $swp2.10 | | + $swp2.11 | | + $swp2.12 | | 48 # | | 1Gbps (ethtool or HTB qdisc) | 57 # | + $h2.10 + $h2.11 + $h2.12 | 266 ping_test $h1.12 $(dip 2) " vlan 12"
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/linux-6.14.4/drivers/phy/mediatek/ |
D | phy-mtk-hdmi-mt8195.c | 35 /* HDMI 2.0 specification, 3.4Gbps <= TMDS Bit Rate <= 6G, in mtk_phy_tmds_clk_ratio() 36 * clock bit ratio 1:40, under 3.4Gbps, clock bit ratio 1:10 in mtk_phy_tmds_clk_ratio() 127 case 12: in mtk_hdmi_pll_set_hw() 146 case 12: in mtk_hdmi_pll_set_hw() 216 u8 txpredivs[4] = { 2, 4, 6, 12 }; in mtk_hdmi_pll_calc() 251 /* calculate txprediv: can be 2, 4, 6, 12 in mtk_hdmi_pll_calc() 253 * ICO clk constraint: 5G =< ICO clk <= 12G in mtk_hdmi_pll_calc() 258 ns_hdmipll_ck <= 12 * GIGA) in mtk_hdmi_pll_calc() 262 (ns_hdmipll_ck < 5 * GIGA || ns_hdmipll_ck > 12 * GIGA)) { in mtk_hdmi_pll_calc()
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/linux-6.14.4/drivers/net/ethernet/ibm/ehea/ |
D | ehea_phyp.h | 132 u32 max_num_addr_handles; /* 12 */ 190 #define H_SPEED_1G_F 6 /* 1 Gbps, Full Duplex */ 191 #define H_SPEED_10G_F 8 /* 10 Gbps, Full Duplex */ 271 u64 wsth; /* 12 */ 301 u64 rxjab; /* 12 */
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/linux-6.14.4/drivers/phy/marvell/ |
D | phy-mvebu-a3700-comphy.c | 50 #define PU_TX_BIT BIT(12) 68 #define USE_MAX_PLL_RATE_BIT BIT(12) 107 #define IDLE_SYNC_EN BIT(12) 167 #define CFG_PM_OSCCLK_WAIT_MASK GENMASK(15, 12) 194 #define PIN_RESET_COMPHY_BIT BIT(12) 608 * All PHY register values are defined in full for 3.125Gbps in comphy_gbe_phy_init() 609 * SERDES speed. The values required for 1.25 Gbps are almost in comphy_gbe_phy_init() 611 * comparison to 3.125 Gbps values. These register values are in comphy_gbe_phy_init() 715 * (not SERDES). For instance, it selects SATA speed 1.5/3/6 Gbps or in mvebu_a3700_comphy_ethernet_power_on() 716 * PCIe speed 2.5/5 Gbps in mvebu_a3700_comphy_ethernet_power_on() [all …]
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/linux-6.14.4/drivers/usb/host/ |
D | xhci-hub.c | 26 0x00050034, /* USB 3.0 SS Gen1x1 id:4 symmetric rx 5Gbps */ 27 0x000500b4, /* USB 3.0 SS Gen1x1 id:4 symmetric tx 5Gbps */ 28 0x000a4035, /* USB 3.1 SSP Gen2x1 id:5 symmetric rx 10Gbps */ 29 0x000a40b5, /* USB 3.1 SSP Gen2x1 id:5 symmetric tx 10Gbps */ 30 0x00054036, /* USB 3.2 SSP Gen1x2 id:6 symmetric rx 5Gbps */ 31 0x000540b6, /* USB 3.2 SSP Gen1x2 id:6 symmetric tx 5Gbps */ 32 0x000a4037, /* USB 3.2 SSP Gen2x2 id:7 symmetric rx 10Gbps */ 33 0x000a40b7, /* USB 3.2 SSP Gen2x2 id:7 symmetric tx 10Gbps */ 170 /* Shift to Gbps and set SSP Link Protocol if 10Gpbs */ in xhci_create_usb3x_bos_desc() 187 * is 20Gbps, but the BOS descriptor lane speed mantissa is in xhci_create_usb3x_bos_desc() [all …]
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/linux-6.14.4/arch/mips/cavium-octeon/executive/ |
D | cvmx-helper-board.c | 221 /* The simulator gives you a simulated 1Gbps full duplex link */ in __cvmx_helper_board_link_get() 253 case 2: /* 1 Gbps */ in __cvmx_helper_board_link_get() 344 /* Most boards except NIC10e use a 12MHz crystal */ in __cvmx_helper_board_usb_get_clock_type()
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/linux-6.14.4/drivers/gpu/drm/amd/display/dc/link/protocols/ |
D | link_dp_capability.c | 126 return 12; in translate_dpcd_max_bpc() 184 // LinkRate is normally stored as a multiplier of 0.27 Gbps per lane. Do the translation. in linkRateInKHzToLinkRateMultiplier() 187 link_rate = LINK_RATE_LOW; // Rate_1 (RBR) - 1.62 Gbps/Lane in linkRateInKHzToLinkRateMultiplier() 190 link_rate = LINK_RATE_RATE_2; // Rate_2 - 2.16 Gbps/Lane in linkRateInKHzToLinkRateMultiplier() 193 link_rate = LINK_RATE_RATE_3; // Rate_3 - 2.43 Gbps/Lane in linkRateInKHzToLinkRateMultiplier() 196 link_rate = LINK_RATE_HIGH; // Rate_4 (HBR) - 2.70 Gbps/Lane in linkRateInKHzToLinkRateMultiplier() 199 link_rate = LINK_RATE_RBR2; // Rate_5 (RBR2)- 3.24 Gbps/Lane in linkRateInKHzToLinkRateMultiplier() 202 link_rate = LINK_RATE_RATE_6; // Rate_6 - 4.32 Gbps/Lane in linkRateInKHzToLinkRateMultiplier() 205 link_rate = LINK_RATE_HIGH2; // Rate_7 (HBR2)- 5.40 Gbps/Lane in linkRateInKHzToLinkRateMultiplier() 208 link_rate = LINK_RATE_RATE_8; // Rate_8 - 6.75 Gbps/Lane in linkRateInKHzToLinkRateMultiplier() [all …]
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/linux-6.14.4/arch/x86/include/uapi/asm/ |
D | amd_hsmp.h | 33 HSMP_SET_NBIO_DPM_LEVEL, /* 12h Set max/min LCLK DPM Level for a given NBIO */ 220 * output: args[0] = max bw in Gbps[31:20] + utilised bw in Gbps[19:8] + 369 * output: args[0] = tu value[19:16] + esu value[12:8]
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/linux-6.14.4/include/uapi/linux/ |
D | mdio.h | 245 #define MDIO_AN_C73_0_C2 BIT(12) 257 #define MDIO_AN_C73_1_100GBASE_KR4 BIT(12) 482 #define MDIO_USXGMII_10G 0x0600 /* 10Gbps */ 483 #define MDIO_USXGMII_10GHALF 0x0600 /* 10Gbps half-duplex */ 484 #define MDIO_USXGMII_10GFULL 0x1600 /* 10Gbps full-duplex */
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/linux-6.14.4/Documentation/networking/ |
D | phy.rst | 72 The Reduced Gigabit Medium Independent Interface (RGMII) is a 12-pin 249 data rate of 1Gbps. Embedded in the data stream is a 16-bit control 251 remote end. This does not include "up-clocked" variants such as 2.5Gbps 262 encoding. The underlying data rate is 1Gbps, with the slower speeds of 266 receipt. This does not include "up-clocked" variants such as 2.5Gbps
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/linux-6.14.4/drivers/infiniband/hw/efa/ |
D | efa_verbs.c | 90 #define EFA_CHUNK_PAYLOAD_SHIFT 12 94 #define EFA_CHUNK_SHIFT 12 282 static void efa_link_gbps_to_speed_and_width(u16 gbps, in efa_link_gbps_to_speed_and_width() argument 286 if (gbps >= 400) { in efa_link_gbps_to_speed_and_width() 289 } else if (gbps >= 200) { in efa_link_gbps_to_speed_and_width() 292 } else if (gbps >= 120) { in efa_link_gbps_to_speed_and_width() 295 } else if (gbps >= 100) { in efa_link_gbps_to_speed_and_width() 298 } else if (gbps >= 60) { in efa_link_gbps_to_speed_and_width() 301 } else if (gbps >= 50) { in efa_link_gbps_to_speed_and_width() 304 } else if (gbps >= 40) { in efa_link_gbps_to_speed_and_width() [all …]
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